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kvaneeshmpe
kvaneesh
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mpe
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powerpc/mm: Move radix/hash common data structures to book3s64 headers
Start moving code that is generic between radix and hash to book3s64 specific headers from the book3s64 hash specific one. Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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-65
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4 files changed

+85
-65
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‎arch/powerpc/include/asm/book3s/32/mmu-hash.h

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
1-
#ifndef _ASM_POWERPC_MMU_HASH32_H_
2-
#define _ASM_POWERPC_MMU_HASH32_H_
1+
#ifndef _ASM_POWERPC_BOOK3S_32_MMU_HASH_H_
2+
#define _ASM_POWERPC_BOOK3S_32_MMU_HASH_H_
33
/*
44
* 32-bit hash table MMU support
55
*/
@@ -90,4 +90,4 @@ typedef struct {
9090
#define mmu_virtual_psize MMU_PAGE_4K
9191
#define mmu_linear_psize MMU_PAGE_256M
9292

93-
#endif /* _ASM_POWERPC_MMU_HASH32_H_ */
93+
#endif /* _ASM_POWERPC_BOOK3S_32_MMU_HASH_H_ */

‎arch/powerpc/include/asm/book3s/64/mmu-hash.h

Lines changed: 3 additions & 58 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
1-
#ifndef _ASM_POWERPC_MMU_HASH64_H_
2-
#define _ASM_POWERPC_MMU_HASH64_H_
1+
#ifndef _ASM_POWERPC_BOOK3S_64_MMU_HASH_H_
2+
#define _ASM_POWERPC_BOOK3S_64_MMU_HASH_H_
33
/*
44
* PowerPC64 memory management structures
55
*
@@ -127,24 +127,6 @@ extern struct hash_pte *htab_address;
127127
extern unsigned long htab_size_bytes;
128128
extern unsigned long htab_hash_mask;
129129

130-
/*
131-
* Page size definition
132-
*
133-
* shift : is the "PAGE_SHIFT" value for that page size
134-
* sllp : is a bit mask with the value of SLB L || LP to be or'ed
135-
* directly to a slbmte "vsid" value
136-
* penc : is the HPTE encoding mask for the "LP" field:
137-
*
138-
*/
139-
struct mmu_psize_def
140-
{
141-
unsigned int shift; /* number of bits */
142-
int penc[MMU_PAGE_COUNT]; /* HPTE encoding */
143-
unsigned int tlbiel; /* tlbiel supported for that page size */
144-
unsigned long avpnm; /* bits to mask out in AVPN in the HPTE */
145-
unsigned long sllp; /* SLB L||LP (exact mask to use in slbmte) */
146-
};
147-
extern struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT];
148130

149131
static inline int shift_to_mmu_psize(unsigned int shift)
150132
{
@@ -210,11 +192,6 @@ static inline int segment_shift(int ssize)
210192
/*
211193
* The current system page and segment sizes
212194
*/
213-
extern int mmu_linear_psize;
214-
extern int mmu_virtual_psize;
215-
extern int mmu_vmalloc_psize;
216-
extern int mmu_vmemmap_psize;
217-
extern int mmu_io_psize;
218195
extern int mmu_kernel_ssize;
219196
extern int mmu_highuser_ssize;
220197
extern u16 mmu_slb_size;
@@ -512,38 +489,6 @@ static inline void subpage_prot_free(struct mm_struct *mm) {}
512489
static inline void subpage_prot_init_new_context(struct mm_struct *mm) { }
513490
#endif /* CONFIG_PPC_SUBPAGE_PROT */
514491

515-
typedef unsigned long mm_context_id_t;
516-
struct spinlock;
517-
518-
typedef struct {
519-
mm_context_id_t id;
520-
u16 user_psize; /* page size index */
521-
522-
#ifdef CONFIG_PPC_MM_SLICES
523-
u64 low_slices_psize; /* SLB page size encodings */
524-
unsigned char high_slices_psize[SLICE_ARRAY_SIZE];
525-
#else
526-
u16 sllp; /* SLB page size encoding */
527-
#endif
528-
unsigned long vdso_base;
529-
#ifdef CONFIG_PPC_SUBPAGE_PROT
530-
struct subpage_prot_table spt;
531-
#endif /* CONFIG_PPC_SUBPAGE_PROT */
532-
#ifdef CONFIG_PPC_ICSWX
533-
struct spinlock *cop_lockp; /* guard acop and cop_pid */
534-
unsigned long acop; /* mask of enabled coprocessor types */
535-
unsigned int cop_pid; /* pid value used with coprocessors */
536-
#endif /* CONFIG_PPC_ICSWX */
537-
#ifdef CONFIG_PPC_64K_PAGES
538-
/* for 4K PTE fragment support */
539-
void *pte_frag;
540-
#endif
541-
#ifdef CONFIG_SPAPR_TCE_IOMMU
542-
struct list_head iommu_group_mem_list;
543-
#endif
544-
} mm_context_t;
545-
546-
547492
#if 0
548493
/*
549494
* The code below is equivalent to this function for arguments
@@ -613,4 +558,4 @@ unsigned htab_shift_for_mem_size(unsigned long mem_size);
613558

614559
#endif /* __ASSEMBLY__ */
615560

616-
#endif /* _ASM_POWERPC_MMU_HASH64_H_ */
561+
#endif /* _ASM_POWERPC_BOOK3S_64_MMU_HASH_H_ */

‎arch/powerpc/include/asm/book3s/64/mmu.h

Lines changed: 72 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,72 @@
1+
#ifndef _ASM_POWERPC_BOOK3S_64_MMU_H_
2+
#define _ASM_POWERPC_BOOK3S_64_MMU_H_
3+
4+
#ifndef __ASSEMBLY__
5+
/*
6+
* Page size definition
7+
*
8+
* shift : is the "PAGE_SHIFT" value for that page size
9+
* sllp : is a bit mask with the value of SLB L || LP to be or'ed
10+
* directly to a slbmte "vsid" value
11+
* penc : is the HPTE encoding mask for the "LP" field:
12+
*
13+
*/
14+
struct mmu_psize_def {
15+
unsigned int shift; /* number of bits */
16+
int penc[MMU_PAGE_COUNT]; /* HPTE encoding */
17+
unsigned int tlbiel; /* tlbiel supported for that page size */
18+
unsigned long avpnm; /* bits to mask out in AVPN in the HPTE */
19+
unsigned long sllp; /* SLB L||LP (exact mask to use in slbmte) */
20+
};
21+
extern struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT];
22+
#endif /* __ASSEMBLY__ */
23+
24+
#ifdef CONFIG_PPC_STD_MMU_64
25+
/* 64-bit classic hash table MMU */
26+
#include <asm/book3s/64/mmu-hash.h>
27+
#endif
28+
29+
#ifndef __ASSEMBLY__
30+
31+
typedef unsigned long mm_context_id_t;
32+
struct spinlock;
33+
34+
typedef struct {
35+
mm_context_id_t id;
36+
u16 user_psize; /* page size index */
37+
38+
#ifdef CONFIG_PPC_MM_SLICES
39+
u64 low_slices_psize; /* SLB page size encodings */
40+
unsigned char high_slices_psize[SLICE_ARRAY_SIZE];
41+
#else
42+
u16 sllp; /* SLB page size encoding */
43+
#endif
44+
unsigned long vdso_base;
45+
#ifdef CONFIG_PPC_SUBPAGE_PROT
46+
struct subpage_prot_table spt;
47+
#endif /* CONFIG_PPC_SUBPAGE_PROT */
48+
#ifdef CONFIG_PPC_ICSWX
49+
struct spinlock *cop_lockp; /* guard acop and cop_pid */
50+
unsigned long acop; /* mask of enabled coprocessor types */
51+
unsigned int cop_pid; /* pid value used with coprocessors */
52+
#endif /* CONFIG_PPC_ICSWX */
53+
#ifdef CONFIG_PPC_64K_PAGES
54+
/* for 4K PTE fragment support */
55+
void *pte_frag;
56+
#endif
57+
#ifdef CONFIG_SPAPR_TCE_IOMMU
58+
struct list_head iommu_group_mem_list;
59+
#endif
60+
} mm_context_t;
61+
62+
/*
63+
* The current system page and segment sizes
64+
*/
65+
extern int mmu_linear_psize;
66+
extern int mmu_virtual_psize;
67+
extern int mmu_vmalloc_psize;
68+
extern int mmu_vmemmap_psize;
69+
extern int mmu_io_psize;
70+
71+
#endif /* __ASSEMBLY__ */
72+
#endif /* _ASM_POWERPC_BOOK3S_64_MMU_H_ */

‎arch/powerpc/include/asm/mmu.h

Lines changed: 7 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -181,10 +181,13 @@ static inline void assert_pte_locked(struct mm_struct *mm, unsigned long addr)
181181

182182
#define MMU_PAGE_COUNT 15
183183

184-
#if defined(CONFIG_PPC_STD_MMU_64)
185-
/* 64-bit classic hash table MMU */
186-
#include <asm/book3s/64/mmu-hash.h>
187-
#elif defined(CONFIG_PPC_STD_MMU_32)
184+
#ifdef CONFIG_PPC_BOOK3S_64
185+
#include <asm/book3s/64/mmu.h>
186+
#else /* CONFIG_PPC_BOOK3S_64 */
187+
188+
#endif
189+
190+
#if defined(CONFIG_PPC_STD_MMU_32)
188191
/* 32-bit classic hash table MMU */
189192
#include <asm/book3s/32/mmu-hash.h>
190193
#elif defined(CONFIG_40x)

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