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paulusmackmpe
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powerpc/64: Make type of partition table flush depend on partition type
When changing a partition table entry on POWER9, we do a particular form of the tlbie instruction which flushes all TLBs and caches of the partition table for a given logical partition ID (LPID). This instruction has a field in the instruction word, labelled R (radix), which should be 1 if the partition was previously a radix partition and 0 if it was a HPT partition. This implements that logic. Signed-off-by: Paul Mackerras <paulus@ozlabs.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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arch/powerpc/mm/pgtable_64.c

Lines changed: 13 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -454,13 +454,23 @@ void __init mmu_partition_table_init(void)
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void mmu_partition_table_set_entry(unsigned int lpid, unsigned long dw0,
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unsigned long dw1)
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{
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unsigned long old = be64_to_cpu(partition_tb[lpid].patb0);
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partition_tb[lpid].patb0 = cpu_to_be64(dw0);
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partition_tb[lpid].patb1 = cpu_to_be64(dw1);
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/* Global flush of TLBs and partition table caches for this lpid */
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/*
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* Global flush of TLBs and partition table caches for this lpid.
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* The type of flush (hash or radix) depends on what the previous
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* use of this partition ID was, not the new use.
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*/
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asm volatile("ptesync" : : : "memory");
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asm volatile(PPC_TLBIE_5(%0,%1,2,0,0) : :
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"r" (TLBIEL_INVAL_SET_LPID), "r" (lpid));
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if (old & PATB_HR)
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asm volatile(PPC_TLBIE_5(%0,%1,2,0,1) : :
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"r" (TLBIEL_INVAL_SET_LPID), "r" (lpid));
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else
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asm volatile(PPC_TLBIE_5(%0,%1,2,0,0) : :
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"r" (TLBIEL_INVAL_SET_LPID), "r" (lpid));
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asm volatile("eieio; tlbsync; ptesync" : : : "memory");
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}
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EXPORT_SYMBOL_GPL(mmu_partition_table_set_entry);

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