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joergroedeljoergroedel
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x86/amd-iommu: Rename iommu_flush* to domain_flush*
These functions all operate on protection domains and not on singe IOMMUs. Represent that in their name. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
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‎arch/x86/kernel/amd_iommu.c

Lines changed: 44 additions & 43 deletions
Original file line numberDiff line numberDiff line change
@@ -488,22 +488,6 @@ static int iommu_completion_wait(struct amd_iommu *iommu)
488488
return 0;
489489
}
490490

491-
static void iommu_flush_complete(struct protection_domain *domain)
492-
{
493-
int i;
494-
495-
for (i = 0; i < amd_iommus_present; ++i) {
496-
if (!domain->dev_iommu[i])
497-
continue;
498-
499-
/*
500-
* Devices of this domain are behind this IOMMU
501-
* We need to wait for completion of all commands.
502-
*/
503-
iommu_completion_wait(amd_iommus[i]);
504-
}
505-
}
506-
507491
/*
508492
* Command send function for invalidating a device table entry
509493
*/
@@ -526,8 +510,8 @@ static int iommu_flush_device(struct device *dev)
526510
* It invalidates a single PTE if the range to flush is within a single
527511
* page. Otherwise it flushes the whole TLB of the IOMMU.
528512
*/
529-
static void __iommu_flush_pages(struct protection_domain *domain,
530-
u64 address, size_t size, int pde)
513+
static void __domain_flush_pages(struct protection_domain *domain,
514+
u64 address, size_t size, int pde)
531515
{
532516
struct iommu_cmd cmd;
533517
int ret = 0, i;
@@ -548,29 +532,45 @@ static void __iommu_flush_pages(struct protection_domain *domain,
548532
WARN_ON(ret);
549533
}
550534

551-
static void iommu_flush_pages(struct protection_domain *domain,
552-
u64 address, size_t size)
535+
static void domain_flush_pages(struct protection_domain *domain,
536+
u64 address, size_t size)
553537
{
554-
__iommu_flush_pages(domain, address, size, 0);
538+
__domain_flush_pages(domain, address, size, 0);
555539
}
556540

557541
/* Flush the whole IO/TLB for a given protection domain */
558-
static void iommu_flush_tlb(struct protection_domain *domain)
542+
static void domain_flush_tlb(struct protection_domain *domain)
559543
{
560-
__iommu_flush_pages(domain, 0, CMD_INV_IOMMU_ALL_PAGES_ADDRESS, 0);
544+
__domain_flush_pages(domain, 0, CMD_INV_IOMMU_ALL_PAGES_ADDRESS, 0);
561545
}
562546

563547
/* Flush the whole IO/TLB for a given protection domain - including PDE */
564-
static void iommu_flush_tlb_pde(struct protection_domain *domain)
548+
static void domain_flush_tlb_pde(struct protection_domain *domain)
565549
{
566-
__iommu_flush_pages(domain, 0, CMD_INV_IOMMU_ALL_PAGES_ADDRESS, 1);
550+
__domain_flush_pages(domain, 0, CMD_INV_IOMMU_ALL_PAGES_ADDRESS, 1);
551+
}
552+
553+
static void domain_flush_complete(struct protection_domain *domain)
554+
{
555+
int i;
556+
557+
for (i = 0; i < amd_iommus_present; ++i) {
558+
if (!domain->dev_iommu[i])
559+
continue;
560+
561+
/*
562+
* Devices of this domain are behind this IOMMU
563+
* We need to wait for completion of all commands.
564+
*/
565+
iommu_completion_wait(amd_iommus[i]);
566+
}
567567
}
568568

569569

570570
/*
571571
* This function flushes the DTEs for all devices in domain
572572
*/
573-
static void iommu_flush_domain_devices(struct protection_domain *domain)
573+
static void domain_flush_devices(struct protection_domain *domain)
574574
{
575575
struct iommu_dev_data *dev_data;
576576
unsigned long flags;
@@ -591,8 +591,8 @@ static void iommu_flush_all_domain_devices(void)
591591
spin_lock_irqsave(&amd_iommu_pd_lock, flags);
592592

593593
list_for_each_entry(domain, &amd_iommu_pd_list, list) {
594-
iommu_flush_domain_devices(domain);
595-
iommu_flush_complete(domain);
594+
domain_flush_devices(domain);
595+
domain_flush_complete(domain);
596596
}
597597

598598
spin_unlock_irqrestore(&amd_iommu_pd_lock, flags);
@@ -616,8 +616,8 @@ void amd_iommu_flush_all_domains(void)
616616

617617
list_for_each_entry(domain, &amd_iommu_pd_list, list) {
618618
spin_lock(&domain->lock);
619-
iommu_flush_tlb_pde(domain);
620-
iommu_flush_complete(domain);
619+
domain_flush_tlb_pde(domain);
620+
domain_flush_complete(domain);
621621
spin_unlock(&domain->lock);
622622
}
623623

@@ -1480,7 +1480,7 @@ static int attach_device(struct device *dev,
14801480
* left the caches in the IOMMU dirty. So we have to flush
14811481
* here to evict all dirty stuff.
14821482
*/
1483-
iommu_flush_tlb_pde(domain);
1483+
domain_flush_tlb_pde(domain);
14841484

14851485
return ret;
14861486
}
@@ -1693,8 +1693,9 @@ static void update_domain(struct protection_domain *domain)
16931693
return;
16941694

16951695
update_device_table(domain);
1696-
iommu_flush_domain_devices(domain);
1697-
iommu_flush_tlb_pde(domain);
1696+
1697+
domain_flush_devices(domain);
1698+
domain_flush_tlb_pde(domain);
16981699

16991700
domain->updated = false;
17001701
}
@@ -1853,10 +1854,10 @@ static dma_addr_t __map_single(struct device *dev,
18531854
ADD_STATS_COUNTER(alloced_io_mem, size);
18541855

18551856
if (unlikely(dma_dom->need_flush && !amd_iommu_unmap_flush)) {
1856-
iommu_flush_tlb(&dma_dom->domain);
1857+
domain_flush_tlb(&dma_dom->domain);
18571858
dma_dom->need_flush = false;
18581859
} else if (unlikely(amd_iommu_np_cache))
1859-
iommu_flush_pages(&dma_dom->domain, address, size);
1860+
domain_flush_pages(&dma_dom->domain, address, size);
18601861

18611862
out:
18621863
return address;
@@ -1905,7 +1906,7 @@ static void __unmap_single(struct dma_ops_domain *dma_dom,
19051906
dma_ops_free_addresses(dma_dom, dma_addr, pages);
19061907

19071908
if (amd_iommu_unmap_flush || dma_dom->need_flush) {
1908-
iommu_flush_pages(&dma_dom->domain, flush_addr, size);
1909+
domain_flush_pages(&dma_dom->domain, flush_addr, size);
19091910
dma_dom->need_flush = false;
19101911
}
19111912
}
@@ -1941,7 +1942,7 @@ static dma_addr_t map_page(struct device *dev, struct page *page,
19411942
if (addr == DMA_ERROR_CODE)
19421943
goto out;
19431944

1944-
iommu_flush_complete(domain);
1945+
domain_flush_complete(domain);
19451946

19461947
out:
19471948
spin_unlock_irqrestore(&domain->lock, flags);
@@ -1968,7 +1969,7 @@ static void unmap_page(struct device *dev, dma_addr_t dma_addr, size_t size,
19681969

19691970
__unmap_single(domain->priv, dma_addr, size, dir);
19701971

1971-
iommu_flush_complete(domain);
1972+
domain_flush_complete(domain);
19721973

19731974
spin_unlock_irqrestore(&domain->lock, flags);
19741975
}
@@ -2033,7 +2034,7 @@ static int map_sg(struct device *dev, struct scatterlist *sglist,
20332034
goto unmap;
20342035
}
20352036

2036-
iommu_flush_complete(domain);
2037+
domain_flush_complete(domain);
20372038

20382039
out:
20392040
spin_unlock_irqrestore(&domain->lock, flags);
@@ -2079,7 +2080,7 @@ static void unmap_sg(struct device *dev, struct scatterlist *sglist,
20792080
s->dma_address = s->dma_length = 0;
20802081
}
20812082

2082-
iommu_flush_complete(domain);
2083+
domain_flush_complete(domain);
20832084

20842085
spin_unlock_irqrestore(&domain->lock, flags);
20852086
}
@@ -2129,7 +2130,7 @@ static void *alloc_coherent(struct device *dev, size_t size,
21292130
goto out_free;
21302131
}
21312132

2132-
iommu_flush_complete(domain);
2133+
domain_flush_complete(domain);
21332134

21342135
spin_unlock_irqrestore(&domain->lock, flags);
21352136

@@ -2161,7 +2162,7 @@ static void free_coherent(struct device *dev, size_t size,
21612162

21622163
__unmap_single(domain->priv, dma_addr, size, DMA_BIDIRECTIONAL);
21632164

2164-
iommu_flush_complete(domain);
2165+
domain_flush_complete(domain);
21652166

21662167
spin_unlock_irqrestore(&domain->lock, flags);
21672168

@@ -2471,7 +2472,7 @@ static int amd_iommu_unmap(struct iommu_domain *dom, unsigned long iova,
24712472
unmap_size = iommu_unmap_page(domain, iova, page_size);
24722473
mutex_unlock(&domain->api_lock);
24732474

2474-
iommu_flush_tlb_pde(domain);
2475+
domain_flush_tlb_pde(domain);
24752476

24762477
return get_order(unmap_size);
24772478
}

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