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Ulrich Hechthorms
Ulrich Hecht
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horms
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arm64: dts: r8a7796: Add all SCIF nodes
Add the device nodes for all R-Car H3 SCIF serial ports, incl. clocks and power domain. Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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‎arch/arm64/boot/dts/renesas/r8a7796.dtsi

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Original file line numberDiff line numberDiff line change
@@ -559,6 +559,32 @@
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status = "disabled";
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};
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scif0: serial@e6e60000 {
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compatible = "renesas,scif-r8a7796",
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"renesas,rcar-gen3-scif", "renesas,scif";
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reg = <0 0xe6e60000 0 64>;
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interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 207>,
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<&cpg CPG_CORE R8A7796_CLK_S3D1>,
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<&scif_clk>;
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clock-names = "fck", "brg_int", "scif_clk";
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power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
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status = "disabled";
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};
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scif1: serial@e6e68000 {
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compatible = "renesas,scif-r8a7796",
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"renesas,rcar-gen3-scif", "renesas,scif";
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reg = <0 0xe6e68000 0 64>;
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interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 206>,
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<&cpg CPG_CORE R8A7796_CLK_S3D1>,
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<&scif_clk>;
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clock-names = "fck", "brg_int", "scif_clk";
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power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
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status = "disabled";
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};
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scif2: serial@e6e88000 {
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compatible = "renesas,scif-r8a7796",
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"renesas,rcar-gen3-scif", "renesas,scif";
@@ -572,6 +598,45 @@
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status = "disabled";
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};
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scif3: serial@e6c50000 {
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compatible = "renesas,scif-r8a7796",
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"renesas,rcar-gen3-scif", "renesas,scif";
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reg = <0 0xe6c50000 0 64>;
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interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 204>,
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<&cpg CPG_CORE R8A7796_CLK_S3D1>,
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<&scif_clk>;
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clock-names = "fck", "brg_int", "scif_clk";
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power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
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status = "disabled";
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};
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scif4: serial@e6c40000 {
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compatible = "renesas,scif-r8a7796",
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"renesas,rcar-gen3-scif", "renesas,scif";
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reg = <0 0xe6c40000 0 64>;
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interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 203>,
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<&cpg CPG_CORE R8A7796_CLK_S3D1>,
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<&scif_clk>;
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clock-names = "fck", "brg_int", "scif_clk";
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power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
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status = "disabled";
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};
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scif5: serial@e6f30000 {
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compatible = "renesas,scif-r8a7796",
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"renesas,rcar-gen3-scif", "renesas,scif";
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reg = <0 0xe6f30000 0 64>;
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interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 202>,
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<&cpg CPG_CORE R8A7796_CLK_S3D1>,
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<&scif_clk>;
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clock-names = "fck", "brg_int", "scif_clk";
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power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
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status = "disabled";
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};
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msiof0: spi@e6e90000 {
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compatible = "renesas,msiof-r8a7796",
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"renesas,rcar-gen3-msiof";

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