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rayagonddavem330
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stmmac: use predefined macros for HW cap register fields (V4)
Signed-off-by: Rayagond Kokatanur <rayagond@vayavyalabs.com> Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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2 files changed

+63
-21
lines changed

2 files changed

+63
-21
lines changed

drivers/net/ethernet/stmicro/stmmac/common.h

Lines changed: 30 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -103,6 +103,36 @@ struct stmmac_extra_stats {
103103

104104
#define SF_DMA_MODE 1 /* DMA STORE-AND-FORWARD Operation Mode */
105105

106+
/* DAM HW feature register fields */
107+
#define DMA_HW_FEAT_MIISEL 0x00000001 /* 10/100 Mbps Support */
108+
#define DMA_HW_FEAT_GMIISEL 0x00000002 /* 1000 Mbps Support */
109+
#define DMA_HW_FEAT_HDSEL 0x00000004 /* Half-Duplex Support */
110+
#define DMA_HW_FEAT_EXTHASHEN 0x00000008 /* Expanded DA Hash Filter */
111+
#define DMA_HW_FEAT_HASHSEL 0x00000010 /* HASH Filter */
112+
#define DMA_HW_FEAT_ADDMACADRSEL 0x00000020 /* Multiple MAC Addr Reg */
113+
#define DMA_HW_FEAT_PCSSEL 0x00000040 /* PCS registers */
114+
#define DMA_HW_FEAT_L3L4FLTREN 0x00000080 /* Layer 3 & Layer 4 Feature */
115+
#define DMA_HW_FEAT_SMASEL 0x00000100 /* SMA(MDIO) Interface */
116+
#define DMA_HW_FEAT_RWKSEL 0x00000200 /* PMT Remote Wakeup */
117+
#define DMA_HW_FEAT_MGKSEL 0x00000400 /* PMT Magic Packet */
118+
#define DMA_HW_FEAT_MMCSEL 0x00000800 /* RMON Module */
119+
#define DMA_HW_FEAT_TSVER1SEL 0x00001000 /* Only IEEE 1588-2002 Timestamp */
120+
#define DMA_HW_FEAT_TSVER2SEL 0x00002000 /* IEEE 1588-2008 Adv Timestamp */
121+
#define DMA_HW_FEAT_EEESEL 0x00004000 /* Energy Efficient Ethernet */
122+
#define DMA_HW_FEAT_AVSEL 0x00008000 /* AV Feature */
123+
#define DMA_HW_FEAT_TXCOESEL 0x00010000 /* Checksum Offload in Tx */
124+
#define DMA_HW_FEAT_RXTYP1COE 0x00020000 /* IP csum Offload(Type 1) in Rx */
125+
#define DMA_HW_FEAT_RXTYP2COE 0x00040000 /* IP csum Offload(Type 2) in Rx */
126+
#define DMA_HW_FEAT_RXFIFOSIZE 0x00080000 /* Rx FIFO > 2048 Bytes */
127+
#define DMA_HW_FEAT_RXCHCNT 0x00300000 /* No. of additional Rx Channels */
128+
#define DMA_HW_FEAT_TXCHCNT 0x00c00000 /* No. of additional Tx Channels */
129+
#define DMA_HW_FEAT_ENHDESSEL 0x01000000 /* Alternate (Enhanced Descriptor) */
130+
#define DMA_HW_FEAT_INTTSEN 0x02000000 /* Timestamping with Internal
131+
System Time */
132+
#define DMA_HW_FEAT_FLEXIPPSEN 0x04000000 /* Flexible PPS Output */
133+
#define DMA_HW_FEAT_SAVLANINS 0x08000000 /* Source Addr or VLAN Insertion */
134+
#define DMA_HW_FEAT_ACTPHYIF 0x70000000 /* Active/selected PHY interface */
135+
106136
enum rx_frame_status { /* IPC status */
107137
good_frame = 0,
108138
discard_frame = 1,

drivers/net/ethernet/stmicro/stmmac/stmmac_main.c

Lines changed: 33 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -799,33 +799,45 @@ static int stmmac_get_hw_features(struct stmmac_priv *priv)
799799
u32 hw_cap = priv->hw->dma->get_hw_feature(priv->ioaddr);
800800

801801
if (likely(hw_cap)) {
802-
priv->dma_cap.mbps_10_100 = (hw_cap & 0x1);
803-
priv->dma_cap.mbps_1000 = (hw_cap & 0x2) >> 1;
804-
priv->dma_cap.half_duplex = (hw_cap & 0x4) >> 2;
805-
priv->dma_cap.hash_filter = (hw_cap & 0x10) >> 4;
806-
priv->dma_cap.multi_addr = (hw_cap & 0x20) >> 5;
807-
priv->dma_cap.pcs = (hw_cap & 0x40) >> 6;
808-
priv->dma_cap.sma_mdio = (hw_cap & 0x100) >> 8;
809-
priv->dma_cap.pmt_remote_wake_up = (hw_cap & 0x200) >> 9;
810-
priv->dma_cap.pmt_magic_frame = (hw_cap & 0x400) >> 10;
811-
priv->dma_cap.rmon = (hw_cap & 0x800) >> 11; /* MMC */
802+
priv->dma_cap.mbps_10_100 = (hw_cap & DMA_HW_FEAT_MIISEL);
803+
priv->dma_cap.mbps_1000 = (hw_cap & DMA_HW_FEAT_GMIISEL) >> 1;
804+
priv->dma_cap.half_duplex = (hw_cap & DMA_HW_FEAT_HDSEL) >> 2;
805+
priv->dma_cap.hash_filter = (hw_cap & DMA_HW_FEAT_HASHSEL) >> 4;
806+
priv->dma_cap.multi_addr =
807+
(hw_cap & DMA_HW_FEAT_ADDMACADRSEL) >> 5;
808+
priv->dma_cap.pcs = (hw_cap & DMA_HW_FEAT_PCSSEL) >> 6;
809+
priv->dma_cap.sma_mdio = (hw_cap & DMA_HW_FEAT_SMASEL) >> 8;
810+
priv->dma_cap.pmt_remote_wake_up =
811+
(hw_cap & DMA_HW_FEAT_RWKSEL) >> 9;
812+
priv->dma_cap.pmt_magic_frame =
813+
(hw_cap & DMA_HW_FEAT_MGKSEL) >> 10;
814+
/*MMC*/
815+
priv->dma_cap.rmon = (hw_cap & DMA_HW_FEAT_MMCSEL) >> 11;
812816
/* IEEE 1588-2002*/
813-
priv->dma_cap.time_stamp = (hw_cap & 0x1000) >> 12;
817+
priv->dma_cap.time_stamp =
818+
(hw_cap & DMA_HW_FEAT_TSVER1SEL) >> 12;
814819
/* IEEE 1588-2008*/
815-
priv->dma_cap.atime_stamp = (hw_cap & 0x2000) >> 13;
820+
priv->dma_cap.atime_stamp =
821+
(hw_cap & DMA_HW_FEAT_TSVER2SEL) >> 13;
816822
/* 802.3az - Energy-Efficient Ethernet (EEE) */
817-
priv->dma_cap.eee = (hw_cap & 0x4000) >> 14;
818-
priv->dma_cap.av = (hw_cap & 0x8000) >> 15;
823+
priv->dma_cap.eee = (hw_cap & DMA_HW_FEAT_EEESEL) >> 14;
824+
priv->dma_cap.av = (hw_cap & DMA_HW_FEAT_AVSEL) >> 15;
819825
/* TX and RX csum */
820-
priv->dma_cap.tx_coe = (hw_cap & 0x10000) >> 16;
821-
priv->dma_cap.rx_coe_type1 = (hw_cap & 0x20000) >> 17;
822-
priv->dma_cap.rx_coe_type2 = (hw_cap & 0x40000) >> 18;
823-
priv->dma_cap.rxfifo_over_2048 = (hw_cap & 0x80000) >> 19;
826+
priv->dma_cap.tx_coe = (hw_cap & DMA_HW_FEAT_TXCOESEL) >> 16;
827+
priv->dma_cap.rx_coe_type1 =
828+
(hw_cap & DMA_HW_FEAT_RXTYP1COE) >> 17;
829+
priv->dma_cap.rx_coe_type2 =
830+
(hw_cap & DMA_HW_FEAT_RXTYP2COE) >> 18;
831+
priv->dma_cap.rxfifo_over_2048 =
832+
(hw_cap & DMA_HW_FEAT_RXFIFOSIZE) >> 19;
824833
/* TX and RX number of channels */
825-
priv->dma_cap.number_rx_channel = (hw_cap & 0x300000) >> 20;
826-
priv->dma_cap.number_tx_channel = (hw_cap & 0xc00000) >> 22;
834+
priv->dma_cap.number_rx_channel =
835+
(hw_cap & DMA_HW_FEAT_RXCHCNT) >> 20;
836+
priv->dma_cap.number_tx_channel =
837+
(hw_cap & DMA_HW_FEAT_TXCHCNT) >> 22;
827838
/* Alternate (enhanced) DESC mode*/
828-
priv->dma_cap.enh_desc = (hw_cap & 0x1000000) >> 24;
839+
priv->dma_cap.enh_desc =
840+
(hw_cap & DMA_HW_FEAT_ENHDESSEL) >> 24;
829841

830842
} else
831843
pr_debug("\tNo HW DMA feature register supported");

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