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| 1 | +/* |
| 2 | + * Copyright (C) 2016 Google, Inc |
| 3 | + * |
| 4 | + * This program is free software; you can redistribute it and/or modify it |
| 5 | + * under the terms of the GNU General Public License version 2, as published by |
| 6 | + * the Free Software Foundation. |
| 7 | + * |
| 8 | + * Expose a PWM controlled by the ChromeOS EC to the host processor. |
| 9 | + */ |
| 10 | + |
| 11 | +#include <linux/module.h> |
| 12 | +#include <linux/mfd/cros_ec.h> |
| 13 | +#include <linux/mfd/cros_ec_commands.h> |
| 14 | +#include <linux/platform_device.h> |
| 15 | +#include <linux/pwm.h> |
| 16 | +#include <linux/slab.h> |
| 17 | + |
| 18 | +/** |
| 19 | + * struct cros_ec_pwm_device - Driver data for EC PWM |
| 20 | + * |
| 21 | + * @dev: Device node |
| 22 | + * @ec: Pointer to EC device |
| 23 | + * @chip: PWM controller chip |
| 24 | + */ |
| 25 | +struct cros_ec_pwm_device { |
| 26 | + struct device *dev; |
| 27 | + struct cros_ec_device *ec; |
| 28 | + struct pwm_chip chip; |
| 29 | +}; |
| 30 | + |
| 31 | +static inline struct cros_ec_pwm_device *pwm_to_cros_ec_pwm(struct pwm_chip *c) |
| 32 | +{ |
| 33 | + return container_of(c, struct cros_ec_pwm_device, chip); |
| 34 | +} |
| 35 | + |
| 36 | +static int cros_ec_pwm_set_duty(struct cros_ec_device *ec, u8 index, u16 duty) |
| 37 | +{ |
| 38 | + struct { |
| 39 | + struct cros_ec_command msg; |
| 40 | + struct ec_params_pwm_set_duty params; |
| 41 | + } buf; |
| 42 | + struct ec_params_pwm_set_duty *params = &buf.params; |
| 43 | + struct cros_ec_command *msg = &buf.msg; |
| 44 | + |
| 45 | + memset(&buf, 0, sizeof(buf)); |
| 46 | + |
| 47 | + msg->version = 0; |
| 48 | + msg->command = EC_CMD_PWM_SET_DUTY; |
| 49 | + msg->insize = 0; |
| 50 | + msg->outsize = sizeof(*params); |
| 51 | + |
| 52 | + params->duty = duty; |
| 53 | + params->pwm_type = EC_PWM_TYPE_GENERIC; |
| 54 | + params->index = index; |
| 55 | + |
| 56 | + return cros_ec_cmd_xfer_status(ec, msg); |
| 57 | +} |
| 58 | + |
| 59 | +static int __cros_ec_pwm_get_duty(struct cros_ec_device *ec, u8 index, |
| 60 | + u32 *result) |
| 61 | +{ |
| 62 | + struct { |
| 63 | + struct cros_ec_command msg; |
| 64 | + union { |
| 65 | + struct ec_params_pwm_get_duty params; |
| 66 | + struct ec_response_pwm_get_duty resp; |
| 67 | + }; |
| 68 | + } buf; |
| 69 | + struct ec_params_pwm_get_duty *params = &buf.params; |
| 70 | + struct ec_response_pwm_get_duty *resp = &buf.resp; |
| 71 | + struct cros_ec_command *msg = &buf.msg; |
| 72 | + int ret; |
| 73 | + |
| 74 | + memset(&buf, 0, sizeof(buf)); |
| 75 | + |
| 76 | + msg->version = 0; |
| 77 | + msg->command = EC_CMD_PWM_GET_DUTY; |
| 78 | + msg->insize = sizeof(*params); |
| 79 | + msg->outsize = sizeof(*resp); |
| 80 | + |
| 81 | + params->pwm_type = EC_PWM_TYPE_GENERIC; |
| 82 | + params->index = index; |
| 83 | + |
| 84 | + ret = cros_ec_cmd_xfer_status(ec, msg); |
| 85 | + if (result) |
| 86 | + *result = msg->result; |
| 87 | + if (ret < 0) |
| 88 | + return ret; |
| 89 | + |
| 90 | + return resp->duty; |
| 91 | +} |
| 92 | + |
| 93 | +static int cros_ec_pwm_get_duty(struct cros_ec_device *ec, u8 index) |
| 94 | +{ |
| 95 | + return __cros_ec_pwm_get_duty(ec, index, NULL); |
| 96 | +} |
| 97 | + |
| 98 | +static int cros_ec_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, |
| 99 | + struct pwm_state *state) |
| 100 | +{ |
| 101 | + struct cros_ec_pwm_device *ec_pwm = pwm_to_cros_ec_pwm(chip); |
| 102 | + int duty_cycle; |
| 103 | + |
| 104 | + /* The EC won't let us change the period */ |
| 105 | + if (state->period != EC_PWM_MAX_DUTY) |
| 106 | + return -EINVAL; |
| 107 | + |
| 108 | + /* |
| 109 | + * EC doesn't separate the concept of duty cycle and enabled, but |
| 110 | + * kernel does. Translate. |
| 111 | + */ |
| 112 | + duty_cycle = state->enabled ? state->duty_cycle : 0; |
| 113 | + |
| 114 | + return cros_ec_pwm_set_duty(ec_pwm->ec, pwm->hwpwm, duty_cycle); |
| 115 | +} |
| 116 | + |
| 117 | +static void cros_ec_pwm_get_state(struct pwm_chip *chip, struct pwm_device *pwm, |
| 118 | + struct pwm_state *state) |
| 119 | +{ |
| 120 | + struct cros_ec_pwm_device *ec_pwm = pwm_to_cros_ec_pwm(chip); |
| 121 | + int ret; |
| 122 | + |
| 123 | + ret = cros_ec_pwm_get_duty(ec_pwm->ec, pwm->hwpwm); |
| 124 | + if (ret < 0) { |
| 125 | + dev_err(chip->dev, "error getting initial duty: %d\n", ret); |
| 126 | + return; |
| 127 | + } |
| 128 | + |
| 129 | + state->enabled = (ret > 0); |
| 130 | + state->period = EC_PWM_MAX_DUTY; |
| 131 | + |
| 132 | + /* Note that "disabled" and "duty cycle == 0" are treated the same */ |
| 133 | + state->duty_cycle = ret; |
| 134 | +} |
| 135 | + |
| 136 | +static struct pwm_device * |
| 137 | +cros_ec_pwm_xlate(struct pwm_chip *pc, const struct of_phandle_args *args) |
| 138 | +{ |
| 139 | + struct pwm_device *pwm; |
| 140 | + |
| 141 | + if (args->args[0] >= pc->npwm) |
| 142 | + return ERR_PTR(-EINVAL); |
| 143 | + |
| 144 | + pwm = pwm_request_from_chip(pc, args->args[0], NULL); |
| 145 | + if (IS_ERR(pwm)) |
| 146 | + return pwm; |
| 147 | + |
| 148 | + /* The EC won't let us change the period */ |
| 149 | + pwm->args.period = EC_PWM_MAX_DUTY; |
| 150 | + |
| 151 | + return pwm; |
| 152 | +} |
| 153 | + |
| 154 | +static const struct pwm_ops cros_ec_pwm_ops = { |
| 155 | + .get_state = cros_ec_pwm_get_state, |
| 156 | + .apply = cros_ec_pwm_apply, |
| 157 | + .owner = THIS_MODULE, |
| 158 | +}; |
| 159 | + |
| 160 | +static int cros_ec_num_pwms(struct cros_ec_device *ec) |
| 161 | +{ |
| 162 | + int i, ret; |
| 163 | + |
| 164 | + /* The index field is only 8 bits */ |
| 165 | + for (i = 0; i <= U8_MAX; i++) { |
| 166 | + u32 result = 0; |
| 167 | + |
| 168 | + ret = __cros_ec_pwm_get_duty(ec, i, &result); |
| 169 | + /* We want to parse EC protocol errors */ |
| 170 | + if (ret < 0 && !(ret == -EPROTO && result)) |
| 171 | + return ret; |
| 172 | + |
| 173 | + /* |
| 174 | + * We look for SUCCESS, INVALID_COMMAND, or INVALID_PARAM |
| 175 | + * responses; everything else is treated as an error. |
| 176 | + */ |
| 177 | + if (result == EC_RES_INVALID_COMMAND) |
| 178 | + return -ENODEV; |
| 179 | + else if (result == EC_RES_INVALID_PARAM) |
| 180 | + return i; |
| 181 | + else if (result) |
| 182 | + return -EPROTO; |
| 183 | + } |
| 184 | + |
| 185 | + return U8_MAX; |
| 186 | +} |
| 187 | + |
| 188 | +static int cros_ec_pwm_probe(struct platform_device *pdev) |
| 189 | +{ |
| 190 | + struct cros_ec_device *ec = dev_get_drvdata(pdev->dev.parent); |
| 191 | + struct device *dev = &pdev->dev; |
| 192 | + struct cros_ec_pwm_device *ec_pwm; |
| 193 | + struct pwm_chip *chip; |
| 194 | + int ret; |
| 195 | + |
| 196 | + if (!ec) { |
| 197 | + dev_err(dev, "no parent EC device\n"); |
| 198 | + return -EINVAL; |
| 199 | + } |
| 200 | + |
| 201 | + ec_pwm = devm_kzalloc(dev, sizeof(*ec_pwm), GFP_KERNEL); |
| 202 | + if (!ec_pwm) |
| 203 | + return -ENOMEM; |
| 204 | + chip = &ec_pwm->chip; |
| 205 | + ec_pwm->ec = ec; |
| 206 | + |
| 207 | + /* PWM chip */ |
| 208 | + chip->dev = dev; |
| 209 | + chip->ops = &cros_ec_pwm_ops; |
| 210 | + chip->of_xlate = cros_ec_pwm_xlate; |
| 211 | + chip->of_pwm_n_cells = 1; |
| 212 | + chip->base = -1; |
| 213 | + ret = cros_ec_num_pwms(ec); |
| 214 | + if (ret < 0) { |
| 215 | + dev_err(dev, "Couldn't find PWMs: %d\n", ret); |
| 216 | + return ret; |
| 217 | + } |
| 218 | + chip->npwm = ret; |
| 219 | + dev_dbg(dev, "Probed %u PWMs\n", chip->npwm); |
| 220 | + |
| 221 | + ret = pwmchip_add(chip); |
| 222 | + if (ret < 0) { |
| 223 | + dev_err(dev, "cannot register PWM: %d\n", ret); |
| 224 | + return ret; |
| 225 | + } |
| 226 | + |
| 227 | + platform_set_drvdata(pdev, ec_pwm); |
| 228 | + |
| 229 | + return ret; |
| 230 | +} |
| 231 | + |
| 232 | +static int cros_ec_pwm_remove(struct platform_device *dev) |
| 233 | +{ |
| 234 | + struct cros_ec_pwm_device *ec_pwm = platform_get_drvdata(dev); |
| 235 | + struct pwm_chip *chip = &ec_pwm->chip; |
| 236 | + |
| 237 | + return pwmchip_remove(chip); |
| 238 | +} |
| 239 | + |
| 240 | +#ifdef CONFIG_OF |
| 241 | +static const struct of_device_id cros_ec_pwm_of_match[] = { |
| 242 | + { .compatible = "google,cros-ec-pwm" }, |
| 243 | + {}, |
| 244 | +}; |
| 245 | +MODULE_DEVICE_TABLE(of, cros_ec_pwm_of_match); |
| 246 | +#endif |
| 247 | + |
| 248 | +static struct platform_driver cros_ec_pwm_driver = { |
| 249 | + .probe = cros_ec_pwm_probe, |
| 250 | + .remove = cros_ec_pwm_remove, |
| 251 | + .driver = { |
| 252 | + .name = "cros-ec-pwm", |
| 253 | + .of_match_table = of_match_ptr(cros_ec_pwm_of_match), |
| 254 | + }, |
| 255 | +}; |
| 256 | +module_platform_driver(cros_ec_pwm_driver); |
| 257 | + |
| 258 | +MODULE_ALIAS("platform:cros-ec-pwm"); |
| 259 | +MODULE_DESCRIPTION("ChromeOS EC PWM driver"); |
| 260 | +MODULE_LICENSE("GPL v2"); |
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