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Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm
Pull KVM updates from Paolo Bonzini: - ARM: GICv3 ITS emulation and various fixes. Removal of the old VGIC implementation. - s390: support for trapping software breakpoints, nested virtualization (vSIE), the STHYI opcode, initial extensions for CPU model support. - MIPS: support for MIPS64 hosts (32-bit guests only) and lots of cleanups, preliminary to this and the upcoming support for hardware virtualization extensions. - x86: support for execute-only mappings in nested EPT; reduced vmexit latency for TSC deadline timer (by about 30%) on Intel hosts; support for more than 255 vCPUs. - PPC: bugfixes. * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (302 commits) KVM: PPC: Introduce KVM_CAP_PPC_HTM MIPS: Select HAVE_KVM for MIPS64_R{2,6} MIPS: KVM: Reset CP0_PageMask during host TLB flush MIPS: KVM: Fix ptr->int cast via KVM_GUEST_KSEGX() MIPS: KVM: Sign extend MFC0/RDHWR results MIPS: KVM: Fix 64-bit big endian dynamic translation MIPS: KVM: Fail if ebase doesn't fit in CP0_EBase MIPS: KVM: Use 64-bit CP0_EBase when appropriate MIPS: KVM: Set CP0_Status.KX on MIPS64 MIPS: KVM: Make entry code MIPS64 friendly MIPS: KVM: Use kmap instead of CKSEG0ADDR() MIPS: KVM: Use virt_to_phys() to get commpage PFN MIPS: Fix definition of KSEGX() for 64-bit KVM: VMX: Add VMCS to CPU's loaded VMCSs before VMPTRLD kvm: x86: nVMX: maintain internal copy of current VMCS KVM: PPC: Book3S HV: Save/restore TM state in H_CEDE KVM: PPC: Book3S HV: Pull out TM state save/restore into separate procedures KVM: arm64: vgic-its: Simplify MAPI error handling KVM: arm64: vgic-its: Make vgic_its_cmd_handle_mapi similar to other handlers KVM: arm64: vgic-its: Turn device_id validation into generic ID validation ...
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Documentation/virtual/kvm/api.txt

Lines changed: 79 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1482,6 +1482,11 @@ struct kvm_irq_routing_msi {
14821482
__u32 pad;
14831483
};
14841484

1485+
On x86, address_hi is ignored unless the KVM_X2APIC_API_USE_32BIT_IDS
1486+
feature of KVM_CAP_X2APIC_API capability is enabled. If it is enabled,
1487+
address_hi bits 31-8 provide bits 31-8 of the destination id. Bits 7-0 of
1488+
address_hi must be zero.
1489+
14851490
struct kvm_irq_routing_s390_adapter {
14861491
__u64 ind_addr;
14871492
__u64 summary_addr;
@@ -1583,6 +1588,17 @@ struct kvm_lapic_state {
15831588
Reads the Local APIC registers and copies them into the input argument. The
15841589
data format and layout are the same as documented in the architecture manual.
15851590

1591+
If KVM_X2APIC_API_USE_32BIT_IDS feature of KVM_CAP_X2APIC_API is
1592+
enabled, then the format of APIC_ID register depends on the APIC mode
1593+
(reported by MSR_IA32_APICBASE) of its VCPU. x2APIC stores APIC ID in
1594+
the APIC_ID register (bytes 32-35). xAPIC only allows an 8-bit APIC ID
1595+
which is stored in bits 31-24 of the APIC register, or equivalently in
1596+
byte 35 of struct kvm_lapic_state's regs field. KVM_GET_LAPIC must then
1597+
be called after MSR_IA32_APICBASE has been set with KVM_SET_MSR.
1598+
1599+
If KVM_X2APIC_API_USE_32BIT_IDS feature is disabled, struct kvm_lapic_state
1600+
always uses xAPIC format.
1601+
15861602

15871603
4.58 KVM_SET_LAPIC
15881604

@@ -1600,6 +1616,10 @@ struct kvm_lapic_state {
16001616
Copies the input argument into the Local APIC registers. The data format
16011617
and layout are the same as documented in the architecture manual.
16021618

1619+
The format of the APIC ID register (bytes 32-35 of struct kvm_lapic_state's
1620+
regs field) depends on the state of the KVM_CAP_X2APIC_API capability.
1621+
See the note in KVM_GET_LAPIC.
1622+
16031623

16041624
4.59 KVM_IOEVENTFD
16051625

@@ -2032,6 +2052,12 @@ registers, find a list below:
20322052
MIPS | KVM_REG_MIPS_CP0_CONFIG5 | 32
20332053
MIPS | KVM_REG_MIPS_CP0_CONFIG7 | 32
20342054
MIPS | KVM_REG_MIPS_CP0_ERROREPC | 64
2055+
MIPS | KVM_REG_MIPS_CP0_KSCRATCH1 | 64
2056+
MIPS | KVM_REG_MIPS_CP0_KSCRATCH2 | 64
2057+
MIPS | KVM_REG_MIPS_CP0_KSCRATCH3 | 64
2058+
MIPS | KVM_REG_MIPS_CP0_KSCRATCH4 | 64
2059+
MIPS | KVM_REG_MIPS_CP0_KSCRATCH5 | 64
2060+
MIPS | KVM_REG_MIPS_CP0_KSCRATCH6 | 64
20352061
MIPS | KVM_REG_MIPS_COUNT_CTL | 64
20362062
MIPS | KVM_REG_MIPS_COUNT_RESUME | 64
20372063
MIPS | KVM_REG_MIPS_COUNT_HZ | 64
@@ -2156,7 +2182,7 @@ after pausing the vcpu, but before it is resumed.
21562182
4.71 KVM_SIGNAL_MSI
21572183

21582184
Capability: KVM_CAP_SIGNAL_MSI
2159-
Architectures: x86
2185+
Architectures: x86 arm64
21602186
Type: vm ioctl
21612187
Parameters: struct kvm_msi (in)
21622188
Returns: >0 on delivery, 0 if guest blocked the MSI, and -1 on error
@@ -2169,10 +2195,22 @@ struct kvm_msi {
21692195
__u32 address_hi;
21702196
__u32 data;
21712197
__u32 flags;
2172-
__u8 pad[16];
2198+
__u32 devid;
2199+
__u8 pad[12];
21732200
};
21742201

2175-
No flags are defined so far. The corresponding field must be 0.
2202+
flags: KVM_MSI_VALID_DEVID: devid contains a valid value
2203+
devid: If KVM_MSI_VALID_DEVID is set, contains a unique device identifier
2204+
for the device that wrote the MSI message.
2205+
For PCI, this is usually a BFD identifier in the lower 16 bits.
2206+
2207+
The per-VM KVM_CAP_MSI_DEVID capability advertises the need to provide
2208+
the device ID. If this capability is not set, userland cannot rely on
2209+
the kernel to allow the KVM_MSI_VALID_DEVID flag being set.
2210+
2211+
On x86, address_hi is ignored unless the KVM_CAP_X2APIC_API capability is
2212+
enabled. If it is enabled, address_hi bits 31-8 provide bits 31-8 of the
2213+
destination id. Bits 7-0 of address_hi must be zero.
21762214

21772215

21782216
4.71 KVM_CREATE_PIT2
@@ -2520,6 +2558,7 @@ Parameters: struct kvm_device_attr
25202558
Returns: 0 on success, -1 on error
25212559
Errors:
25222560
ENXIO: The group or attribute is unknown/unsupported for this device
2561+
or hardware support is missing.
25232562
EPERM: The attribute cannot (currently) be accessed this way
25242563
(e.g. read-only attribute, or attribute that only makes
25252564
sense when the device is in a different state)
@@ -2547,6 +2586,7 @@ Parameters: struct kvm_device_attr
25472586
Returns: 0 on success, -1 on error
25482587
Errors:
25492588
ENXIO: The group or attribute is unknown/unsupported for this device
2589+
or hardware support is missing.
25502590

25512591
Tests whether a device supports a particular attribute. A successful
25522592
return indicates the attribute is implemented. It does not necessarily
@@ -3803,6 +3843,42 @@ Allows use of runtime-instrumentation introduced with zEC12 processor.
38033843
Will return -EINVAL if the machine does not support runtime-instrumentation.
38043844
Will return -EBUSY if a VCPU has already been created.
38053845

3846+
7.7 KVM_CAP_X2APIC_API
3847+
3848+
Architectures: x86
3849+
Parameters: args[0] - features that should be enabled
3850+
Returns: 0 on success, -EINVAL when args[0] contains invalid features
3851+
3852+
Valid feature flags in args[0] are
3853+
3854+
#define KVM_X2APIC_API_USE_32BIT_IDS (1ULL << 0)
3855+
#define KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK (1ULL << 1)
3856+
3857+
Enabling KVM_X2APIC_API_USE_32BIT_IDS changes the behavior of
3858+
KVM_SET_GSI_ROUTING, KVM_SIGNAL_MSI, KVM_SET_LAPIC, and KVM_GET_LAPIC,
3859+
allowing the use of 32-bit APIC IDs. See KVM_CAP_X2APIC_API in their
3860+
respective sections.
3861+
3862+
KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK must be enabled for x2APIC to work
3863+
in logical mode or with more than 255 VCPUs. Otherwise, KVM treats 0xff
3864+
as a broadcast even in x2APIC mode in order to support physical x2APIC
3865+
without interrupt remapping. This is undesirable in logical mode,
3866+
where 0xff represents CPUs 0-7 in cluster 0.
3867+
3868+
7.8 KVM_CAP_S390_USER_INSTR0
3869+
3870+
Architectures: s390
3871+
Parameters: none
3872+
3873+
With this capability enabled, all illegal instructions 0x0000 (2 bytes) will
3874+
be intercepted and forwarded to user space. User space can use this
3875+
mechanism e.g. to realize 2-byte software breakpoints. The kernel will
3876+
not inject an operating exception for these instructions, user space has
3877+
to take care of that.
3878+
3879+
This capability can be enabled dynamically even if VCPUs were already
3880+
created and are running.
3881+
38063882
8. Other capabilities.
38073883
----------------------
38083884

Documentation/virtual/kvm/devices/arm-vgic.txt

Lines changed: 19 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -4,16 +4,22 @@ ARM Virtual Generic Interrupt Controller (VGIC)
44
Device types supported:
55
KVM_DEV_TYPE_ARM_VGIC_V2 ARM Generic Interrupt Controller v2.0
66
KVM_DEV_TYPE_ARM_VGIC_V3 ARM Generic Interrupt Controller v3.0
7+
KVM_DEV_TYPE_ARM_VGIC_ITS ARM Interrupt Translation Service Controller
78

8-
Only one VGIC instance may be instantiated through either this API or the
9-
legacy KVM_CREATE_IRQCHIP api. The created VGIC will act as the VM interrupt
10-
controller, requiring emulated user-space devices to inject interrupts to the
11-
VGIC instead of directly to CPUs.
9+
Only one VGIC instance of the V2/V3 types above may be instantiated through
10+
either this API or the legacy KVM_CREATE_IRQCHIP api. The created VGIC will
11+
act as the VM interrupt controller, requiring emulated user-space devices to
12+
inject interrupts to the VGIC instead of directly to CPUs.
1213

1314
Creating a guest GICv3 device requires a host GICv3 as well.
1415
GICv3 implementations with hardware compatibility support allow a guest GICv2
1516
as well.
1617

18+
Creating a virtual ITS controller requires a host GICv3 (but does not depend
19+
on having physical ITS controllers).
20+
There can be multiple ITS controllers per guest, each of them has to have
21+
a separate, non-overlapping MMIO region.
22+
1723
Groups:
1824
KVM_DEV_ARM_VGIC_GRP_ADDR
1925
Attributes:
@@ -39,6 +45,13 @@ Groups:
3945
Only valid for KVM_DEV_TYPE_ARM_VGIC_V3.
4046
This address needs to be 64K aligned.
4147

48+
KVM_VGIC_V3_ADDR_TYPE_ITS (rw, 64-bit)
49+
Base address in the guest physical address space of the GICv3 ITS
50+
control register frame. The ITS allows MSI(-X) interrupts to be
51+
injected into guests. This extension is optional. If the kernel
52+
does not support the ITS, the call returns -ENODEV.
53+
Only valid for KVM_DEV_TYPE_ARM_VGIC_ITS.
54+
This address needs to be 64K aligned and the region covers 128K.
4255

4356
KVM_DEV_ARM_VGIC_GRP_DIST_REGS
4457
Attributes:
@@ -109,8 +122,8 @@ Groups:
109122
KVM_DEV_ARM_VGIC_GRP_CTRL
110123
Attributes:
111124
KVM_DEV_ARM_VGIC_CTRL_INIT
112-
request the initialization of the VGIC, no additional parameter in
113-
kvm_device_attr.addr.
125+
request the initialization of the VGIC or ITS, no additional parameter
126+
in kvm_device_attr.addr.
114127
Errors:
115128
-ENXIO: VGIC not properly configured as required prior to calling
116129
this attribute

Documentation/virtual/kvm/devices/vm.txt

Lines changed: 86 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -20,7 +20,8 @@ Enables Collaborative Memory Management Assist (CMMA) for the virtual machine.
2020

2121
1.2. ATTRIBUTE: KVM_S390_VM_MEM_CLR_CMMA
2222
Parameters: none
23-
Returns: 0
23+
Returns: -EINVAL if CMMA was not enabled
24+
0 otherwise
2425

2526
Clear the CMMA status for all guest pages, so any pages the guest marked
2627
as unused are again used any may not be reclaimed by the host.
@@ -85,6 +86,90 @@ Returns: -EBUSY in case 1 or more vcpus are already activated (only in write
8586
-ENOMEM if not enough memory is available to process the ioctl
8687
0 in case of success
8788

89+
2.3. ATTRIBUTE: KVM_S390_VM_CPU_MACHINE_FEAT (r/o)
90+
91+
Allows user space to retrieve available cpu features. A feature is available if
92+
provided by the hardware and supported by kvm. In theory, cpu features could
93+
even be completely emulated by kvm.
94+
95+
struct kvm_s390_vm_cpu_feat {
96+
__u64 feat[16]; # Bitmap (1 = feature available), MSB 0 bit numbering
97+
};
98+
99+
Parameters: address of a buffer to load the feature list from.
100+
Returns: -EFAULT if the given address is not accessible from kernel space.
101+
0 in case of success.
102+
103+
2.4. ATTRIBUTE: KVM_S390_VM_CPU_PROCESSOR_FEAT (r/w)
104+
105+
Allows user space to retrieve or change enabled cpu features for all VCPUs of a
106+
VM. Features that are not available cannot be enabled.
107+
108+
See 2.3. for a description of the parameter struct.
109+
110+
Parameters: address of a buffer to store/load the feature list from.
111+
Returns: -EFAULT if the given address is not accessible from kernel space.
112+
-EINVAL if a cpu feature that is not available is to be enabled.
113+
-EBUSY if at least one VCPU has already been defined.
114+
0 in case of success.
115+
116+
2.5. ATTRIBUTE: KVM_S390_VM_CPU_MACHINE_SUBFUNC (r/o)
117+
118+
Allows user space to retrieve available cpu subfunctions without any filtering
119+
done by a set IBC. These subfunctions are indicated to the guest VCPU via
120+
query or "test bit" subfunctions and used e.g. by cpacf functions, plo and ptff.
121+
122+
A subfunction block is only valid if KVM_S390_VM_CPU_MACHINE contains the
123+
STFL(E) bit introducing the affected instruction. If the affected instruction
124+
indicates subfunctions via a "query subfunction", the response block is
125+
contained in the returned struct. If the affected instruction
126+
indicates subfunctions via a "test bit" mechanism, the subfunction codes are
127+
contained in the returned struct in MSB 0 bit numbering.
128+
129+
struct kvm_s390_vm_cpu_subfunc {
130+
u8 plo[32]; # always valid (ESA/390 feature)
131+
u8 ptff[16]; # valid with TOD-clock steering
132+
u8 kmac[16]; # valid with Message-Security-Assist
133+
u8 kmc[16]; # valid with Message-Security-Assist
134+
u8 km[16]; # valid with Message-Security-Assist
135+
u8 kimd[16]; # valid with Message-Security-Assist
136+
u8 klmd[16]; # valid with Message-Security-Assist
137+
u8 pckmo[16]; # valid with Message-Security-Assist-Extension 3
138+
u8 kmctr[16]; # valid with Message-Security-Assist-Extension 4
139+
u8 kmf[16]; # valid with Message-Security-Assist-Extension 4
140+
u8 kmo[16]; # valid with Message-Security-Assist-Extension 4
141+
u8 pcc[16]; # valid with Message-Security-Assist-Extension 4
142+
u8 ppno[16]; # valid with Message-Security-Assist-Extension 5
143+
u8 reserved[1824]; # reserved for future instructions
144+
};
145+
146+
Parameters: address of a buffer to load the subfunction blocks from.
147+
Returns: -EFAULT if the given address is not accessible from kernel space.
148+
0 in case of success.
149+
150+
2.6. ATTRIBUTE: KVM_S390_VM_CPU_PROCESSOR_SUBFUNC (r/w)
151+
152+
Allows user space to retrieve or change cpu subfunctions to be indicated for
153+
all VCPUs of a VM. This attribute will only be available if kernel and
154+
hardware support are in place.
155+
156+
The kernel uses the configured subfunction blocks for indication to
157+
the guest. A subfunction block will only be used if the associated STFL(E) bit
158+
has not been disabled by user space (so the instruction to be queried is
159+
actually available for the guest).
160+
161+
As long as no data has been written, a read will fail. The IBC will be used
162+
to determine available subfunctions in this case, this will guarantee backward
163+
compatibility.
164+
165+
See 2.5. for a description of the parameter struct.
166+
167+
Parameters: address of a buffer to store/load the subfunction blocks from.
168+
Returns: -EFAULT if the given address is not accessible from kernel space.
169+
-EINVAL when reading, if there was no write yet.
170+
-EBUSY if at least one VCPU has already been defined.
171+
0 in case of success.
172+
88173
3. GROUP: KVM_S390_VM_TOD
89174
Architectures: s390
90175

Documentation/virtual/kvm/locking.txt

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -89,7 +89,7 @@ In mmu_spte_clear_track_bits():
8989
old_spte = *spte;
9090

9191
/* 'if' condition is satisfied. */
92-
if (old_spte.Accssed == 1 &&
92+
if (old_spte.Accessed == 1 &&
9393
old_spte.W == 0)
9494
spte = 0ull;
9595
on fast page fault path:
@@ -102,7 +102,7 @@ In mmu_spte_clear_track_bits():
102102
old_spte = xchg(spte, 0ull)
103103

104104

105-
if (old_spte.Accssed == 1)
105+
if (old_spte.Accessed == 1)
106106
kvm_set_pfn_accessed(spte.pfn);
107107
if (old_spte.Dirty == 1)
108108
kvm_set_pfn_dirty(spte.pfn);

arch/arm/include/asm/kvm_asm.h

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -66,6 +66,8 @@ extern void __kvm_tlb_flush_vmid(struct kvm *kvm);
6666
extern int __kvm_vcpu_run(struct kvm_vcpu *vcpu);
6767

6868
extern void __init_stage2_translation(void);
69+
70+
extern void __kvm_hyp_reset(unsigned long);
6971
#endif
7072

7173
#endif /* __ARM_KVM_ASM_H__ */

arch/arm/include/asm/kvm_host.h

Lines changed: 9 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -241,8 +241,7 @@ int kvm_arm_coproc_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *);
241241
int handle_exit(struct kvm_vcpu *vcpu, struct kvm_run *run,
242242
int exception_index);
243243

244-
static inline void __cpu_init_hyp_mode(phys_addr_t boot_pgd_ptr,
245-
phys_addr_t pgd_ptr,
244+
static inline void __cpu_init_hyp_mode(phys_addr_t pgd_ptr,
246245
unsigned long hyp_stack_ptr,
247246
unsigned long vector_ptr)
248247
{
@@ -251,18 +250,13 @@ static inline void __cpu_init_hyp_mode(phys_addr_t boot_pgd_ptr,
251250
* code. The init code doesn't need to preserve these
252251
* registers as r0-r3 are already callee saved according to
253252
* the AAPCS.
254-
* Note that we slightly misuse the prototype by casing the
253+
* Note that we slightly misuse the prototype by casting the
255254
* stack pointer to a void *.
256-
*
257-
* We don't have enough registers to perform the full init in
258-
* one go. Install the boot PGD first, and then install the
259-
* runtime PGD, stack pointer and vectors. The PGDs are always
260-
* passed as the third argument, in order to be passed into
261-
* r2-r3 to the init code (yes, this is compliant with the
262-
* PCS!).
263-
*/
264255
265-
kvm_call_hyp(NULL, 0, boot_pgd_ptr);
256+
* The PGDs are always passed as the third argument, in order
257+
* to be passed into r2-r3 to the init code (yes, this is
258+
* compliant with the PCS!).
259+
*/
266260

267261
kvm_call_hyp((void*)hyp_stack_ptr, vector_ptr, pgd_ptr);
268262
}
@@ -272,16 +266,13 @@ static inline void __cpu_init_stage2(void)
272266
kvm_call_hyp(__init_stage2_translation);
273267
}
274268

275-
static inline void __cpu_reset_hyp_mode(phys_addr_t boot_pgd_ptr,
269+
static inline void __cpu_reset_hyp_mode(unsigned long vector_ptr,
276270
phys_addr_t phys_idmap_start)
277271
{
278-
/*
279-
* TODO
280-
* kvm_call_reset(boot_pgd_ptr, phys_idmap_start);
281-
*/
272+
kvm_call_hyp((void *)virt_to_idmap(__kvm_hyp_reset), vector_ptr);
282273
}
283274

284-
static inline int kvm_arch_dev_ioctl_check_extension(long ext)
275+
static inline int kvm_arch_dev_ioctl_check_extension(struct kvm *kvm, long ext)
285276
{
286277
return 0;
287278
}

arch/arm/include/asm/kvm_hyp.h

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -25,9 +25,6 @@
2525

2626
#define __hyp_text __section(.hyp.text) notrace
2727

28-
#define kern_hyp_va(v) (v)
29-
#define hyp_kern_va(v) (v)
30-
3128
#define __ACCESS_CP15(CRn, Op1, CRm, Op2) \
3229
"mrc", "mcr", __stringify(p15, Op1, %0, CRn, CRm, Op2), u32
3330
#define __ACCESS_CP15_64(Op1, CRm) \

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