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Marc ZyngierKAGA-KOKO
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irqchip/mvebu-gicp: Use level-triggered MSIs between ICU and GICP
The ICU and GICP drivers are using an ugly side-band mechanism to find out about the "clear" doorbell when using level interrupts. Let's convert it to level-triggered MSIs, which result in a nice cleanup. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Tested-by: Miquel Raynal <miquel.raynal@bootlin.com> Cc: Rob Herring <robh@kernel.org> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Link: https://lkml.kernel.org/r/20180508121438.11301-4-marc.zyngier@arm.com
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-55
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3 files changed

+28
-55
lines changed

drivers/irqchip/irq-mvebu-gicp.c

Lines changed: 11 additions & 27 deletions
Original file line numberDiff line numberDiff line change
@@ -19,8 +19,6 @@
1919

2020
#include <dt-bindings/interrupt-controller/arm-gic.h>
2121

22-
#include "irq-mvebu-gicp.h"
23-
2422
#define GICP_SETSPI_NSR_OFFSET 0x0
2523
#define GICP_CLRSPI_NSR_OFFSET 0x8
2624

@@ -55,34 +53,18 @@ static int gicp_idx_to_spi(struct mvebu_gicp *gicp, int idx)
5553
return -EINVAL;
5654
}
5755

58-
int mvebu_gicp_get_doorbells(struct device_node *dn, phys_addr_t *setspi,
59-
phys_addr_t *clrspi)
60-
{
61-
struct platform_device *pdev;
62-
struct mvebu_gicp *gicp;
63-
64-
pdev = of_find_device_by_node(dn);
65-
if (!pdev)
66-
return -ENODEV;
67-
68-
gicp = platform_get_drvdata(pdev);
69-
if (!gicp)
70-
return -ENODEV;
71-
72-
*setspi = gicp->res->start + GICP_SETSPI_NSR_OFFSET;
73-
*clrspi = gicp->res->start + GICP_CLRSPI_NSR_OFFSET;
74-
75-
return 0;
76-
}
77-
7856
static void gicp_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
7957
{
8058
struct mvebu_gicp *gicp = data->chip_data;
8159
phys_addr_t setspi = gicp->res->start + GICP_SETSPI_NSR_OFFSET;
82-
83-
msg->data = data->hwirq;
84-
msg->address_lo = lower_32_bits(setspi);
85-
msg->address_hi = upper_32_bits(setspi);
60+
phys_addr_t clrspi = gicp->res->start + GICP_CLRSPI_NSR_OFFSET;
61+
62+
msg[0].data = data->hwirq;
63+
msg[0].address_lo = lower_32_bits(setspi);
64+
msg[0].address_hi = upper_32_bits(setspi);
65+
msg[1].data = data->hwirq;
66+
msg[1].address_lo = lower_32_bits(clrspi);
67+
msg[1].address_hi = upper_32_bits(clrspi);
8668
}
8769

8870
static struct irq_chip gicp_irq_chip = {
@@ -170,13 +152,15 @@ static const struct irq_domain_ops gicp_domain_ops = {
170152
static struct irq_chip gicp_msi_irq_chip = {
171153
.name = "GICP",
172154
.irq_set_type = irq_chip_set_type_parent,
155+
.flags = IRQCHIP_SUPPORTS_LEVEL_MSI,
173156
};
174157

175158
static struct msi_domain_ops gicp_msi_ops = {
176159
};
177160

178161
static struct msi_domain_info gicp_msi_domain_info = {
179-
.flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS),
162+
.flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
163+
MSI_FLAG_LEVEL_CAPABLE),
180164
.ops = &gicp_msi_ops,
181165
.chip = &gicp_msi_irq_chip,
182166
};

drivers/irqchip/irq-mvebu-gicp.h

Lines changed: 0 additions & 12 deletions
This file was deleted.

drivers/irqchip/irq-mvebu-icu.c

Lines changed: 17 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -21,8 +21,6 @@
2121

2222
#include <dt-bindings/interrupt-controller/mvebu-icu.h>
2323

24-
#include "irq-mvebu-gicp.h"
25-
2624
/* ICU registers */
2725
#define ICU_SETSPI_NSR_AL 0x10
2826
#define ICU_SETSPI_NSR_AH 0x14
@@ -43,6 +41,7 @@ struct mvebu_icu {
4341
void __iomem *base;
4442
struct irq_domain *domain;
4543
struct device *dev;
44+
atomic_t initialized;
4645
};
4746

4847
struct mvebu_icu_irq_data {
@@ -51,6 +50,18 @@ struct mvebu_icu_irq_data {
5150
unsigned int type;
5251
};
5352

53+
static void mvebu_icu_init(struct mvebu_icu *icu, struct msi_msg *msg)
54+
{
55+
if (atomic_cmpxchg(&icu->initialized, false, true))
56+
return;
57+
58+
/* Set Clear/Set ICU SPI message address in AP */
59+
writel_relaxed(msg[0].address_hi, icu->base + ICU_SETSPI_NSR_AH);
60+
writel_relaxed(msg[0].address_lo, icu->base + ICU_SETSPI_NSR_AL);
61+
writel_relaxed(msg[1].address_hi, icu->base + ICU_CLRSPI_NSR_AH);
62+
writel_relaxed(msg[1].address_lo, icu->base + ICU_CLRSPI_NSR_AL);
63+
}
64+
5465
static void mvebu_icu_write_msg(struct msi_desc *desc, struct msi_msg *msg)
5566
{
5667
struct irq_data *d = irq_get_irq_data(desc->irq);
@@ -59,6 +70,8 @@ static void mvebu_icu_write_msg(struct msi_desc *desc, struct msi_msg *msg)
5970
unsigned int icu_int;
6071

6172
if (msg->address_lo || msg->address_hi) {
73+
/* One off initialization */
74+
mvebu_icu_init(icu, msg);
6275
/* Configure the ICU with irq number & type */
6376
icu_int = msg->data | ICU_INT_ENABLE;
6477
if (icu_irqd->type & IRQ_TYPE_EDGE_RISING)
@@ -197,9 +210,7 @@ static int mvebu_icu_probe(struct platform_device *pdev)
197210
struct device_node *node = pdev->dev.of_node;
198211
struct device_node *gicp_dn;
199212
struct resource *res;
200-
phys_addr_t setspi, clrspi;
201-
u32 i, icu_int;
202-
int ret;
213+
int i;
203214

204215
icu = devm_kzalloc(&pdev->dev, sizeof(struct mvebu_icu),
205216
GFP_KERNEL);
@@ -242,22 +253,12 @@ static int mvebu_icu_probe(struct platform_device *pdev)
242253
if (!gicp_dn)
243254
return -ENODEV;
244255

245-
ret = mvebu_gicp_get_doorbells(gicp_dn, &setspi, &clrspi);
246-
if (ret)
247-
return ret;
248-
249-
/* Set Clear/Set ICU SPI message address in AP */
250-
writel_relaxed(upper_32_bits(setspi), icu->base + ICU_SETSPI_NSR_AH);
251-
writel_relaxed(lower_32_bits(setspi), icu->base + ICU_SETSPI_NSR_AL);
252-
writel_relaxed(upper_32_bits(clrspi), icu->base + ICU_CLRSPI_NSR_AH);
253-
writel_relaxed(lower_32_bits(clrspi), icu->base + ICU_CLRSPI_NSR_AL);
254-
255256
/*
256257
* Clean all ICU interrupts with type SPI_NSR, required to
257258
* avoid unpredictable SPI assignments done by firmware.
258259
*/
259260
for (i = 0 ; i < ICU_MAX_IRQS ; i++) {
260-
icu_int = readl(icu->base + ICU_INT_CFG(i));
261+
u32 icu_int = readl_relaxed(icu->base + ICU_INT_CFG(i));
261262
if ((icu_int >> ICU_GROUP_SHIFT) == ICU_GRP_NSR)
262263
writel_relaxed(0x0, icu->base + ICU_INT_CFG(i));
263264
}

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