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Marc Zyngierwildea01
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irqchip/gic: Restore CPU interface checking
When introducing the whole CPU feature detection framework, we lost the capability to detect a mismatched GIC configuration (using the GICv2 MMIO interface, but having the system register interface enabled). In order to solve this, use the new this_cpu_has_cap() helper. Also move the check to the CPU interface path in order to catch systems where the first CPU has been correctly configured, but the secondaries are not. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
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drivers/irqchip/irq-gic.c

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -55,7 +55,7 @@
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static void gic_check_cpu_features(void)
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{
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WARN_TAINT_ONCE(cpus_have_cap(ARM64_HAS_SYSREG_GIC_CPUIF),
58+
WARN_TAINT_ONCE(this_cpu_has_cap(ARM64_HAS_SYSREG_GIC_CPUIF),
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TAINT_CPU_OUT_OF_SPEC,
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"GICv3 system registers enabled, broken firmware!\n");
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}
@@ -490,6 +490,7 @@ static void gic_cpu_init(struct gic_chip_data *gic)
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* Get what the GIC says our CPU mask is.
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*/
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BUG_ON(cpu >= NR_GIC_CPU_IF);
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gic_check_cpu_features();
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cpu_mask = gic_get_cpumask(gic);
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gic_cpu_map[cpu] = cpu_mask;
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@@ -1021,8 +1022,6 @@ static void __init __gic_init_bases(unsigned int gic_nr, int irq_start,
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BUG_ON(gic_nr >= CONFIG_ARM_GIC_MAX_NR);
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gic_check_cpu_features();
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gic = &gic_data[gic_nr];
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/* Initialize irq_chip */

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