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Merge tag 'renesas-soc-fixes3-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into fixes
Merge "Third Round of Renesas ARM Based SoC Fixes for v3.19" from Simon Horman: * Instantiate GIC from C board code in legacy builds on r8a7790 and r8a73a4 * tag 'renesas-soc-fixes3-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: r8a7790: Instantiate GIC from C board code in legacy builds ARM: shmobile: r8a73a4: Instantiate GIC from C board code in legacy builds Signed-off-by: Olof Johansson <olof@lixom.net>
2 parents eab8d65 + 77cf516 commit 28111dd

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arch/arm/mach-shmobile/board-ape6evm.c

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@@ -18,6 +18,8 @@
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#include <linux/gpio_keys.h>
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#include <linux/input.h>
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#include <linux/interrupt.h>
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#include <linux/irqchip.h>
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#include <linux/irqchip/arm-gic.h>
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#include <linux/kernel.h>
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#include <linux/mfd/tmio.h>
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#include <linux/mmc/host.h>
@@ -273,14 +275,32 @@ static void __init ape6evm_add_standard_devices(void)
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sizeof(ape6evm_leds_pdata));
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}
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static void __init ape6evm_legacy_init_time(void)
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{
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/* Do not invoke DT-based timers via clocksource_of_init() */
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}
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static void __init ape6evm_legacy_init_irq(void)
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{
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void __iomem *gic_dist_base = ioremap_nocache(0xf1001000, 0x1000);
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void __iomem *gic_cpu_base = ioremap_nocache(0xf1002000, 0x1000);
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gic_init(0, 29, gic_dist_base, gic_cpu_base);
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/* Do not invoke DT-based interrupt code via irqchip_init() */
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}
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static const char *ape6evm_boards_compat_dt[] __initdata = {
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"renesas,ape6evm",
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NULL,
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};
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DT_MACHINE_START(APE6EVM_DT, "ape6evm")
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.init_early = shmobile_init_delay,
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.init_irq = ape6evm_legacy_init_irq,
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.init_machine = ape6evm_add_standard_devices,
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.init_late = shmobile_init_late,
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.dt_compat = ape6evm_boards_compat_dt,
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.init_time = ape6evm_legacy_init_time,
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MACHINE_END

arch/arm/mach-shmobile/board-lager.c

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@@ -21,6 +21,8 @@
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#include <linux/input.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/irqchip.h>
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#include <linux/irqchip/arm-gic.h>
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#include <linux/kernel.h>
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#include <linux/leds.h>
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#include <linux/mfd/tmio.h>
@@ -811,6 +813,16 @@ static void __init lager_init(void)
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lager_ksz8041_fixup);
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}
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static void __init lager_legacy_init_irq(void)
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{
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void __iomem *gic_dist_base = ioremap_nocache(0xf1001000, 0x1000);
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void __iomem *gic_cpu_base = ioremap_nocache(0xf1002000, 0x1000);
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gic_init(0, 29, gic_dist_base, gic_cpu_base);
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/* Do not invoke DT-based interrupt code via irqchip_init() */
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}
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static const char * const lager_boards_compat_dt[] __initconst = {
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"renesas,lager",
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NULL,
@@ -819,6 +831,7 @@ static const char * const lager_boards_compat_dt[] __initconst = {
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DT_MACHINE_START(LAGER_DT, "lager")
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.smp = smp_ops(r8a7790_smp_ops),
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.init_early = shmobile_init_delay,
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.init_irq = lager_legacy_init_irq,
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.init_time = rcar_gen2_timer_init,
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.init_machine = lager_init,
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.init_late = shmobile_init_late,

arch/arm/mach-shmobile/setup-rcar-gen2.c

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@@ -133,7 +133,9 @@ void __init rcar_gen2_timer_init(void)
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#ifdef CONFIG_COMMON_CLK
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rcar_gen2_clocks_init(mode);
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#endif
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#ifdef CONFIG_ARCH_SHMOBILE_MULTI
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clocksource_of_init();
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#endif
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}
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struct memory_reserve_config {

arch/arm/mach-shmobile/timer.c

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Original file line numberDiff line numberDiff line change
@@ -70,6 +70,18 @@ void __init shmobile_init_delay(void)
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if (!max_freq)
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return;
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#ifdef CONFIG_ARCH_SHMOBILE_LEGACY
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/* Non-multiplatform r8a73a4 SoC cannot use arch timer due
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* to GIC being initialized from C and arch timer via DT */
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if (of_machine_is_compatible("renesas,r8a73a4"))
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has_arch_timer = false;
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/* Non-multiplatform r8a7790 SoC cannot use arch timer due
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* to GIC being initialized from C and arch timer via DT */
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if (of_machine_is_compatible("renesas,r8a7790"))
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has_arch_timer = false;
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#endif
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if (!has_arch_timer || !IS_ENABLED(CONFIG_ARM_ARCH_TIMER)) {
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if (is_a7_a8_a9)
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shmobile_setup_delay_hz(max_freq, 1, 3);

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