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Merge tag 'gpio-v4.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio
Pull GPIO updates from Linus Walleij: "This is the bulk of GPIO changes for the v4.12 kernel cycle. Core changes: - Return NULL from gpiod_get_optional() when GPIOLIB is disabled. This was a much discussed change. It affects use cases where people write drivers that might or might not be using GPIO resources. I have decided that this is the lesser evil right now. - Make gpiod_count() behave consistently across different hardware descriptions. - Fix the syntax around open drain/open source to not infer active high/low semantics. New drivers: - A new single-register fixed-direction framework driver for hardware that have lines controlled by a single register that just work in one direction (out or in), including IRQ support. - Support the Fintek F71889A GPIO SuperIO controller. - Support the National NI 169445 MMIO GPIO. - Support for the X-Gene derivative of the DWC GPIO controller - Support for the Rohm BD9571MWV-M PMIC GPIO controller. - Refactor the Gemini GPIO driver to a generic Faraday FTGPIO driver and replace both the Gemini and the Moxa ART custom drivers with this driver. Driver improvements: - A whole slew of drivers have their spinlocks chaned to raw spinlocks as they provide irqchips, and thus we are progressing on realtime compliance. - Use devm_irq_alloc_descs() in a slew of drivers, getting managed resources. - Support for the embedded PWM controller inside the MVEBU driver. - Debounce, open source and open drain support for the Aspeed driver. - Misc smaller fixes like spelling and syntax and whatnot" * tag 'gpio-v4.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (77 commits) gpio: f7188x: Add a missing break gpio: omap: return error if requested debounce time is not possible gpio: Add ROHM BD9571MWV-M PMIC GPIO driver gpio: gpio-wcove: fix GPIO IRQ status mask gpio: DT bindings, move tca9554 from pcf857x to pca953x gpio: move tca9554 from pcf857x to pca953x gpio: arizona: Correct check whether the pin is an input gpio: Add XRA1403 DTS binding documentation dt-bindings: add exar to vendor prefixes list gpio: gpio-wcove: fix irq pending status bit width gpio: dwapb: use dwapb_read instead of readl_relaxed gpio: aspeed: Add open-source and open-drain support gpio: aspeed: Add debounce support gpio: aspeed: dt: Add optional clocks property gpio: aspeed: dt: Fix description alignment in bindings document gpio: mvebu: Add limited PWM support gpio: Use unsigned int for interrupt numbers gpio: f7188x: Add F71889A GPIO support. gpio: core: Decouple open drain/source flag with active low/high gpio: arizona: Correct handling for reading input GPIOs ...
2 parents 99a7583 + b86c86a commit 2bd8040

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Documentation/devicetree/bindings/gpio/cortina,gemini-gpio.txt renamed to Documentation/devicetree/bindings/gpio/faraday,ftgpio010.txt

Lines changed: 6 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,11 @@
1-
Cortina Systems Gemini GPIO Controller
1+
Faraday Technology FTGPIO010 GPIO Controller
22

33
Required properties:
44

5-
- compatible : Must be "cortina,gemini-gpio"
5+
- compatible : Should be one of
6+
"cortina,gemini-gpio", "faraday,ftgpio010"
7+
"moxa,moxart-gpio", "faraday,ftgpio010"
8+
"faraday,ftgpio010"
69
- reg : Should contain registers location and length
710
- interrupts : Should contain the interrupt line for the GPIO block
811
- gpio-controller : marks this as a GPIO controller
@@ -14,7 +17,7 @@ Required properties:
1417
Example:
1518

1619
gpio@4d000000 {
17-
compatible = "cortina,gemini-gpio";
20+
compatible = "cortina,gemini-gpio", "faraday,ftgpio010";
1821
reg = <0x4d000000 0x100>;
1922
interrupts = <22 IRQ_TYPE_LEVEL_HIGH>;
2023
gpio-controller;

Documentation/devicetree/bindings/gpio/gpio-aspeed.txt

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -17,7 +17,8 @@ Required properties:
1717

1818
Optional properties:
1919

20-
- interrupt-parent : The parent interrupt controller, optional if inherited
20+
- interrupt-parent : The parent interrupt controller, optional if inherited
21+
- clocks : A phandle to the HPLL clock node for debounce timings
2122

2223
The gpio and interrupt properties are further described in their respective
2324
bindings documentation:

Documentation/devicetree/bindings/gpio/gpio-mvebu.txt

Lines changed: 32 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -38,6 +38,24 @@ Required properties:
3838
- #gpio-cells: Should be two. The first cell is the pin number. The
3939
second cell is reserved for flags, unused at the moment.
4040

41+
Optional properties:
42+
43+
In order to use the GPIO lines in PWM mode, some additional optional
44+
properties are required. Only Armada 370 and XP support these properties.
45+
46+
- compatible: Must contain "marvell,armada-370-xp-gpio"
47+
48+
- reg: an additional register set is needed, for the GPIO Blink
49+
Counter on/off registers.
50+
51+
- reg-names: Must contain an entry "pwm" corresponding to the
52+
additional register range needed for PWM operation.
53+
54+
- #pwm-cells: Should be two. The first cell is the GPIO line number. The
55+
second cell is the period in nanoseconds.
56+
57+
- clocks: Must be a phandle to the clock for the GPIO controller.
58+
4159
Example:
4260

4361
gpio0: gpio@d0018100 {
@@ -51,3 +69,17 @@ Example:
5169
#interrupt-cells = <2>;
5270
interrupts = <16>, <17>, <18>, <19>;
5371
};
72+
73+
gpio1: gpio@18140 {
74+
compatible = "marvell,armada-370-xp-gpio";
75+
reg = <0x18140 0x40>, <0x181c8 0x08>;
76+
reg-names = "gpio", "pwm";
77+
ngpios = <17>;
78+
gpio-controller;
79+
#gpio-cells = <2>;
80+
#pwm-cells = <2>;
81+
interrupt-controller;
82+
#interrupt-cells = <2>;
83+
interrupts = <87>, <88>, <89>;
84+
clocks = <&coreclk 0>;
85+
};

Documentation/devicetree/bindings/gpio/gpio-pca953x.txt

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -26,6 +26,7 @@ Required properties:
2626
ti,tca6416
2727
ti,tca6424
2828
ti,tca9539
29+
ti,tca9554
2930
onsemi,pca9654
3031
exar,xra1202
3132

Documentation/devicetree/bindings/gpio/gpio-pcf857x.txt

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Original file line numberDiff line numberDiff line change
@@ -25,7 +25,6 @@ Required Properties:
2525
- "nxp,pcf8574": For the NXP PCF8574
2626
- "nxp,pcf8574a": For the NXP PCF8574A
2727
- "nxp,pcf8575": For the NXP PCF8575
28-
- "ti,tca9554": For the TI TCA9554
2928

3029
- reg: I2C slave address.
3130

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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,27 @@
1+
Cavium ThunderX/OCTEON-TX GPIO controller bindings
2+
3+
Required Properties:
4+
- reg: The controller bus address.
5+
- gpio-controller: Marks the device node as a GPIO controller.
6+
- #gpio-cells: Must be 2.
7+
- First cell is the GPIO pin number relative to the controller.
8+
- Second cell is a standard generic flag bitfield as described in gpio.txt.
9+
10+
Optional Properties:
11+
- compatible: "cavium,thunder-8890-gpio", unused as PCI driver binding is used.
12+
- interrupt-controller: Marks the device node as an interrupt controller.
13+
- #interrupt-cells: Must be present and have value of 2 if
14+
"interrupt-controller" is present.
15+
- First cell is the GPIO pin number relative to the controller.
16+
- Second cell is triggering flags as defined in interrupts.txt.
17+
18+
Example:
19+
20+
gpio_6_0: gpio@6,0 {
21+
compatible = "cavium,thunder-8890-gpio";
22+
reg = <0x3000 0 0 0 0>; /* DEVFN = 0x30 (6:0) */
23+
gpio-controller;
24+
#gpio-cells = <2>;
25+
interrupt-controller;
26+
#interrupt-cells = <2>;
27+
};
Lines changed: 46 additions & 0 deletions
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@@ -0,0 +1,46 @@
1+
GPIO Driver for XRA1403 16-BIT GPIO Expander With Reset Input from EXAR
2+
3+
The XRA1403 is an 16-bit GPIO expander with an SPI interface. Features available:
4+
- Individually programmable inputs:
5+
- Internal pull-up resistors
6+
- Polarity inversion
7+
- Individual interrupt enable
8+
- Rising edge and/or Falling edge interrupt
9+
- Input filter
10+
- Individually programmable outputs
11+
- Output Level Control
12+
- Output Three-State Control
13+
14+
Properties
15+
----------
16+
Check documentation for SPI and GPIO controllers regarding properties needed to configure the node.
17+
18+
- compatible = "exar,xra1403".
19+
- reg - SPI id of the device.
20+
- gpio-controller - marks the node as gpio.
21+
- #gpio-cells - should be two where the first cell is the pin number
22+
and the second one is used for optional parameters.
23+
24+
Optional properties:
25+
-------------------
26+
- reset-gpios: in case available used to control the device reset line.
27+
- interrupt-controller - marks the node as interrupt controller.
28+
- #interrupt-cells - should be two and represents the number of cells
29+
needed to encode interrupt source.
30+
31+
Example
32+
--------
33+
34+
gpioxra0: gpio@2 {
35+
compatible = "exar,xra1403";
36+
reg = <2>;
37+
38+
gpio-controller;
39+
#gpio-cells = <2>;
40+
41+
interrupt-controller;
42+
#interrupt-cells = <2>;
43+
44+
reset-gpios = <&gpio3 6 GPIO_ACTIVE_LOW>;
45+
spi-max-frequency = <1000000>;
46+
};

Documentation/devicetree/bindings/gpio/moxa,moxart-gpio.txt

Lines changed: 0 additions & 19 deletions
This file was deleted.
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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,38 @@
1+
Bindings for the National Instruments 169445 GPIO NAND controller
2+
3+
The 169445 GPIO NAND controller has two memory mapped GPIO registers, one
4+
for input (the ready signal) and one for output (control signals). It is
5+
intended to be used with the GPIO NAND driver.
6+
7+
Required properties:
8+
- compatible: should be "ni,169445-nand-gpio"
9+
- reg-names: must contain
10+
"dat" - data register
11+
- reg: address + size pairs describing the GPIO register sets;
12+
order must correspond with the order of entries in reg-names
13+
- #gpio-cells: must be set to 2. The first cell is the pin number and
14+
the second cell is used to specify the gpio polarity:
15+
0 = active high
16+
1 = active low
17+
- gpio-controller: Marks the device node as a gpio controller.
18+
19+
Optional properties:
20+
- no-output: disables driving output on the pins
21+
22+
Examples:
23+
gpio1: nand-gpio-out@1f300010 {
24+
compatible = "ni,169445-nand-gpio";
25+
reg = <0x1f300010 0x4>;
26+
reg-names = "dat";
27+
gpio-controller;
28+
#gpio-cells = <2>;
29+
};
30+
31+
gpio2: nand-gpio-in@1f300014 {
32+
compatible = "ni,169445-nand-gpio";
33+
reg = <0x1f300014 0x4>;
34+
reg-names = "dat";
35+
gpio-controller;
36+
#gpio-cells = <2>;
37+
no-output;
38+
};

Documentation/devicetree/bindings/vendor-prefixes.txt

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -103,6 +103,7 @@ ettus NI Ettus Research
103103
eukrea Eukréa Electromatique
104104
everest Everest Semiconductor Co. Ltd.
105105
everspin Everspin Technologies, Inc.
106+
exar Exar Corporation
106107
excito Excito
107108
ezchip EZchip Semiconductor
108109
faraday Faraday Technology Corporation

Documentation/gpio/consumer.txt

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -70,6 +70,12 @@ instead of -ENOENT if no GPIO has been assigned to the requested function:
7070
unsigned int index,
7171
enum gpiod_flags flags)
7272

73+
Note that gpio_get*_optional() functions (and their managed variants), unlike
74+
the rest of gpiolib API, also return NULL when gpiolib support is disabled.
75+
This is helpful to driver authors, since they do not need to special case
76+
-ENOSYS return codes. System integrators should however be careful to enable
77+
gpiolib on systems that need it.
78+
7379
For a function using multiple GPIOs all of those can be obtained with one call:
7480

7581
struct gpio_descs *gpiod_get_array(struct device *dev,

MAINTAINERS

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -10315,6 +10315,8 @@ F: include/linux/pwm.h
1031510315
F: drivers/pwm/
1031610316
F: drivers/video/backlight/pwm_bl.c
1031710317
F: include/linux/pwm_backlight.h
10318+
F: drivers/gpio/gpio-mvebu.c
10319+
F: Documentation/devicetree/bindings/gpio/gpio-mvebu.txt
1031810320

1031910321
PXA2xx/PXA3xx SUPPORT
1032010322
M: Daniel Mack <daniel@zonque.org>

drivers/gpio/Kconfig

Lines changed: 28 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -204,14 +204,15 @@ config GPIO_GE_FPGA
204204
and write pin state) for GPIO implemented in a number of GE single
205205
board computers.
206206

207-
config GPIO_GEMINI
208-
bool "Gemini GPIO"
209-
depends on ARCH_GEMINI
207+
config GPIO_FTGPIO010
208+
bool "Faraday FTGPIO010 GPIO"
210209
depends on OF_GPIO
211210
select GPIO_GENERIC
212211
select GPIOLIB_IRQCHIP
212+
default (ARCH_GEMINI || ARCH_MOXART)
213213
help
214-
Support for common GPIOs found in Cortina systems Gemini platforms.
214+
Support for common GPIOs from the Faraday FTGPIO010 IP core, found in
215+
Cortina systems Gemini platforms, Moxa ART and others.
215216

216217
config GPIO_GENERIC_PLATFORM
217218
tristate "Generic memory-mapped GPIO controller support (MMIO platform device)"
@@ -308,14 +309,6 @@ config GPIO_MOCKUP
308309
tools/testing/selftests/gpio/gpio-mockup.sh. Reference the usage in
309310
it.
310311

311-
config GPIO_MOXART
312-
bool "MOXART GPIO support"
313-
depends on ARCH_MOXART || COMPILE_TEST
314-
select GPIO_GENERIC
315-
help
316-
Select this option to enable GPIO driver for
317-
MOXA ART SoC devices.
318-
319312
config GPIO_MPC5200
320313
def_bool y
321314
depends on PPC_MPC52xx
@@ -387,6 +380,12 @@ config GPIO_RCAR
387380
help
388381
Say yes here to support GPIO on Renesas R-Car SoCs.
389382

383+
config GPIO_REG
384+
bool
385+
help
386+
A 32-bit single register GPIO fixed in/out implementation. This
387+
can be used to represent any register as a set of GPIO signals.
388+
390389
config GPIO_SPEAR_SPICS
391390
bool "ST SPEAr13xx SPI Chip Select as GPIO support"
392391
depends on PLAT_SPEAR
@@ -505,7 +504,7 @@ config GPIO_XILINX
505504

506505
config GPIO_XLP
507506
tristate "Netlogic XLP GPIO support"
508-
depends on OF_GPIO && (CPU_XLP || ARCH_VULCAN || COMPILE_TEST)
507+
depends on OF_GPIO && (CPU_XLP || ARCH_VULCAN || ARCH_THUNDER2 || COMPILE_TEST)
509508
select GPIOLIB_IRQCHIP
510509
help
511510
This driver provides support for GPIO interface on Netlogic XLP MIPS64
@@ -557,7 +556,7 @@ menu "Port-mapped I/O GPIO drivers"
557556

558557
config GPIO_104_DIO_48E
559558
tristate "ACCES 104-DIO-48E GPIO support"
560-
depends on ISA_BUS_API
559+
depends on PC104 && ISA_BUS_API
561560
select GPIOLIB_IRQCHIP
562561
help
563562
Enables GPIO support for the ACCES 104-DIO-48E series (104-DIO-48E,
@@ -567,7 +566,7 @@ config GPIO_104_DIO_48E
567566

568567
config GPIO_104_IDIO_16
569568
tristate "ACCES 104-IDIO-16 GPIO support"
570-
depends on ISA_BUS_API
569+
depends on PC104 && ISA_BUS_API
571570
select GPIOLIB_IRQCHIP
572571
help
573572
Enables GPIO support for the ACCES 104-IDIO-16 family (104-IDIO-16,
@@ -578,7 +577,7 @@ config GPIO_104_IDIO_16
578577

579578
config GPIO_104_IDI_48
580579
tristate "ACCES 104-IDI-48 GPIO support"
581-
depends on ISA_BUS_API
580+
depends on PC104 && ISA_BUS_API
582581
select GPIOLIB_IRQCHIP
583582
help
584583
Enables GPIO support for the ACCES 104-IDI-48 family (104-IDI-48A,
@@ -598,7 +597,7 @@ config GPIO_F7188X
598597

599598
config GPIO_GPIO_MM
600599
tristate "Diamond Systems GPIO-MM GPIO support"
601-
depends on ISA_BUS_API
600+
depends on PC104 && ISA_BUS_API
602601
help
603602
Enables GPIO support for the Diamond Systems GPIO-MM and GPIO-MM-12.
604603

@@ -753,7 +752,7 @@ config GPIO_PCA953X
753752
4 bits: pca9536, pca9537
754753

755754
8 bits: max7310, max7315, pca6107, pca9534, pca9538, pca9554,
756-
pca9556, pca9557, pca9574, tca6408, xra1202
755+
pca9556, pca9557, pca9574, tca6408, tca9554, xra1202
757756

758757
16 bits: max7312, max7313, pca9535, pca9539, pca9555, pca9575,
759758
tca6416
@@ -845,6 +844,17 @@ config GPIO_ARIZONA
845844
help
846845
Support for GPIOs on Wolfson Arizona class devices.
847846

847+
config GPIO_BD9571MWV
848+
tristate "ROHM BD9571 GPIO support"
849+
depends on MFD_BD9571MWV
850+
help
851+
Support for GPIOs on ROHM BD9571 PMIC. There are two GPIOs
852+
available on the ROHM PMIC in total, both of which can also
853+
generate interrupts.
854+
855+
This driver can also be built as a module. If so, the module
856+
will be called gpio-bd9571mwv.
857+
848858
config GPIO_CRYSTAL_COVE
849859
tristate "GPIO support for Crystal Cove PMIC"
850860
depends on (X86 || COMPILE_TEST) && INTEL_SOC_PMIC

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