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torvaldstorvalds
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Merge tag 'arc-5.0-final' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc
Pull ARC fixes from Vineet Gupta: "Fixes for ARC for 5.0, bunch of those are stable fodder anyways so sooner the better. - Fix memcpy to prevent prefetchw beyond end of buffer [Eugeniy] - Enable unaligned access early to prevent exceptions given newer gcc code gen [Eugeniy] - Tighten up uboot arg checking to prevent false negatives and also allow both jtag and bootloading to coexist w/o config option as needed by kernelCi folks [Eugeniy] - Set slab alignment to 8 for ARC to avoid the atomic64_t unalign [Alexey] - Disable regfile auto save on interrupts on HSDK platform due to a silicon issue [Vineet] - Avoid HS38x boot printing crash by not reading HS48x only reg [Vineet]" * tag 'arc-5.0-final' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc: ARCv2: don't assume core 0x54 has dual issue ARC: define ARCH_SLAB_MINALIGN = 8 ARC: enable uboot support unconditionally ARC: U-boot: check arguments paranoidly ARCv2: support manual regfile save on interrupts ARC: uacces: remove lp_start, lp_end from clobber list ARC: fix actionpoints configuration detection ARCv2: lib: memcpy: fix doing prefetchw outside of buffer ARCv2: Enable unaligned access in early ASM code
2 parents 8456e98 + 7b2e932 commit 2cc63b3

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-73
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14 files changed

+188
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lines changed

‎arch/arc/Kconfig

Lines changed: 8 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -191,7 +191,6 @@ config NR_CPUS
191191

192192
config ARC_SMP_HALT_ON_RESET
193193
bool "Enable Halt-on-reset boot mode"
194-
default y if ARC_UBOOT_SUPPORT
195194
help
196195
In SMP configuration cores can be configured as Halt-on-reset
197196
or they could all start at same time. For Halt-on-reset, non
@@ -407,6 +406,14 @@ config ARC_HAS_ACCL_REGS
407406
(also referred to as r58:r59). These can also be used by gcc as GPR so
408407
kernel needs to save/restore per process
409408

409+
config ARC_IRQ_NO_AUTOSAVE
410+
bool "Disable hardware autosave regfile on interrupts"
411+
default n
412+
help
413+
On HS cores, taken interrupt auto saves the regfile on stack.
414+
This is programmable and can be optionally disabled in which case
415+
software INTERRUPT_PROLOGUE/EPILGUE do the needed work
416+
410417
endif # ISA_ARCV2
411418

412419
endmenu # "ARC CPU Configuration"
@@ -515,17 +522,6 @@ config ARC_DBG_TLB_PARANOIA
515522

516523
endif
517524

518-
config ARC_UBOOT_SUPPORT
519-
bool "Support uboot arg Handling"
520-
help
521-
ARC Linux by default checks for uboot provided args as pointers to
522-
external cmdline or DTB. This however breaks in absence of uboot,
523-
when booting from Metaware debugger directly, as the registers are
524-
not zeroed out on reset by mdb and/or ARCv2 based cores. The bogus
525-
registers look like uboot args to kernel which then chokes.
526-
So only enable the uboot arg checking/processing if users are sure
527-
of uboot being in play.
528-
529525
config ARC_BUILTIN_DTB_NAME
530526
string "Built in DTB"
531527
help

‎arch/arc/configs/nps_defconfig

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -31,7 +31,6 @@ CONFIG_ARC_CACHE_LINE_SHIFT=5
3131
# CONFIG_ARC_HAS_LLSC is not set
3232
CONFIG_ARC_KVADDR_SIZE=402
3333
CONFIG_ARC_EMUL_UNALIGNED=y
34-
CONFIG_ARC_UBOOT_SUPPORT=y
3534
CONFIG_PREEMPT=y
3635
CONFIG_NET=y
3736
CONFIG_UNIX=y

‎arch/arc/configs/vdk_hs38_defconfig

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -13,7 +13,6 @@ CONFIG_PARTITION_ADVANCED=y
1313
CONFIG_ARC_PLAT_AXS10X=y
1414
CONFIG_AXS103=y
1515
CONFIG_ISA_ARCV2=y
16-
CONFIG_ARC_UBOOT_SUPPORT=y
1716
CONFIG_ARC_BUILTIN_DTB_NAME="vdk_hs38"
1817
CONFIG_PREEMPT=y
1918
CONFIG_NET=y

‎arch/arc/configs/vdk_hs38_smp_defconfig

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -15,8 +15,6 @@ CONFIG_AXS103=y
1515
CONFIG_ISA_ARCV2=y
1616
CONFIG_SMP=y
1717
# CONFIG_ARC_TIMERS_64BIT is not set
18-
# CONFIG_ARC_SMP_HALT_ON_RESET is not set
19-
CONFIG_ARC_UBOOT_SUPPORT=y
2018
CONFIG_ARC_BUILTIN_DTB_NAME="vdk_hs38_smp"
2119
CONFIG_PREEMPT=y
2220
CONFIG_NET=y

‎arch/arc/include/asm/arcregs.h

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -151,6 +151,14 @@ struct bcr_isa_arcv2 {
151151
#endif
152152
};
153153

154+
struct bcr_uarch_build_arcv2 {
155+
#ifdef CONFIG_CPU_BIG_ENDIAN
156+
unsigned int pad:8, prod:8, maj:8, min:8;
157+
#else
158+
unsigned int min:8, maj:8, prod:8, pad:8;
159+
#endif
160+
};
161+
154162
struct bcr_mpy {
155163
#ifdef CONFIG_CPU_BIG_ENDIAN
156164
unsigned int pad:8, x1616:8, dsp:4, cycles:2, type:2, ver:8;

‎arch/arc/include/asm/cache.h

Lines changed: 11 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -52,6 +52,17 @@
5252
#define cache_line_size() SMP_CACHE_BYTES
5353
#define ARCH_DMA_MINALIGN SMP_CACHE_BYTES
5454

55+
/*
56+
* Make sure slab-allocated buffers are 64-bit aligned when atomic64_t uses
57+
* ARCv2 64-bit atomics (LLOCKD/SCONDD). This guarantess runtime 64-bit
58+
* alignment for any atomic64_t embedded in buffer.
59+
* Default ARCH_SLAB_MINALIGN is __alignof__(long long) which has a relaxed
60+
* value of 4 (and not 8) in ARC ABI.
61+
*/
62+
#if defined(CONFIG_ARC_HAS_LL64) && defined(CONFIG_ARC_HAS_LLSC)
63+
#define ARCH_SLAB_MINALIGN 8
64+
#endif
65+
5566
extern void arc_cache_init(void);
5667
extern char *arc_cache_mumbojumbo(int cpu_id, char *buf, int len);
5768
extern void read_decode_cache_bcr(void);

‎arch/arc/include/asm/entry-arcv2.h

Lines changed: 54 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -17,6 +17,33 @@
1717
;
1818
; Now manually save: r12, sp, fp, gp, r25
1919

20+
#ifdef CONFIG_ARC_IRQ_NO_AUTOSAVE
21+
.ifnc \called_from, exception
22+
st.as r9, [sp, -10] ; save r9 in it's final stack slot
23+
sub sp, sp, 12 ; skip JLI, LDI, EI
24+
25+
PUSH lp_count
26+
PUSHAX lp_start
27+
PUSHAX lp_end
28+
PUSH blink
29+
30+
PUSH r11
31+
PUSH r10
32+
33+
sub sp, sp, 4 ; skip r9
34+
35+
PUSH r8
36+
PUSH r7
37+
PUSH r6
38+
PUSH r5
39+
PUSH r4
40+
PUSH r3
41+
PUSH r2
42+
PUSH r1
43+
PUSH r0
44+
.endif
45+
#endif
46+
2047
#ifdef CONFIG_ARC_HAS_ACCL_REGS
2148
PUSH r59
2249
PUSH r58
@@ -86,6 +113,33 @@
86113
POP r59
87114
#endif
88115

116+
#ifdef CONFIG_ARC_IRQ_NO_AUTOSAVE
117+
.ifnc \called_from, exception
118+
POP r0
119+
POP r1
120+
POP r2
121+
POP r3
122+
POP r4
123+
POP r5
124+
POP r6
125+
POP r7
126+
POP r8
127+
POP r9
128+
POP r10
129+
POP r11
130+
131+
POP blink
132+
POPAX lp_end
133+
POPAX lp_start
134+
135+
POP r9
136+
mov lp_count, r9
137+
138+
add sp, sp, 12 ; skip JLI, LDI, EI
139+
ld.as r9, [sp, -10] ; reload r9 which got clobbered
140+
.endif
141+
#endif
142+
89143
.endm
90144

91145
/*------------------------------------------------------------------------*/

‎arch/arc/include/asm/uaccess.h

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -207,7 +207,7 @@ raw_copy_from_user(void *to, const void __user *from, unsigned long n)
207207
*/
208208
"=&r" (tmp), "+r" (to), "+r" (from)
209209
:
210-
: "lp_count", "lp_start", "lp_end", "memory");
210+
: "lp_count", "memory");
211211

212212
return n;
213213
}
@@ -433,7 +433,7 @@ raw_copy_to_user(void __user *to, const void *from, unsigned long n)
433433
*/
434434
"=&r" (tmp), "+r" (to), "+r" (from)
435435
:
436-
: "lp_count", "lp_start", "lp_end", "memory");
436+
: "lp_count", "memory");
437437

438438
return n;
439439
}
@@ -653,7 +653,7 @@ static inline unsigned long __arc_clear_user(void __user *to, unsigned long n)
653653
" .previous \n"
654654
: "+r"(d_char), "+r"(res)
655655
: "i"(0)
656-
: "lp_count", "lp_start", "lp_end", "memory");
656+
: "lp_count", "memory");
657657

658658
return res;
659659
}
@@ -686,7 +686,7 @@ __arc_strncpy_from_user(char *dst, const char __user *src, long count)
686686
" .previous \n"
687687
: "+r"(res), "+r"(dst), "+r"(src), "=r"(val)
688688
: "g"(-EFAULT), "r"(count)
689-
: "lp_count", "lp_start", "lp_end", "memory");
689+
: "lp_count", "memory");
690690

691691
return res;
692692
}

‎arch/arc/kernel/entry-arcv2.S

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -209,7 +209,9 @@ restore_regs:
209209
;####### Return from Intr #######
210210

211211
debug_marker_l1:
212-
bbit1.nt r0, STATUS_DE_BIT, .Lintr_ret_to_delay_slot
212+
; bbit1.nt r0, STATUS_DE_BIT, .Lintr_ret_to_delay_slot
213+
btst r0, STATUS_DE_BIT ; Z flag set if bit clear
214+
bnz .Lintr_ret_to_delay_slot ; branch if STATUS_DE_BIT set
213215

214216
.Lisr_ret_fast_path:
215217
; Handle special case #1: (Entry via Exception, Return via IRQ)

‎arch/arc/kernel/head.S

Lines changed: 12 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -17,6 +17,7 @@
1717
#include <asm/entry.h>
1818
#include <asm/arcregs.h>
1919
#include <asm/cache.h>
20+
#include <asm/irqflags.h>
2021

2122
.macro CPU_EARLY_SETUP
2223

@@ -47,6 +48,15 @@
4748
sr r5, [ARC_REG_DC_CTRL]
4849

4950
1:
51+
52+
#ifdef CONFIG_ISA_ARCV2
53+
; Unaligned access is disabled at reset, so re-enable early as
54+
; gcc 7.3.1 (ARC GNU 2018.03) onwards generates unaligned access
55+
; by default
56+
lr r5, [status32]
57+
bset r5, r5, STATUS_AD_BIT
58+
kflag r5
59+
#endif
5060
.endm
5161

5262
.section .init.text, "ax",@progbits
@@ -90,15 +100,13 @@ ENTRY(stext)
90100
st.ab 0, [r5, 4]
91101
1:
92102

93-
#ifdef CONFIG_ARC_UBOOT_SUPPORT
94103
; Uboot - kernel ABI
95104
; r0 = [0] No uboot interaction, [1] cmdline in r2, [2] DTB in r2
96-
; r1 = magic number (board identity, unused as of now
105+
; r1 = magic number (always zero as of now)
97106
; r2 = pointer to uboot provided cmdline or external DTB in mem
98-
; These are handled later in setup_arch()
107+
; These are handled later in handle_uboot_args()
99108
st r0, [@uboot_tag]
100109
st r2, [@uboot_arg]
101-
#endif
102110

103111
; setup "current" tsk and optionally cache it in dedicated r25
104112
mov r9, @init_task

‎arch/arc/kernel/intc-arcv2.c

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -49,11 +49,13 @@ void arc_init_IRQ(void)
4949

5050
*(unsigned int *)&ictrl = 0;
5151

52+
#ifndef CONFIG_ARC_IRQ_NO_AUTOSAVE
5253
ictrl.save_nr_gpr_pairs = 6; /* r0 to r11 (r12 saved manually) */
5354
ictrl.save_blink = 1;
5455
ictrl.save_lp_regs = 1; /* LP_COUNT, LP_START, LP_END */
5556
ictrl.save_u_to_u = 0; /* user ctxt saved on kernel stack */
5657
ictrl.save_idx_regs = 1; /* JLI, LDI, EI */
58+
#endif
5759

5860
WRITE_AUX(AUX_IRQ_CTRL, ictrl);
5961

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