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airliedairlied
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Merge branch 'drm-fixes-5.1' of git://people.freedesktop.org/~agd5f/linux into drm-fixes
Fixes for 5.1: - Fix for pcie dpm - Powerplay fixes for vega20 - Fix vbios display on reboot if driver display state is retained - Gfx9 resume robustness fix Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexdeucher@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190404042939.3386-1-alexander.deucher@amd.com
2 parents 79a3aaa + d939f44 commit 2ded188

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+33
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lines changed

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+33
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lines changed

‎drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3625,13 +3625,18 @@ static void amdgpu_device_get_min_pci_speed_width(struct amdgpu_device *adev,
36253625
struct pci_dev *pdev = adev->pdev;
36263626
enum pci_bus_speed cur_speed;
36273627
enum pcie_link_width cur_width;
3628+
u32 ret = 1;
36283629

36293630
*speed = PCI_SPEED_UNKNOWN;
36303631
*width = PCIE_LNK_WIDTH_UNKNOWN;
36313632

36323633
while (pdev) {
36333634
cur_speed = pcie_get_speed_cap(pdev);
36343635
cur_width = pcie_get_width_cap(pdev);
3636+
ret = pcie_bandwidth_available(adev->pdev, NULL,
3637+
NULL, &cur_width);
3638+
if (!ret)
3639+
cur_width = PCIE_LNK_WIDTH_RESRV;
36353640

36363641
if (cur_speed != PCI_SPEED_UNKNOWN) {
36373642
if (*speed == PCI_SPEED_UNKNOWN)

‎drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2405,8 +2405,6 @@ static int gfx_v9_0_rlc_resume(struct amdgpu_device *adev)
24052405
/* disable CG */
24062406
WREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL, 0);
24072407

2408-
adev->gfx.rlc.funcs->reset(adev);
2409-
24102408
gfx_v9_0_init_pg(adev);
24112409

24122410
if (adev->firmware.load_type != AMDGPU_FW_LOAD_PSP) {

‎drivers/gpu/drm/amd/display/dc/core/dc_link.c

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2660,12 +2660,18 @@ void core_link_enable_stream(
26602660
void core_link_disable_stream(struct pipe_ctx *pipe_ctx, int option)
26612661
{
26622662
struct dc *core_dc = pipe_ctx->stream->ctx->dc;
2663+
struct dc_stream_state *stream = pipe_ctx->stream;
26632664

26642665
core_dc->hwss.blank_stream(pipe_ctx);
26652666

26662667
if (pipe_ctx->stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST)
26672668
deallocate_mst_payload(pipe_ctx);
26682669

2670+
if (dc_is_hdmi_signal(pipe_ctx->stream->signal))
2671+
dal_ddc_service_write_scdc_data(
2672+
stream->link->ddc, 0,
2673+
stream->timing.flags.LTE_340MCSC_SCRAMBLE);
2674+
26692675
core_dc->hwss.disable_stream(pipe_ctx, option);
26702676

26712677
disable_link(pipe_ctx->stream->link, pipe_ctx->stream->signal);

‎drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

Lines changed: 18 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -91,6 +91,12 @@ static void vega20_set_default_registry_data(struct pp_hwmgr *hwmgr)
9191
* MP0CLK DS
9292
*/
9393
data->registry_data.disallowed_features = 0xE0041C00;
94+
/* ECC feature should be disabled on old SMUs */
95+
smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetSmuVersion);
96+
hwmgr->smu_version = smum_get_argument(hwmgr);
97+
if (hwmgr->smu_version < 0x282100)
98+
data->registry_data.disallowed_features |= FEATURE_ECC_MASK;
99+
94100
data->registry_data.od_state_in_dc_support = 0;
95101
data->registry_data.thermal_support = 1;
96102
data->registry_data.skip_baco_hardware = 0;
@@ -357,6 +363,7 @@ static void vega20_init_dpm_defaults(struct pp_hwmgr *hwmgr)
357363
data->smu_features[GNLD_DS_MP1CLK].smu_feature_id = FEATURE_DS_MP1CLK_BIT;
358364
data->smu_features[GNLD_DS_MP0CLK].smu_feature_id = FEATURE_DS_MP0CLK_BIT;
359365
data->smu_features[GNLD_XGMI].smu_feature_id = FEATURE_XGMI_BIT;
366+
data->smu_features[GNLD_ECC].smu_feature_id = FEATURE_ECC_BIT;
360367

361368
for (i = 0; i < GNLD_FEATURES_MAX; i++) {
362369
data->smu_features[i].smu_feature_bitmap =
@@ -3020,7 +3027,8 @@ static int vega20_get_ppfeature_status(struct pp_hwmgr *hwmgr, char *buf)
30203027
"FCLK_DS",
30213028
"MP1CLK_DS",
30223029
"MP0CLK_DS",
3023-
"XGMI"};
3030+
"XGMI",
3031+
"ECC"};
30243032
static const char *output_title[] = {
30253033
"FEATURES",
30263034
"BITMASK",
@@ -3462,6 +3470,7 @@ static int vega20_apply_clocks_adjust_rules(struct pp_hwmgr *hwmgr)
34623470
struct vega20_single_dpm_table *dpm_table;
34633471
bool vblank_too_short = false;
34643472
bool disable_mclk_switching;
3473+
bool disable_fclk_switching;
34653474
uint32_t i, latency;
34663475

34673476
disable_mclk_switching = ((1 < hwmgr->display_config->num_display) &&
@@ -3537,13 +3546,20 @@ static int vega20_apply_clocks_adjust_rules(struct pp_hwmgr *hwmgr)
35373546
if (hwmgr->display_config->nb_pstate_switch_disable)
35383547
dpm_table->dpm_state.hard_min_level = dpm_table->dpm_levels[dpm_table->count - 1].value;
35393548

3549+
if ((disable_mclk_switching &&
3550+
(dpm_table->dpm_state.hard_min_level == dpm_table->dpm_levels[dpm_table->count - 1].value)) ||
3551+
hwmgr->display_config->min_mem_set_clock / 100 >= dpm_table->dpm_levels[dpm_table->count - 1].value)
3552+
disable_fclk_switching = true;
3553+
else
3554+
disable_fclk_switching = false;
3555+
35403556
/* fclk */
35413557
dpm_table = &(data->dpm_table.fclk_table);
35423558
dpm_table->dpm_state.soft_min_level = dpm_table->dpm_levels[0].value;
35433559
dpm_table->dpm_state.soft_max_level = VG20_CLOCK_MAX_DEFAULT;
35443560
dpm_table->dpm_state.hard_min_level = dpm_table->dpm_levels[0].value;
35453561
dpm_table->dpm_state.hard_max_level = VG20_CLOCK_MAX_DEFAULT;
3546-
if (hwmgr->display_config->nb_pstate_switch_disable)
3562+
if (hwmgr->display_config->nb_pstate_switch_disable || disable_fclk_switching)
35473563
dpm_table->dpm_state.soft_min_level = dpm_table->dpm_levels[dpm_table->count - 1].value;
35483564

35493565
/* vclk */

‎drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -80,6 +80,7 @@ enum {
8080
GNLD_DS_MP1CLK,
8181
GNLD_DS_MP0CLK,
8282
GNLD_XGMI,
83+
GNLD_ECC,
8384

8485
GNLD_FEATURES_MAX
8586
};

‎drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -99,7 +99,7 @@
9999
#define FEATURE_DS_MP1CLK_BIT 30
100100
#define FEATURE_DS_MP0CLK_BIT 31
101101
#define FEATURE_XGMI_BIT 32
102-
#define FEATURE_SPARE_33_BIT 33
102+
#define FEATURE_ECC_BIT 33
103103
#define FEATURE_SPARE_34_BIT 34
104104
#define FEATURE_SPARE_35_BIT 35
105105
#define FEATURE_SPARE_36_BIT 36
@@ -165,7 +165,8 @@
165165
#define FEATURE_DS_FCLK_MASK (1 << FEATURE_DS_FCLK_BIT )
166166
#define FEATURE_DS_MP1CLK_MASK (1 << FEATURE_DS_MP1CLK_BIT )
167167
#define FEATURE_DS_MP0CLK_MASK (1 << FEATURE_DS_MP0CLK_BIT )
168-
#define FEATURE_XGMI_MASK (1 << FEATURE_XGMI_BIT )
168+
#define FEATURE_XGMI_MASK (1ULL << FEATURE_XGMI_BIT )
169+
#define FEATURE_ECC_MASK (1ULL << FEATURE_ECC_BIT )
169170

170171
#define DPM_OVERRIDE_DISABLE_SOCCLK_PID 0x00000001
171172
#define DPM_OVERRIDE_DISABLE_UCLK_PID 0x00000002

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