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davem330davem330
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Merge branch 'Refactor-lan9303_xxx_packet_processing'
Egil Hjelmeland says: ==================== Refactor lan9303_xxx_packet_processing This series is purely non functional. It changes the lan9303_enable_packet_processing, lan9303_disable_packet_processing() to pass port number (0,1,2) as parameter instead of port offset. This aligns them with other functions in the module, and makes it possible to simplify the code. The lan9303_enable_packet_processing, lan9303_disable_packet_processing functions operate on port. Therefore rename the functions to reflect that as well. Reviewer pointed out lan9303_get_ethtool_stats would be better off with the use of a lan9303_read_switch_port(). So that was added to the series. Changes v3 -> v4: - Whitespace adjustments. Changes v2 -> v3: - Patch 1: Removed the change in lan9303_get_ethtool_stats - Added patch 4: rename lan9303_xxx_packet_processing - Added patch 5: refactor lan9303_get_ethtool_stats Changes v1 -> v2: - introduced lan9303_write_switch_port() in first patch - inserted LAN9303_NUM_PORTS patch - Use LAN9303_NUM_PORTS in last patch. Plus whitespace change. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2 parents 51cb87c + 0a967b4 commit 2f23678

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‎drivers/net/dsa/lan9303-core.c

Lines changed: 50 additions & 46 deletions
Original file line numberDiff line numberDiff line change
@@ -20,6 +20,8 @@
2020

2121
#include "lan9303.h"
2222

23+
#define LAN9303_NUM_PORTS 3
24+
2325
/* 13.2 System Control and Status Registers
2426
* Multiply register number by 4 to get address offset.
2527
*/
@@ -159,9 +161,7 @@
159161
# define LAN9303_BM_EGRSS_PORT_TYPE_SPECIAL_TAG_PORT1 (BIT(9) | BIT(8))
160162
# define LAN9303_BM_EGRSS_PORT_TYPE_SPECIAL_TAG_PORT0 (BIT(1) | BIT(0))
161163

162-
#define LAN9303_PORT_0_OFFSET 0x400
163-
#define LAN9303_PORT_1_OFFSET 0x800
164-
#define LAN9303_PORT_2_OFFSET 0xc00
164+
#define LAN9303_SWITCH_PORT_REG(port, reg0) (0x400 * (port) + (reg0))
165165

166166
/* the built-in PHYs are of type LAN911X */
167167
#define MII_LAN911X_SPECIAL_MODES 0x12
@@ -428,6 +428,20 @@ static int lan9303_read_switch_reg(struct lan9303 *chip, u16 regnum, u32 *val)
428428
return ret;
429429
}
430430

431+
static int lan9303_write_switch_port(struct lan9303 *chip, int port,
432+
u16 regnum, u32 val)
433+
{
434+
return lan9303_write_switch_reg(
435+
chip, LAN9303_SWITCH_PORT_REG(port, regnum), val);
436+
}
437+
438+
static int lan9303_read_switch_port(struct lan9303 *chip, int port,
439+
u16 regnum, u32 *val)
440+
{
441+
return lan9303_read_switch_reg(
442+
chip, LAN9303_SWITCH_PORT_REG(port, regnum), val);
443+
}
444+
431445
static int lan9303_detect_phy_setup(struct lan9303 *chip)
432446
{
433447
int reg;
@@ -458,40 +472,37 @@ static int lan9303_detect_phy_setup(struct lan9303 *chip)
458472
return 0;
459473
}
460474

461-
#define LAN9303_MAC_RX_CFG_OFFS (LAN9303_MAC_RX_CFG_0 - LAN9303_PORT_0_OFFSET)
462-
#define LAN9303_MAC_TX_CFG_OFFS (LAN9303_MAC_TX_CFG_0 - LAN9303_PORT_0_OFFSET)
463-
464-
static int lan9303_disable_packet_processing(struct lan9303 *chip,
465-
unsigned int port)
475+
static int lan9303_disable_processing_port(struct lan9303 *chip,
476+
unsigned int port)
466477
{
467478
int ret;
468479

469480
/* disable RX, but keep register reset default values else */
470-
ret = lan9303_write_switch_reg(chip, LAN9303_MAC_RX_CFG_OFFS + port,
471-
LAN9303_MAC_RX_CFG_X_REJECT_MAC_TYPES);
481+
ret = lan9303_write_switch_port(chip, port, LAN9303_MAC_RX_CFG_0,
482+
LAN9303_MAC_RX_CFG_X_REJECT_MAC_TYPES);
472483
if (ret)
473484
return ret;
474485

475486
/* disable TX, but keep register reset default values else */
476-
return lan9303_write_switch_reg(chip, LAN9303_MAC_TX_CFG_OFFS + port,
487+
return lan9303_write_switch_port(chip, port, LAN9303_MAC_TX_CFG_0,
477488
LAN9303_MAC_TX_CFG_X_TX_IFG_CONFIG_DEFAULT |
478489
LAN9303_MAC_TX_CFG_X_TX_PAD_ENABLE);
479490
}
480491

481-
static int lan9303_enable_packet_processing(struct lan9303 *chip,
482-
unsigned int port)
492+
static int lan9303_enable_processing_port(struct lan9303 *chip,
493+
unsigned int port)
483494
{
484495
int ret;
485496

486497
/* enable RX and keep register reset default values else */
487-
ret = lan9303_write_switch_reg(chip, LAN9303_MAC_RX_CFG_OFFS + port,
488-
LAN9303_MAC_RX_CFG_X_REJECT_MAC_TYPES |
489-
LAN9303_MAC_RX_CFG_X_RX_ENABLE);
498+
ret = lan9303_write_switch_port(chip, port, LAN9303_MAC_RX_CFG_0,
499+
LAN9303_MAC_RX_CFG_X_REJECT_MAC_TYPES |
500+
LAN9303_MAC_RX_CFG_X_RX_ENABLE);
490501
if (ret)
491502
return ret;
492503

493504
/* enable TX and keep register reset default values else */
494-
return lan9303_write_switch_reg(chip, LAN9303_MAC_TX_CFG_OFFS + port,
505+
return lan9303_write_switch_port(chip, port, LAN9303_MAC_TX_CFG_0,
495506
LAN9303_MAC_TX_CFG_X_TX_IFG_CONFIG_DEFAULT |
496507
LAN9303_MAC_TX_CFG_X_TX_PAD_ENABLE |
497508
LAN9303_MAC_TX_CFG_X_TX_ENABLE);
@@ -556,15 +567,16 @@ static int lan9303_handle_reset(struct lan9303 *chip)
556567
/* stop processing packets for all ports */
557568
static int lan9303_disable_processing(struct lan9303 *chip)
558569
{
559-
int ret;
570+
int p;
560571

561-
ret = lan9303_disable_packet_processing(chip, LAN9303_PORT_0_OFFSET);
562-
if (ret)
563-
return ret;
564-
ret = lan9303_disable_packet_processing(chip, LAN9303_PORT_1_OFFSET);
565-
if (ret)
566-
return ret;
567-
return lan9303_disable_packet_processing(chip, LAN9303_PORT_2_OFFSET);
572+
for (p = 0; p < LAN9303_NUM_PORTS; p++) {
573+
int ret = lan9303_disable_processing_port(chip, p);
574+
575+
if (ret)
576+
return ret;
577+
}
578+
579+
return 0;
568580
}
569581

570582
static int lan9303_check_device(struct lan9303 *chip)
@@ -634,7 +646,7 @@ static int lan9303_setup(struct dsa_switch *ds)
634646
if (ret)
635647
dev_err(chip->dev, "failed to separate ports %d\n", ret);
636648

637-
ret = lan9303_enable_packet_processing(chip, LAN9303_PORT_0_OFFSET);
649+
ret = lan9303_enable_processing_port(chip, 0);
638650
if (ret)
639651
dev_err(chip->dev, "failed to re-enable switching %d\n", ret);
640652

@@ -700,19 +712,18 @@ static void lan9303_get_ethtool_stats(struct dsa_switch *ds, int port,
700712
uint64_t *data)
701713
{
702714
struct lan9303 *chip = ds->priv;
703-
u32 reg;
704-
unsigned int u, poff;
705-
int ret;
706-
707-
poff = port * 0x400;
715+
unsigned int u;
708716

709717
for (u = 0; u < ARRAY_SIZE(lan9303_mib); u++) {
710-
ret = lan9303_read_switch_reg(chip,
711-
lan9303_mib[u].offset + poff,
712-
&reg);
718+
u32 reg;
719+
int ret;
720+
721+
ret = lan9303_read_switch_port(
722+
chip, port, lan9303_mib[u].offset, &reg);
723+
713724
if (ret)
714-
dev_warn(chip->dev, "Reading status reg %u failed\n",
715-
lan9303_mib[u].offset + poff);
725+
dev_warn(chip->dev, "Reading status port %d reg %u failed\n",
726+
port, lan9303_mib[u].offset);
716727
data[u] = reg;
717728
}
718729
}
@@ -757,11 +768,8 @@ static int lan9303_port_enable(struct dsa_switch *ds, int port,
757768
/* enable internal packet processing */
758769
switch (port) {
759770
case 1:
760-
return lan9303_enable_packet_processing(chip,
761-
LAN9303_PORT_1_OFFSET);
762771
case 2:
763-
return lan9303_enable_packet_processing(chip,
764-
LAN9303_PORT_2_OFFSET);
772+
return lan9303_enable_processing_port(chip, port);
765773
default:
766774
dev_dbg(chip->dev,
767775
"Error: request to power up invalid port %d\n", port);
@@ -778,13 +786,9 @@ static void lan9303_port_disable(struct dsa_switch *ds, int port,
778786
/* disable internal packet processing */
779787
switch (port) {
780788
case 1:
781-
lan9303_disable_packet_processing(chip, LAN9303_PORT_1_OFFSET);
782-
lan9303_phy_write(ds, chip->phy_addr_sel_strap + 1,
783-
MII_BMCR, BMCR_PDOWN);
784-
break;
785789
case 2:
786-
lan9303_disable_packet_processing(chip, LAN9303_PORT_2_OFFSET);
787-
lan9303_phy_write(ds, chip->phy_addr_sel_strap + 2,
790+
lan9303_disable_processing_port(chip, port);
791+
lan9303_phy_write(ds, chip->phy_addr_sel_strap + port,
788792
MII_BMCR, BMCR_PDOWN);
789793
break;
790794
default:

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