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Merge tag 'uniphier-dt-v4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier into next/dt
Merge "UniPhier ARM SoC DT updates for v4.9" from Masahiro Yamada: * Match DT names other projects and documents * Switch over to PSCI * Use clock/reset drivers * Misc * tag 'uniphier-dt-v4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier: ARM: dts: uniphier: add specific compatible to SoC-Glue node ARM: dts: uniphier: use clock/reset controllers ARM: dts: uniphier: switch over to PSCI ARM: dts: uniphier: match DT names to other projects and documents ARM: dts: uniphier: remove a whitespace after tabs
2 parents 6f7f9e4 + cb16593 commit 30d430d

18 files changed

+376
-198
lines changed

‎arch/arm/boot/dts/Makefile

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -836,15 +836,15 @@ dtb-$(CONFIG_ARCH_U8500) += \
836836
ste-ccu8540.dtb \
837837
ste-ccu9540.dtb
838838
dtb-$(CONFIG_ARCH_UNIPHIER) += \
839-
uniphier-ph1-ld4-ref.dtb \
840-
uniphier-ph1-ld6b-ref.dtb \
841-
uniphier-ph1-pro4-ace.dtb \
842-
uniphier-ph1-pro4-ref.dtb \
843-
uniphier-ph1-pro4-sanji.dtb \
844-
uniphier-ph1-sld3-ref.dtb \
845-
uniphier-ph1-sld8-ref.dtb \
846-
uniphier-proxstream2-gentil.dtb \
847-
uniphier-proxstream2-vodka.dtb
839+
uniphier-ld4-ref.dtb \
840+
uniphier-ld6b-ref.dtb \
841+
uniphier-pro4-ace.dtb \
842+
uniphier-pro4-ref.dtb \
843+
uniphier-pro4-sanji.dtb \
844+
uniphier-pxs2-gentil.dtb \
845+
uniphier-pxs2-vodka.dtb \
846+
uniphier-sld3-ref.dtb \
847+
uniphier-sld8-ref.dtb
848848
dtb-$(CONFIG_ARCH_VERSATILE) += \
849849
versatile-ab.dtb \
850850
versatile-pb.dtb

‎arch/arm/boot/dts/uniphier-common32.dtsi

Lines changed: 56 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,8 @@
11
/*
22
* Device Tree Source commonly used by UniPhier ARM SoCs
33
*
4-
* Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
4+
* Copyright (C) 2015-2016 Socionext Inc.
5+
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
56
*
67
* This file is dual-licensed: you can use it either under the terms
78
* of the GPL or the X11 license, at your option. Note that this dual
@@ -45,6 +46,11 @@
4546
/include/ "skeleton.dtsi"
4647

4748
/ {
49+
psci {
50+
compatible = "arm,psci-0.2";
51+
method = "smc";
52+
};
53+
4854
clocks {
4955
refclk: ref {
5056
#clock-cells = <0>;
@@ -66,7 +72,7 @@
6672
interrupts = <0 33 4>;
6773
pinctrl-names = "default";
6874
pinctrl-0 = <&pinctrl_uart0>;
69-
clocks = <&uart_clk>;
75+
clocks = <&peri_clk 0>;
7076
};
7177

7278
serial1: serial@54006900 {
@@ -76,7 +82,7 @@
7682
interrupts = <0 35 4>;
7783
pinctrl-names = "default";
7884
pinctrl-0 = <&pinctrl_uart1>;
79-
clocks = <&uart_clk>;
85+
clocks = <&peri_clk 1>;
8086
};
8187

8288
serial2: serial@54006a00 {
@@ -86,7 +92,7 @@
8692
interrupts = <0 37 4>;
8793
pinctrl-names = "default";
8894
pinctrl-0 = <&pinctrl_uart2>;
89-
clocks = <&uart_clk>;
95+
clocks = <&peri_clk 2>;
9096
};
9197

9298
serial3: serial@54006b00 {
@@ -96,7 +102,7 @@
96102
interrupts = <0 177 4>;
97103
pinctrl-names = "default";
98104
pinctrl-0 = <&pinctrl_uart3>;
99-
clocks = <&uart_clk>;
105+
clocks = <&peri_clk 3>;
100106
};
101107

102108
system_bus: system-bus@58c00000 {
@@ -114,6 +120,34 @@
114120
reg = <0x59801000 0x400>;
115121
};
116122

123+
mioctrl@59810000 {
124+
compatible = "socionext,uniphier-mioctrl",
125+
"simple-mfd", "syscon";
126+
reg = <0x59810000 0x800>;
127+
128+
mio_clk: clock {
129+
#clock-cells = <1>;
130+
};
131+
132+
mio_rst: reset {
133+
#reset-cells = <1>;
134+
};
135+
};
136+
137+
perictrl@59820000 {
138+
compatible = "socionext,uniphier-perictrl",
139+
"simple-mfd", "syscon";
140+
reg = <0x59820000 0x200>;
141+
142+
peri_clk: clock {
143+
#clock-cells = <1>;
144+
};
145+
146+
peri_rst: reset {
147+
#reset-cells = <1>;
148+
};
149+
};
150+
117151
timer@60000200 {
118152
compatible = "arm,cortex-a9-global-timer";
119153
reg = <0x60000200 0x20>;
@@ -137,11 +171,26 @@
137171
};
138172

139173
soc-glue@5f800000 {
140-
compatible = "simple-mfd", "syscon";
174+
compatible = "socionext,uniphier-soc-glue",
175+
"simple-mfd", "syscon";
141176
reg = <0x5f800000 0x2000>;
142177

143178
pinctrl: pinctrl {
144-
/* specify compatible in each SoC DTSI */
179+
/* specify compatible in each SoC DTSI */
180+
};
181+
};
182+
183+
sysctrl@61840000 {
184+
compatible = "socionext,uniphier-sysctrl",
185+
"simple-mfd", "syscon";
186+
reg = <0x61840000 0x4000>;
187+
188+
sys_clk: clock {
189+
#clock-cells = <1>;
190+
};
191+
192+
sys_rst: reset {
193+
#reset-cells = <1>;
145194
};
146195
};
147196
};

‎arch/arm/boot/dts/uniphier-ph1-ld4-ref.dts renamed to ‎arch/arm/boot/dts/uniphier-ld4-ref.dts

Lines changed: 6 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,8 @@
11
/*
2-
* Device Tree Source for UniPhier PH1-LD4 Reference Board
2+
* Device Tree Source for UniPhier LD4 Reference Board
33
*
4-
* Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
4+
* Copyright (C) 2015-2016 Socionext Inc.
5+
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
56
*
67
* This file is dual-licensed: you can use it either under the terms
78
* of the GPL or the X11 license, at your option. Note that this dual
@@ -43,13 +44,13 @@
4344
*/
4445

4546
/dts-v1/;
46-
/include/ "uniphier-ph1-ld4.dtsi"
47+
/include/ "uniphier-ld4.dtsi"
4748
/include/ "uniphier-ref-daughter.dtsi"
4849
/include/ "uniphier-support-card.dtsi"
4950

5051
/ {
51-
model = "UniPhier PH1-LD4 Reference Board";
52-
compatible = "socionext,ph1-ld4-ref", "socionext,ph1-ld4";
52+
model = "UniPhier LD4 Reference Board";
53+
compatible = "socionext,uniphier-ld4-ref", "socionext,uniphier-ld4";
5354

5455
memory {
5556
device_type = "memory";

‎arch/arm/boot/dts/uniphier-ph1-ld4.dtsi renamed to ‎arch/arm/boot/dts/uniphier-ld4.dtsi

Lines changed: 40 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,8 @@
11
/*
2-
* Device Tree Source for UniPhier PH1-LD4 SoC
2+
* Device Tree Source for UniPhier LD4 SoC
33
*
4-
* Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
4+
* Copyright (C) 2015-2016 Socionext Inc.
5+
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
56
*
67
* This file is dual-licensed: you can use it either under the terms
78
* of the GPL or the X11 license, at your option. Note that this dual
@@ -45,7 +46,7 @@
4546
/include/ "uniphier-common32.dtsi"
4647

4748
/ {
48-
compatible = "socionext,ph1-ld4";
49+
compatible = "socionext,uniphier-ld4";
4950

5051
cpus {
5152
#address-cells = <1>;
@@ -55,6 +56,7 @@
5556
device_type = "cpu";
5657
compatible = "arm,cortex-a9";
5758
reg = <0>;
59+
enable-method = "psci";
5860
next-level-cache = <&l2>;
5961
};
6062
};
@@ -65,18 +67,6 @@
6567
compatible = "fixed-clock";
6668
clock-frequency = <50000000>;
6769
};
68-
69-
uart_clk: uart_clk {
70-
#clock-cells = <0>;
71-
compatible = "fixed-clock";
72-
clock-frequency = <36864000>;
73-
};
74-
75-
iobus_clk: iobus_clk {
76-
#clock-cells = <0>;
77-
compatible = "fixed-clock";
78-
clock-frequency = <100000000>;
79-
};
8070
};
8171
};
8272

@@ -101,7 +91,7 @@
10191
interrupts = <0 41 1>;
10292
pinctrl-names = "default";
10393
pinctrl-0 = <&pinctrl_i2c0>;
104-
clocks = <&iobus_clk>;
94+
clocks = <&peri_clk 4>;
10595
clock-frequency = <100000>;
10696
};
10797

@@ -114,7 +104,7 @@
114104
interrupts = <0 42 1>;
115105
pinctrl-names = "default";
116106
pinctrl-0 = <&pinctrl_i2c1>;
117-
clocks = <&iobus_clk>;
107+
clocks = <&peri_clk 5>;
118108
clock-frequency = <100000>;
119109
};
120110

@@ -127,7 +117,7 @@
127117
interrupts = <0 43 1>;
128118
pinctrl-names = "default";
129119
pinctrl-0 = <&pinctrl_i2c2>;
130-
clocks = <&iobus_clk>;
120+
clocks = <&peri_clk 6>;
131121
clock-frequency = <400000>;
132122
};
133123

@@ -140,7 +130,7 @@
140130
interrupts = <0 44 1>;
141131
pinctrl-names = "default";
142132
pinctrl-0 = <&pinctrl_i2c3>;
143-
clocks = <&iobus_clk>;
133+
clocks = <&peri_clk 7>;
144134
clock-frequency = <100000>;
145135
};
146136

@@ -151,6 +141,8 @@
151141
interrupts = <0 80 4>;
152142
pinctrl-names = "default";
153143
pinctrl-0 = <&pinctrl_usb0>;
144+
clocks = <&mio_clk 7>, <&mio_clk 8>, <&mio_clk 12>;
145+
resets = <&mio_rst 7>, <&mio_rst 8>, <&mio_rst 12>, <&sys_rst 8>;
154146
};
155147

156148
usb1: usb@5a810100 {
@@ -160,6 +152,8 @@
160152
interrupts = <0 81 4>;
161153
pinctrl-names = "default";
162154
pinctrl-0 = <&pinctrl_usb1>;
155+
clocks = <&mio_clk 7>, <&mio_clk 9>, <&mio_clk 13>;
156+
resets = <&mio_rst 7>, <&mio_rst 9>, <&mio_rst 13>, <&sys_rst 8>;
163157
};
164158

165159
usb2: usb@5a820100 {
@@ -169,6 +163,8 @@
169163
interrupts = <0 82 4>;
170164
pinctrl-names = "default";
171165
pinctrl-0 = <&pinctrl_usb2>;
166+
clocks = <&mio_clk 7>, <&mio_clk 10>, <&mio_clk 14>;
167+
resets = <&mio_rst 7>, <&mio_rst 10>, <&mio_rst 14>, <&sys_rst 8>;
172168
};
173169

174170
};
@@ -181,6 +177,31 @@
181177
interrupts = <0 29 4>;
182178
};
183179

180+
&mio_clk {
181+
compatible = "socionext,uniphier-ld4-mio-clock";
182+
};
183+
184+
&mio_rst {
185+
compatible = "socionext,uniphier-ld4-mio-reset";
186+
resets = <&sys_rst 7>;
187+
};
188+
189+
&peri_clk {
190+
compatible = "socionext,uniphier-ld4-peri-clock";
191+
};
192+
193+
&peri_rst {
194+
compatible = "socionext,uniphier-ld4-peri-reset";
195+
};
196+
184197
&pinctrl {
185198
compatible = "socionext,uniphier-ld4-pinctrl";
186199
};
200+
201+
&sys_clk {
202+
compatible = "socionext,uniphier-ld4-clock";
203+
};
204+
205+
&sys_rst {
206+
compatible = "socionext,uniphier-ld4-reset";
207+
};

‎arch/arm/boot/dts/uniphier-ph1-ld6b-ref.dts renamed to ‎arch/arm/boot/dts/uniphier-ld6b-ref.dts

Lines changed: 6 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,8 @@
11
/*
2-
* Device Tree Source for UniPhier PH1-LD6b Reference Board
2+
* Device Tree Source for UniPhier LD6b Reference Board
33
*
4-
* Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
4+
* Copyright (C) 2015-2016 Socionext Inc.
5+
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
56
*
67
* This file is dual-licensed: you can use it either under the terms
78
* of the GPL or the X11 license, at your option. Note that this dual
@@ -43,13 +44,13 @@
4344
*/
4445

4546
/dts-v1/;
46-
/include/ "uniphier-ph1-ld6b.dtsi"
47+
/include/ "uniphier-ld6b.dtsi"
4748
/include/ "uniphier-ref-daughter.dtsi"
4849
/include/ "uniphier-support-card.dtsi"
4950

5051
/ {
51-
model = "UniPhier PH1-LD6b Reference Board";
52-
compatible = "socionext,ph1-ld6b-ref", "socionext,ph1-ld6b";
52+
model = "UniPhier LD6b Reference Board";
53+
compatible = "socionext,uniphier-ld6b-ref", "socionext,uniphier-ld6b";
5354

5455
memory {
5556
device_type = "memory";

‎arch/arm/boot/dts/uniphier-ph1-ld6b.dtsi renamed to ‎arch/arm/boot/dts/uniphier-ld6b.dtsi

Lines changed: 9 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,8 @@
11
/*
2-
* Device Tree Source for UniPhier PH1-LD6b SoC
2+
* Device Tree Source for UniPhier LD6b SoC
33
*
4-
* Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
4+
* Copyright (C) 2015-2016 Socionext Inc.
5+
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
56
*
67
* This file is dual-licensed: you can use it either under the terms
78
* of the GPL or the X11 license, at your option. Note that this dual
@@ -43,14 +44,14 @@
4344
*/
4445

4546
/*
46-
* PH1-LD6b consists of two silicon dies: D-chip and A-chip.
47-
* The D-chip (digital chip) is the same as the ProXstream2 die.
48-
* Reuse the ProXstream2 device tree with some properties overridden.
47+
* LD6b consists of two silicon dies: D-chip and A-chip.
48+
* The D-chip (digital chip) is the same as the PXs2 die.
49+
* Reuse the PXs2 device tree with some properties overridden.
4950
*/
50-
/include/ "uniphier-proxstream2.dtsi"
51+
/include/ "uniphier-pxs2.dtsi"
5152

5253
/ {
53-
compatible = "socionext,ph1-ld6b";
54+
compatible = "socionext,uniphier-ld6b";
5455
};
5556

5657
/* UART3 unavailable: the pads are not wired to the package balls */
@@ -59,7 +60,7 @@
5960
};
6061

6162
/*
62-
* PH1-LD6b and ProXstream2 have completely different packages,
63+
* LD6b and PXs2 have completely different packages,
6364
* which makes the pinctrl driver unshareable.
6465
*/
6566
&pinctrl {

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