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Merge branch '1GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/jkirsher/next-queue
Jeff Kirsher says: ==================== 1GbE Intel Wired LAN Driver Updates 2016-02-15 This series contains updates to igb only. Shota Suzuki cleans up unnecessary flag setting for 82576 in igb_set_flag_queue_pairs() since the default block already sets IGB_FLAG_QUEUE_PAIRS to the correct value anyways, so the e1000_82576 code block is not necessary and we can simply fall through. Then fixes an issue where IGB_FLAG_QUEUE_PAIRS can now be set by using "ethtool -L" option but is never cleared unless the driver is reloaded, so clear the queue pairing if the pairing becomes unnecessary as a result of "ethtool -L". Mitch fixes the igbvf from giving up if it fails to get the hardware mailbox lock. This can happen when the PF-VF communication channel is heavily loaded and causes complete communications failure between the PF and VF drivers, so add a counter and a delay so that the driver will now retry ten times before giving up on getting the mailbox lock. The remaining patches in the series are from Alex Duyck, starting with the cleaning up code that sets the MAC address. Then refactors the VFTA and VLVF configuration, to simplify and update to similar setups in the ixgbe driver. Fixed an issue were VLANs headers size was being added to the value programmed into the RLPML registers, yet these registers already take into account the size of the VLAN headers when determining the maximum packet length, so we can drop the code that adds the size to the RLPML registers. Cleaned up the configuration of the VF port based VLAN configuration. Also fixed the igb driver so that we can fully support SR-IOV or the recently added NTUPLE filtering while allowing support for VLAN promiscuous mode. Also added the ability to use the bridge utility to add a FDB entry for the PF to an igb port. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2 parents 9a14b1c + bf456ab commit 31d035a

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9 files changed

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lines changed

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lines changed

‎drivers/net/ethernet/intel/igb/e1000_82575.c

Lines changed: 35 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -34,6 +34,7 @@
3434
#include "e1000_mac.h"
3535
#include "e1000_82575.h"
3636
#include "e1000_i210.h"
37+
#include "igb.h"
3738

3839
static s32 igb_get_invariants_82575(struct e1000_hw *);
3940
static s32 igb_acquire_phy_82575(struct e1000_hw *);
@@ -71,6 +72,32 @@ static s32 igb_update_nvm_checksum_i350(struct e1000_hw *hw);
7172
static const u16 e1000_82580_rxpbs_table[] = {
7273
36, 72, 144, 1, 2, 4, 8, 16, 35, 70, 140 };
7374

75+
/* Due to a hw errata, if the host tries to configure the VFTA register
76+
* while performing queries from the BMC or DMA, then the VFTA in some
77+
* cases won't be written.
78+
*/
79+
80+
/**
81+
* igb_write_vfta_i350 - Write value to VLAN filter table
82+
* @hw: pointer to the HW structure
83+
* @offset: register offset in VLAN filter table
84+
* @value: register value written to VLAN filter table
85+
*
86+
* Writes value at the given offset in the register array which stores
87+
* the VLAN filter table.
88+
**/
89+
static void igb_write_vfta_i350(struct e1000_hw *hw, u32 offset, u32 value)
90+
{
91+
struct igb_adapter *adapter = hw->back;
92+
int i;
93+
94+
for (i = 10; i--;)
95+
array_wr32(E1000_VFTA, offset, value);
96+
97+
wrfl();
98+
adapter->shadow_vfta[offset] = value;
99+
}
100+
74101
/**
75102
* igb_sgmii_uses_mdio_82575 - Determine if I2C pins are for external MDIO
76103
* @hw: pointer to the HW structure
@@ -398,6 +425,8 @@ static s32 igb_init_mac_params_82575(struct e1000_hw *hw)
398425

399426
/* Set mta register count */
400427
mac->mta_reg_count = 128;
428+
/* Set uta register count */
429+
mac->uta_reg_count = (hw->mac.type == e1000_82575) ? 0 : 128;
401430
/* Set rar entry count */
402431
switch (mac->type) {
403432
case e1000_82576:
@@ -429,6 +458,11 @@ static s32 igb_init_mac_params_82575(struct e1000_hw *hw)
429458
mac->ops.release_swfw_sync = igb_release_swfw_sync_82575;
430459
}
431460

461+
if ((hw->mac.type == e1000_i350) || (hw->mac.type == e1000_i354))
462+
mac->ops.write_vfta = igb_write_vfta_i350;
463+
else
464+
mac->ops.write_vfta = igb_write_vfta;
465+
432466
/* Set if part includes ASF firmware */
433467
mac->asf_firmware_present = true;
434468
/* Set if manageability features are enabled. */
@@ -1517,10 +1551,7 @@ static s32 igb_init_hw_82575(struct e1000_hw *hw)
15171551

15181552
/* Disabling VLAN filtering */
15191553
hw_dbg("Initializing the IEEE VLAN\n");
1520-
if ((hw->mac.type == e1000_i350) || (hw->mac.type == e1000_i354))
1521-
igb_clear_vfta_i350(hw);
1522-
else
1523-
igb_clear_vfta(hw);
1554+
igb_clear_vfta(hw);
15241555

15251556
/* Setup the receive address */
15261557
igb_init_rx_addrs(hw, rar_count);

‎drivers/net/ethernet/intel/igb/e1000_defines.h

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -356,7 +356,8 @@
356356
/* Ethertype field values */
357357
#define ETHERNET_IEEE_VLAN_TYPE 0x8100 /* 802.3ac packet */
358358

359-
#define MAX_JUMBO_FRAME_SIZE 0x3F00
359+
/* As per the EAS the maximum supported size is 9.5KB (9728 bytes) */
360+
#define MAX_JUMBO_FRAME_SIZE 0x2600
360361

361362
/* PBA constants */
362363
#define E1000_PBA_34K 0x0022

‎drivers/net/ethernet/intel/igb/e1000_hw.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -325,7 +325,7 @@ struct e1000_mac_operations {
325325
s32 (*get_thermal_sensor_data)(struct e1000_hw *);
326326
s32 (*init_thermal_sensor_thresh)(struct e1000_hw *);
327327
#endif
328-
328+
void (*write_vfta)(struct e1000_hw *, u32, u32);
329329
};
330330

331331
struct e1000_phy_operations {

‎drivers/net/ethernet/intel/igb/e1000_mac.c

Lines changed: 143 additions & 70 deletions
Original file line numberDiff line numberDiff line change
@@ -92,10 +92,8 @@ void igb_clear_vfta(struct e1000_hw *hw)
9292
{
9393
u32 offset;
9494

95-
for (offset = 0; offset < E1000_VLAN_FILTER_TBL_SIZE; offset++) {
96-
array_wr32(E1000_VFTA, offset, 0);
97-
wrfl();
98-
}
95+
for (offset = E1000_VLAN_FILTER_TBL_SIZE; offset--;)
96+
hw->mac.ops.write_vfta(hw, offset, 0);
9997
}
10098

10199
/**
@@ -107,54 +105,14 @@ void igb_clear_vfta(struct e1000_hw *hw)
107105
* Writes value at the given offset in the register array which stores
108106
* the VLAN filter table.
109107
**/
110-
static void igb_write_vfta(struct e1000_hw *hw, u32 offset, u32 value)
108+
void igb_write_vfta(struct e1000_hw *hw, u32 offset, u32 value)
111109
{
110+
struct igb_adapter *adapter = hw->back;
111+
112112
array_wr32(E1000_VFTA, offset, value);
113113
wrfl();
114-
}
115-
116-
/* Due to a hw errata, if the host tries to configure the VFTA register
117-
* while performing queries from the BMC or DMA, then the VFTA in some
118-
* cases won't be written.
119-
*/
120114

121-
/**
122-
* igb_clear_vfta_i350 - Clear VLAN filter table
123-
* @hw: pointer to the HW structure
124-
*
125-
* Clears the register array which contains the VLAN filter table by
126-
* setting all the values to 0.
127-
**/
128-
void igb_clear_vfta_i350(struct e1000_hw *hw)
129-
{
130-
u32 offset;
131-
int i;
132-
133-
for (offset = 0; offset < E1000_VLAN_FILTER_TBL_SIZE; offset++) {
134-
for (i = 0; i < 10; i++)
135-
array_wr32(E1000_VFTA, offset, 0);
136-
137-
wrfl();
138-
}
139-
}
140-
141-
/**
142-
* igb_write_vfta_i350 - Write value to VLAN filter table
143-
* @hw: pointer to the HW structure
144-
* @offset: register offset in VLAN filter table
145-
* @value: register value written to VLAN filter table
146-
*
147-
* Writes value at the given offset in the register array which stores
148-
* the VLAN filter table.
149-
**/
150-
static void igb_write_vfta_i350(struct e1000_hw *hw, u32 offset, u32 value)
151-
{
152-
int i;
153-
154-
for (i = 0; i < 10; i++)
155-
array_wr32(E1000_VFTA, offset, value);
156-
157-
wrfl();
115+
adapter->shadow_vfta[offset] = value;
158116
}
159117

160118
/**
@@ -182,41 +140,156 @@ void igb_init_rx_addrs(struct e1000_hw *hw, u16 rar_count)
182140
hw->mac.ops.rar_set(hw, mac_addr, i);
183141
}
184142

143+
/**
144+
* igb_find_vlvf_slot - find the VLAN id or the first empty slot
145+
* @hw: pointer to hardware structure
146+
* @vlan: VLAN id to write to VLAN filter
147+
* @vlvf_bypass: skip VLVF if no match is found
148+
*
149+
* return the VLVF index where this VLAN id should be placed
150+
*
151+
**/
152+
static s32 igb_find_vlvf_slot(struct e1000_hw *hw, u32 vlan, bool vlvf_bypass)
153+
{
154+
s32 regindex, first_empty_slot;
155+
u32 bits;
156+
157+
/* short cut the special case */
158+
if (vlan == 0)
159+
return 0;
160+
161+
/* if vlvf_bypass is set we don't want to use an empty slot, we
162+
* will simply bypass the VLVF if there are no entries present in the
163+
* VLVF that contain our VLAN
164+
*/
165+
first_empty_slot = vlvf_bypass ? -E1000_ERR_NO_SPACE : 0;
166+
167+
/* Search for the VLAN id in the VLVF entries. Save off the first empty
168+
* slot found along the way.
169+
*
170+
* pre-decrement loop covering (IXGBE_VLVF_ENTRIES - 1) .. 1
171+
*/
172+
for (regindex = E1000_VLVF_ARRAY_SIZE; --regindex > 0;) {
173+
bits = rd32(E1000_VLVF(regindex)) & E1000_VLVF_VLANID_MASK;
174+
if (bits == vlan)
175+
return regindex;
176+
if (!first_empty_slot && !bits)
177+
first_empty_slot = regindex;
178+
}
179+
180+
return first_empty_slot ? : -E1000_ERR_NO_SPACE;
181+
}
182+
185183
/**
186184
* igb_vfta_set - enable or disable vlan in VLAN filter table
187185
* @hw: pointer to the HW structure
188-
* @vid: VLAN id to add or remove
189-
* @add: if true add filter, if false remove
186+
* @vlan: VLAN id to add or remove
187+
* @vind: VMDq output index that maps queue to VLAN id
188+
* @vlan_on: if true add filter, if false remove
190189
*
191190
* Sets or clears a bit in the VLAN filter table array based on VLAN id
192191
* and if we are adding or removing the filter
193192
**/
194-
s32 igb_vfta_set(struct e1000_hw *hw, u32 vid, bool add)
193+
s32 igb_vfta_set(struct e1000_hw *hw, u32 vlan, u32 vind,
194+
bool vlan_on, bool vlvf_bypass)
195195
{
196-
u32 index = (vid >> E1000_VFTA_ENTRY_SHIFT) & E1000_VFTA_ENTRY_MASK;
197-
u32 mask = 1 << (vid & E1000_VFTA_ENTRY_BIT_SHIFT_MASK);
198-
u32 vfta;
199196
struct igb_adapter *adapter = hw->back;
200-
s32 ret_val = 0;
197+
u32 regidx, vfta_delta, vfta, bits;
198+
s32 vlvf_index;
201199

202-
vfta = adapter->shadow_vfta[index];
200+
if ((vlan > 4095) || (vind > 7))
201+
return -E1000_ERR_PARAM;
203202

204-
/* bit was set/cleared before we started */
205-
if ((!!(vfta & mask)) == add) {
206-
ret_val = -E1000_ERR_CONFIG;
207-
} else {
208-
if (add)
209-
vfta |= mask;
210-
else
211-
vfta &= ~mask;
203+
/* this is a 2 part operation - first the VFTA, then the
204+
* VLVF and VLVFB if VT Mode is set
205+
* We don't write the VFTA until we know the VLVF part succeeded.
206+
*/
207+
208+
/* Part 1
209+
* The VFTA is a bitstring made up of 128 32-bit registers
210+
* that enable the particular VLAN id, much like the MTA:
211+
* bits[11-5]: which register
212+
* bits[4-0]: which bit in the register
213+
*/
214+
regidx = vlan / 32;
215+
vfta_delta = 1 << (vlan % 32);
216+
vfta = adapter->shadow_vfta[regidx];
217+
218+
/* vfta_delta represents the difference between the current value
219+
* of vfta and the value we want in the register. Since the diff
220+
* is an XOR mask we can just update vfta using an XOR.
221+
*/
222+
vfta_delta &= vlan_on ? ~vfta : vfta;
223+
vfta ^= vfta_delta;
224+
225+
/* Part 2
226+
* If VT Mode is set
227+
* Either vlan_on
228+
* make sure the VLAN is in VLVF
229+
* set the vind bit in the matching VLVFB
230+
* Or !vlan_on
231+
* clear the pool bit and possibly the vind
232+
*/
233+
if (!adapter->vfs_allocated_count)
234+
goto vfta_update;
235+
236+
vlvf_index = igb_find_vlvf_slot(hw, vlan, vlvf_bypass);
237+
if (vlvf_index < 0) {
238+
if (vlvf_bypass)
239+
goto vfta_update;
240+
return vlvf_index;
212241
}
213-
if ((hw->mac.type == e1000_i350) || (hw->mac.type == e1000_i354))
214-
igb_write_vfta_i350(hw, index, vfta);
215-
else
216-
igb_write_vfta(hw, index, vfta);
217-
adapter->shadow_vfta[index] = vfta;
218242

219-
return ret_val;
243+
bits = rd32(E1000_VLVF(vlvf_index));
244+
245+
/* set the pool bit */
246+
bits |= 1 << (E1000_VLVF_POOLSEL_SHIFT + vind);
247+
if (vlan_on)
248+
goto vlvf_update;
249+
250+
/* clear the pool bit */
251+
bits ^= 1 << (E1000_VLVF_POOLSEL_SHIFT + vind);
252+
253+
if (!(bits & E1000_VLVF_POOLSEL_MASK)) {
254+
/* Clear VFTA first, then disable VLVF. Otherwise
255+
* we run the risk of stray packets leaking into
256+
* the PF via the default pool
257+
*/
258+
if (vfta_delta)
259+
hw->mac.ops.write_vfta(hw, regidx, vfta);
260+
261+
/* disable VLVF and clear remaining bit from pool */
262+
wr32(E1000_VLVF(vlvf_index), 0);
263+
264+
return 0;
265+
}
266+
267+
/* If there are still bits set in the VLVFB registers
268+
* for the VLAN ID indicated we need to see if the
269+
* caller is requesting that we clear the VFTA entry bit.
270+
* If the caller has requested that we clear the VFTA
271+
* entry bit but there are still pools/VFs using this VLAN
272+
* ID entry then ignore the request. We're not worried
273+
* about the case where we're turning the VFTA VLAN ID
274+
* entry bit on, only when requested to turn it off as
275+
* there may be multiple pools and/or VFs using the
276+
* VLAN ID entry. In that case we cannot clear the
277+
* VFTA bit until all pools/VFs using that VLAN ID have also
278+
* been cleared. This will be indicated by "bits" being
279+
* zero.
280+
*/
281+
vfta_delta = 0;
282+
283+
vlvf_update:
284+
/* record pool change and enable VLAN ID if not already enabled */
285+
wr32(E1000_VLVF(vlvf_index), bits | vlan | E1000_VLVF_VLANID_ENABLE);
286+
287+
vfta_update:
288+
/* bit was set/cleared before we started */
289+
if (vfta_delta)
290+
hw->mac.ops.write_vfta(hw, regidx, vfta);
291+
292+
return 0;
220293
}
221294

222295
/**

‎drivers/net/ethernet/intel/igb/e1000_mac.h

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -56,8 +56,9 @@ s32 igb_write_8bit_ctrl_reg(struct e1000_hw *hw, u32 reg,
5656

5757
void igb_clear_hw_cntrs_base(struct e1000_hw *hw);
5858
void igb_clear_vfta(struct e1000_hw *hw);
59-
void igb_clear_vfta_i350(struct e1000_hw *hw);
60-
s32 igb_vfta_set(struct e1000_hw *hw, u32 vid, bool add);
59+
void igb_write_vfta(struct e1000_hw *hw, u32 offset, u32 value);
60+
s32 igb_vfta_set(struct e1000_hw *hw, u32 vid, u32 vind,
61+
bool vlan_on, bool vlvf_bypass);
6162
void igb_config_collision_dist(struct e1000_hw *hw);
6263
void igb_init_rx_addrs(struct e1000_hw *hw, u16 rar_count);
6364
void igb_mta_set(struct e1000_hw *hw, u32 hash_value);

‎drivers/net/ethernet/intel/igb/e1000_mbx.c

Lines changed: 12 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -322,14 +322,20 @@ static s32 igb_obtain_mbx_lock_pf(struct e1000_hw *hw, u16 vf_number)
322322
{
323323
s32 ret_val = -E1000_ERR_MBX;
324324
u32 p2v_mailbox;
325+
int count = 10;
325326

326-
/* Take ownership of the buffer */
327-
wr32(E1000_P2VMAILBOX(vf_number), E1000_P2VMAILBOX_PFU);
327+
do {
328+
/* Take ownership of the buffer */
329+
wr32(E1000_P2VMAILBOX(vf_number), E1000_P2VMAILBOX_PFU);
328330

329-
/* reserve mailbox for vf use */
330-
p2v_mailbox = rd32(E1000_P2VMAILBOX(vf_number));
331-
if (p2v_mailbox & E1000_P2VMAILBOX_PFU)
332-
ret_val = 0;
331+
/* reserve mailbox for vf use */
332+
p2v_mailbox = rd32(E1000_P2VMAILBOX(vf_number));
333+
if (p2v_mailbox & E1000_P2VMAILBOX_PFU) {
334+
ret_val = 0;
335+
break;
336+
}
337+
udelay(1000);
338+
} while (count-- > 0);
333339

334340
return ret_val;
335341
}

‎drivers/net/ethernet/intel/igb/igb.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -95,7 +95,6 @@ struct vf_data_storage {
9595
unsigned char vf_mac_addresses[ETH_ALEN];
9696
u16 vf_mc_hashes[IGB_MAX_VF_MC_ENTRIES];
9797
u16 num_vf_mc_hashes;
98-
u16 vlans_enabled;
9998
u32 flags;
10099
unsigned long last_nack;
101100
u16 pf_vlan; /* When set, guest VLAN config not allowed. */
@@ -482,6 +481,7 @@ struct igb_adapter {
482481
#define IGB_FLAG_MAS_ENABLE (1 << 12)
483482
#define IGB_FLAG_HAS_MSIX (1 << 13)
484483
#define IGB_FLAG_EEE (1 << 14)
484+
#define IGB_FLAG_VLAN_PROMISC BIT(15)
485485

486486
/* Media Auto Sense */
487487
#define IGB_MAS_ENABLE_0 0X0001

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