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Merge tag 'topic/hdr-formats-2019-03-07' of git://anongit.freedesktop.org/drm/drm-misc into drm-intel-next-queued
Add support for Y21x and Y41x to drm core and i915, and P01x support to i915. Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/f2485309-d645-bed4-95f4-e66ff312aa05@linux.intel.com
2 parents bd2dba1 + 296e9b1 commit 3461cbf

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8 files changed

+194
-19
lines changed

8 files changed

+194
-19
lines changed

drivers/gpu/drm/drm_fourcc.c

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -226,6 +226,12 @@ const struct drm_format_info *__drm_format_info(u32 format)
226226
{ .format = DRM_FORMAT_VYUY, .depth = 0, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
227227
{ .format = DRM_FORMAT_XYUV8888, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
228228
{ .format = DRM_FORMAT_AYUV, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true, .is_yuv = true },
229+
{ .format = DRM_FORMAT_Y210, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
230+
{ .format = DRM_FORMAT_Y212, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
231+
{ .format = DRM_FORMAT_Y216, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
232+
{ .format = DRM_FORMAT_Y410, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
233+
{ .format = DRM_FORMAT_Y412, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
234+
{ .format = DRM_FORMAT_Y416, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
229235
{ .format = DRM_FORMAT_Y0L0, .depth = 0, .num_planes = 1,
230236
.char_per_block = { 8, 0, 0 }, .block_w = { 2, 0, 0 }, .block_h = { 2, 0, 0 },
231237
.hsub = 2, .vsub = 2, .has_alpha = true, .is_yuv = true },

drivers/gpu/drm/i915/i915_reg.h

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -6602,13 +6602,22 @@ enum {
66026602
#define PLANE_CTL_FORMAT_YUV422 (0 << 24)
66036603
#define PLANE_CTL_FORMAT_NV12 (1 << 24)
66046604
#define PLANE_CTL_FORMAT_XRGB_2101010 (2 << 24)
6605+
#define PLANE_CTL_FORMAT_P010 (3 << 24)
66056606
#define PLANE_CTL_FORMAT_XRGB_8888 (4 << 24)
6607+
#define PLANE_CTL_FORMAT_P012 (5 << 24)
66066608
#define PLANE_CTL_FORMAT_XRGB_16161616F (6 << 24)
6609+
#define PLANE_CTL_FORMAT_P016 (7 << 24)
66076610
#define PLANE_CTL_FORMAT_AYUV (8 << 24)
66086611
#define PLANE_CTL_FORMAT_INDEXED (12 << 24)
66096612
#define PLANE_CTL_FORMAT_RGB_565 (14 << 24)
66106613
#define ICL_PLANE_CTL_FORMAT_MASK (0x1f << 23)
66116614
#define PLANE_CTL_PIPE_CSC_ENABLE (1 << 23) /* Pre-GLK */
6615+
#define PLANE_CTL_FORMAT_Y210 (1 << 23)
6616+
#define PLANE_CTL_FORMAT_Y212 (3 << 23)
6617+
#define PLANE_CTL_FORMAT_Y216 (5 << 23)
6618+
#define PLANE_CTL_FORMAT_Y410 (7 << 23)
6619+
#define PLANE_CTL_FORMAT_Y412 (9 << 23)
6620+
#define PLANE_CTL_FORMAT_Y416 (0xb << 23)
66126621
#define PLANE_CTL_KEY_ENABLE_MASK (0x3 << 21)
66136622
#define PLANE_CTL_KEY_ENABLE_SOURCE (1 << 21)
66146623
#define PLANE_CTL_KEY_ENABLE_DESTINATION (2 << 21)

drivers/gpu/drm/i915/intel_atomic_plane.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -136,7 +136,7 @@ int intel_plane_atomic_check_with_state(const struct intel_crtc_state *old_crtc_
136136
new_crtc_state->active_planes |= BIT(plane->id);
137137

138138
if (new_plane_state->base.visible &&
139-
new_plane_state->base.fb->format->format == DRM_FORMAT_NV12)
139+
is_planar_yuv_format(new_plane_state->base.fb->format->format))
140140
new_crtc_state->nv12_planes |= BIT(plane->id);
141141

142142
if (new_plane_state->base.visible &&

drivers/gpu/drm/i915/intel_display.c

Lines changed: 51 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -2644,6 +2644,24 @@ int skl_format_to_fourcc(int format, bool rgb_order, bool alpha)
26442644
return DRM_FORMAT_RGB565;
26452645
case PLANE_CTL_FORMAT_NV12:
26462646
return DRM_FORMAT_NV12;
2647+
case PLANE_CTL_FORMAT_P010:
2648+
return DRM_FORMAT_P010;
2649+
case PLANE_CTL_FORMAT_P012:
2650+
return DRM_FORMAT_P012;
2651+
case PLANE_CTL_FORMAT_P016:
2652+
return DRM_FORMAT_P016;
2653+
case PLANE_CTL_FORMAT_Y210:
2654+
return DRM_FORMAT_Y210;
2655+
case PLANE_CTL_FORMAT_Y212:
2656+
return DRM_FORMAT_Y212;
2657+
case PLANE_CTL_FORMAT_Y216:
2658+
return DRM_FORMAT_Y216;
2659+
case PLANE_CTL_FORMAT_Y410:
2660+
return DRM_FORMAT_Y410;
2661+
case PLANE_CTL_FORMAT_Y412:
2662+
return DRM_FORMAT_Y412;
2663+
case PLANE_CTL_FORMAT_Y416:
2664+
return DRM_FORMAT_Y416;
26472665
default:
26482666
case PLANE_CTL_FORMAT_XRGB_8888:
26492667
if (rgb_order) {
@@ -3142,7 +3160,7 @@ int skl_check_plane_surface(struct intel_plane_state *plane_state)
31423160
* Handle the AUX surface first since
31433161
* the main surface setup depends on it.
31443162
*/
3145-
if (fb->format->format == DRM_FORMAT_NV12) {
3163+
if (is_planar_yuv_format(fb->format->format)) {
31463164
ret = skl_check_nv12_aux_surface(plane_state);
31473165
if (ret)
31483166
return ret;
@@ -3567,6 +3585,24 @@ static u32 skl_plane_ctl_format(u32 pixel_format)
35673585
return PLANE_CTL_FORMAT_YUV422 | PLANE_CTL_YUV422_VYUY;
35683586
case DRM_FORMAT_NV12:
35693587
return PLANE_CTL_FORMAT_NV12;
3588+
case DRM_FORMAT_P010:
3589+
return PLANE_CTL_FORMAT_P010;
3590+
case DRM_FORMAT_P012:
3591+
return PLANE_CTL_FORMAT_P012;
3592+
case DRM_FORMAT_P016:
3593+
return PLANE_CTL_FORMAT_P016;
3594+
case DRM_FORMAT_Y210:
3595+
return PLANE_CTL_FORMAT_Y210;
3596+
case DRM_FORMAT_Y212:
3597+
return PLANE_CTL_FORMAT_Y212;
3598+
case DRM_FORMAT_Y216:
3599+
return PLANE_CTL_FORMAT_Y216;
3600+
case DRM_FORMAT_Y410:
3601+
return PLANE_CTL_FORMAT_Y410;
3602+
case DRM_FORMAT_Y412:
3603+
return PLANE_CTL_FORMAT_Y412;
3604+
case DRM_FORMAT_Y416:
3605+
return PLANE_CTL_FORMAT_Y416;
35703606
default:
35713607
MISSING_CASE(pixel_format);
35723608
}
@@ -4996,9 +5032,9 @@ skl_update_scaler(struct intel_crtc_state *crtc_state, bool force_detach,
49965032
return 0;
49975033
}
49985034

4999-
if (format && format->format == DRM_FORMAT_NV12 &&
5035+
if (format && is_planar_yuv_format(format->format) &&
50005036
(src_h < SKL_MIN_YUV_420_SRC_H || src_w < SKL_MIN_YUV_420_SRC_W)) {
5001-
DRM_DEBUG_KMS("NV12: src dimensions not met\n");
5037+
DRM_DEBUG_KMS("Planar YUV: src dimensions not met\n");
50025038
return -EINVAL;
50035039
}
50045040

@@ -5072,7 +5108,7 @@ static int skl_update_scaler_plane(struct intel_crtc_state *crtc_state,
50725108

50735109
/* Pre-gen11 and SDR planes always need a scaler for planar formats. */
50745110
if (!icl_is_hdr_plane(intel_plane) &&
5075-
fb && fb->format->format == DRM_FORMAT_NV12)
5111+
fb && is_planar_yuv_format(fb->format->format))
50765112
need_scaler = true;
50775113

50785114
ret = skl_update_scaler(crtc_state, force_detach,
@@ -5109,6 +5145,15 @@ static int skl_update_scaler_plane(struct intel_crtc_state *crtc_state,
51095145
case DRM_FORMAT_UYVY:
51105146
case DRM_FORMAT_VYUY:
51115147
case DRM_FORMAT_NV12:
5148+
case DRM_FORMAT_P010:
5149+
case DRM_FORMAT_P012:
5150+
case DRM_FORMAT_P016:
5151+
case DRM_FORMAT_Y210:
5152+
case DRM_FORMAT_Y212:
5153+
case DRM_FORMAT_Y216:
5154+
case DRM_FORMAT_Y410:
5155+
case DRM_FORMAT_Y412:
5156+
case DRM_FORMAT_Y416:
51125157
break;
51135158
default:
51145159
DRM_DEBUG_KMS("[PLANE:%d:%s] FB:%d unsupported scaling format 0x%x\n",
@@ -11173,7 +11218,7 @@ static int icl_check_nv12_planes(struct intel_crtc_state *crtc_state)
1117311218
}
1117411219

1117511220
if (!linked_state) {
11176-
DRM_DEBUG_KMS("Need %d free Y planes for NV12\n",
11221+
DRM_DEBUG_KMS("Need %d free Y planes for planar YUV\n",
1117711222
hweight8(crtc_state->nv12_planes));
1117811223

1117911224
return -EINVAL;
@@ -13893,7 +13938,7 @@ skl_max_scale(const struct intel_crtc_state *crtc_state,
1389313938
* or
1389413939
* cdclk/crtc_clock
1389513940
*/
13896-
mult = pixel_format == DRM_FORMAT_NV12 ? 2 : 3;
13941+
mult = is_planar_yuv_format(pixel_format) ? 2 : 3;
1389713942
tmpclk1 = (1 << 16) * mult - 1;
1389813943
tmpclk2 = (1 << 8) * ((max_dotclk << 8) / crtc_clock);
1389913944
max_scale = min(tmpclk1, tmpclk2);

drivers/gpu/drm/i915/intel_drv.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2410,6 +2410,7 @@ bool intel_sdvo_init(struct drm_i915_private *dev_priv,
24102410

24112411

24122412
/* intel_sprite.c */
2413+
bool is_planar_yuv_format(u32 pixelformat);
24132414
int intel_usecs_to_scanlines(const struct drm_display_mode *adjusted_mode,
24142415
int usecs);
24152416
struct intel_plane *intel_sprite_plane_create(struct drm_i915_private *dev_priv,

drivers/gpu/drm/i915/intel_pm.c

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -3975,7 +3975,7 @@ skl_ddb_get_hw_plane_state(struct drm_i915_private *dev_priv,
39753975
val = I915_READ(PLANE_BUF_CFG(pipe, plane_id));
39763976
val2 = I915_READ(PLANE_NV12_BUF_CFG(pipe, plane_id));
39773977

3978-
if (fourcc == DRM_FORMAT_NV12)
3978+
if (is_planar_yuv_format(fourcc))
39793979
swap(val, val2);
39803980

39813981
skl_ddb_entry_init_from_hw(dev_priv, ddb_y, val);
@@ -4185,7 +4185,7 @@ skl_plane_relative_data_rate(const struct intel_crtc_state *cstate,
41854185

41864186
if (intel_plane->id == PLANE_CURSOR)
41874187
return 0;
4188-
if (plane == 1 && format != DRM_FORMAT_NV12)
4188+
if (plane == 1 && !is_planar_yuv_format(format))
41894189
return 0;
41904190

41914191
/*
@@ -4197,7 +4197,7 @@ skl_plane_relative_data_rate(const struct intel_crtc_state *cstate,
41974197
height = drm_rect_height(&intel_pstate->base.src) >> 16;
41984198

41994199
/* UV plane does 1/2 pixel sub-sampling */
4200-
if (plane == 1 && format == DRM_FORMAT_NV12) {
4200+
if (plane == 1 && is_planar_yuv_format(format)) {
42014201
width /= 2;
42024202
height /= 2;
42034203
}
@@ -4594,9 +4594,9 @@ skl_compute_plane_wm_params(const struct intel_crtc_state *cstate,
45944594
const struct drm_framebuffer *fb = pstate->fb;
45954595
u32 interm_pbpl;
45964596

4597-
/* only NV12 format has two planes */
4598-
if (color_plane == 1 && fb->format->format != DRM_FORMAT_NV12) {
4599-
DRM_DEBUG_KMS("Non NV12 format have single plane\n");
4597+
/* only planar format has two planes */
4598+
if (color_plane == 1 && !is_planar_yuv_format(fb->format->format)) {
4599+
DRM_DEBUG_KMS("Non planar format have single plane\n");
46004600
return -EINVAL;
46014601
}
46024602

@@ -4607,7 +4607,7 @@ skl_compute_plane_wm_params(const struct intel_crtc_state *cstate,
46074607
wp->x_tiled = fb->modifier == I915_FORMAT_MOD_X_TILED;
46084608
wp->rc_surface = fb->modifier == I915_FORMAT_MOD_Y_TILED_CCS ||
46094609
fb->modifier == I915_FORMAT_MOD_Yf_TILED_CCS;
4610-
wp->is_planar = fb->format->format == DRM_FORMAT_NV12;
4610+
wp->is_planar = is_planar_yuv_format(fb->format->format);
46114611

46124612
if (plane->id == PLANE_CURSOR) {
46134613
wp->width = intel_pstate->base.crtc_w;

drivers/gpu/drm/i915/intel_sprite.c

Lines changed: 103 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -41,6 +41,19 @@
4141
#include "i915_drv.h"
4242
#include <drm/drm_color_mgmt.h>
4343

44+
bool is_planar_yuv_format(u32 pixelformat)
45+
{
46+
switch (pixelformat) {
47+
case DRM_FORMAT_NV12:
48+
case DRM_FORMAT_P010:
49+
case DRM_FORMAT_P012:
50+
case DRM_FORMAT_P016:
51+
return true;
52+
default:
53+
return false;
54+
}
55+
}
56+
4457
int intel_usecs_to_scanlines(const struct drm_display_mode *adjusted_mode,
4558
int usecs)
4659
{
@@ -335,7 +348,7 @@ skl_program_scaler(struct intel_plane *plane,
335348
0, INT_MAX);
336349

337350
/* TODO: handle sub-pixel coordinates */
338-
if (plane_state->base.fb->format->format == DRM_FORMAT_NV12 &&
351+
if (is_planar_yuv_format(plane_state->base.fb->format->format) &&
339352
!icl_is_hdr_plane(plane)) {
340353
y_hphase = skl_scaler_calc_phase(1, hscale, false);
341354
y_vphase = skl_scaler_calc_phase(1, vscale, false);
@@ -1564,10 +1577,10 @@ static int skl_plane_check_nv12_rotation(const struct intel_plane_state *plane_s
15641577
int src_w = drm_rect_width(&plane_state->base.src) >> 16;
15651578

15661579
/* Display WA #1106 */
1567-
if (fb->format->format == DRM_FORMAT_NV12 && src_w & 3 &&
1580+
if (is_planar_yuv_format(fb->format->format) && src_w & 3 &&
15681581
(rotation == DRM_MODE_ROTATE_270 ||
15691582
rotation == (DRM_MODE_REFLECT_X | DRM_MODE_ROTATE_90))) {
1570-
DRM_DEBUG_KMS("src width must be multiple of 4 for rotated NV12\n");
1583+
DRM_DEBUG_KMS("src width must be multiple of 4 for rotated planar YUV\n");
15711584
return -EINVAL;
15721585
}
15731586

@@ -1803,6 +1816,27 @@ static const u32 skl_plane_formats[] = {
18031816
DRM_FORMAT_VYUY,
18041817
};
18051818

1819+
static const uint32_t icl_plane_formats[] = {
1820+
DRM_FORMAT_C8,
1821+
DRM_FORMAT_RGB565,
1822+
DRM_FORMAT_XRGB8888,
1823+
DRM_FORMAT_XBGR8888,
1824+
DRM_FORMAT_ARGB8888,
1825+
DRM_FORMAT_ABGR8888,
1826+
DRM_FORMAT_XRGB2101010,
1827+
DRM_FORMAT_XBGR2101010,
1828+
DRM_FORMAT_YUYV,
1829+
DRM_FORMAT_YVYU,
1830+
DRM_FORMAT_UYVY,
1831+
DRM_FORMAT_VYUY,
1832+
DRM_FORMAT_Y210,
1833+
DRM_FORMAT_Y212,
1834+
DRM_FORMAT_Y216,
1835+
DRM_FORMAT_Y410,
1836+
DRM_FORMAT_Y412,
1837+
DRM_FORMAT_Y416,
1838+
};
1839+
18061840
static const u32 skl_planar_formats[] = {
18071841
DRM_FORMAT_C8,
18081842
DRM_FORMAT_RGB565,
@@ -1819,6 +1853,50 @@ static const u32 skl_planar_formats[] = {
18191853
DRM_FORMAT_NV12,
18201854
};
18211855

1856+
static const uint32_t glk_planar_formats[] = {
1857+
DRM_FORMAT_C8,
1858+
DRM_FORMAT_RGB565,
1859+
DRM_FORMAT_XRGB8888,
1860+
DRM_FORMAT_XBGR8888,
1861+
DRM_FORMAT_ARGB8888,
1862+
DRM_FORMAT_ABGR8888,
1863+
DRM_FORMAT_XRGB2101010,
1864+
DRM_FORMAT_XBGR2101010,
1865+
DRM_FORMAT_YUYV,
1866+
DRM_FORMAT_YVYU,
1867+
DRM_FORMAT_UYVY,
1868+
DRM_FORMAT_VYUY,
1869+
DRM_FORMAT_NV12,
1870+
DRM_FORMAT_P010,
1871+
DRM_FORMAT_P012,
1872+
DRM_FORMAT_P016,
1873+
};
1874+
1875+
static const uint32_t icl_planar_formats[] = {
1876+
DRM_FORMAT_C8,
1877+
DRM_FORMAT_RGB565,
1878+
DRM_FORMAT_XRGB8888,
1879+
DRM_FORMAT_XBGR8888,
1880+
DRM_FORMAT_ARGB8888,
1881+
DRM_FORMAT_ABGR8888,
1882+
DRM_FORMAT_XRGB2101010,
1883+
DRM_FORMAT_XBGR2101010,
1884+
DRM_FORMAT_YUYV,
1885+
DRM_FORMAT_YVYU,
1886+
DRM_FORMAT_UYVY,
1887+
DRM_FORMAT_VYUY,
1888+
DRM_FORMAT_NV12,
1889+
DRM_FORMAT_P010,
1890+
DRM_FORMAT_P012,
1891+
DRM_FORMAT_P016,
1892+
DRM_FORMAT_Y210,
1893+
DRM_FORMAT_Y212,
1894+
DRM_FORMAT_Y216,
1895+
DRM_FORMAT_Y410,
1896+
DRM_FORMAT_Y412,
1897+
DRM_FORMAT_Y416,
1898+
};
1899+
18221900
static const u64 skl_plane_format_modifiers_noccs[] = {
18231901
I915_FORMAT_MOD_Yf_TILED,
18241902
I915_FORMAT_MOD_Y_TILED,
@@ -1958,6 +2036,15 @@ static bool skl_plane_format_mod_supported(struct drm_plane *_plane,
19582036
case DRM_FORMAT_UYVY:
19592037
case DRM_FORMAT_VYUY:
19602038
case DRM_FORMAT_NV12:
2039+
case DRM_FORMAT_P010:
2040+
case DRM_FORMAT_P012:
2041+
case DRM_FORMAT_P016:
2042+
case DRM_FORMAT_Y210:
2043+
case DRM_FORMAT_Y212:
2044+
case DRM_FORMAT_Y216:
2045+
case DRM_FORMAT_Y410:
2046+
case DRM_FORMAT_Y412:
2047+
case DRM_FORMAT_Y416:
19612048
if (modifier == I915_FORMAT_MOD_Yf_TILED)
19622049
return true;
19632050
/* fall through */
@@ -2098,8 +2185,19 @@ skl_universal_plane_create(struct drm_i915_private *dev_priv,
20982185
plane->update_slave = icl_update_slave;
20992186

21002187
if (skl_plane_has_planar(dev_priv, pipe, plane_id)) {
2101-
formats = skl_planar_formats;
2102-
num_formats = ARRAY_SIZE(skl_planar_formats);
2188+
if (INTEL_GEN(dev_priv) >= 11) {
2189+
formats = icl_planar_formats;
2190+
num_formats = ARRAY_SIZE(icl_planar_formats);
2191+
} else if (INTEL_GEN(dev_priv) == 10 || IS_GEMINILAKE(dev_priv)) {
2192+
formats = glk_planar_formats;
2193+
num_formats = ARRAY_SIZE(glk_planar_formats);
2194+
} else {
2195+
formats = skl_planar_formats;
2196+
num_formats = ARRAY_SIZE(skl_planar_formats);
2197+
}
2198+
} else if (INTEL_GEN(dev_priv) >= 11) {
2199+
formats = icl_plane_formats;
2200+
num_formats = ARRAY_SIZE(icl_plane_formats);
21032201
} else {
21042202
formats = skl_plane_formats;
21052203
num_formats = ARRAY_SIZE(skl_plane_formats);

include/uapi/drm/drm_fourcc.h

Lines changed: 16 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -153,6 +153,22 @@ extern "C" {
153153
#define DRM_FORMAT_AYUV fourcc_code('A', 'Y', 'U', 'V') /* [31:0] A:Y:Cb:Cr 8:8:8:8 little endian */
154154
#define DRM_FORMAT_XYUV8888 fourcc_code('X', 'Y', 'U', 'V') /* [31:0] X:Y:Cb:Cr 8:8:8:8 little endian */
155155

156+
/*
157+
* packed Y2xx indicate for each component, xx valid data occupy msb
158+
* 16-xx padding occupy lsb
159+
*/
160+
#define DRM_FORMAT_Y210 fourcc_code('Y', '2', '1', '0') /* [63:0] Y0:x:Cb0:x:Y1:x:Cr1:x 10:6:10:6:10:6:10:6 little endian per 2 Y pixels */
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#define DRM_FORMAT_Y212 fourcc_code('Y', '2', '1', '2') /* [63:0] Y0:x:Cb0:x:Y1:x:Cr1:x 12:4:12:4:12:4:12:4 little endian per 2 Y pixels */
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#define DRM_FORMAT_Y216 fourcc_code('Y', '2', '1', '6') /* [63:0] Y0:Cb0:Y1:Cr1 16:16:16:16 little endian per 2 Y pixels */
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/*
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* packed Y4xx indicate for each component, xx valid data occupy msb
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* 16-xx padding occupy lsb except Y410
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*/
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#define DRM_FORMAT_Y410 fourcc_code('Y', '4', '1', '0') /* [31:0] X:V:Y:U 2:10:10:10 little endian */
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#define DRM_FORMAT_Y412 fourcc_code('Y', '4', '1', '2') /* [63:0] X:x:V:x:Y:x:U:x 12:4:12:4:12:4:12:4 little endian */
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#define DRM_FORMAT_Y416 fourcc_code('Y', '4', '1', '6') /* [63:0] X:V:Y:U 16:16:16:16 little endian */
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/*
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* packed YCbCr420 2x2 tiled formats
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* first 64 bits will contain Y,Cb,Cr components for a 2x2 tile

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