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Ingo Molnar
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Merge branches 'x86/mm', 'x86/build', 'x86/apic' and 'x86/platform' into x86/core, to apply dependent patch
Signed-off-by: Ingo Molnar <mingo@kernel.org>
5 parents c46a024 + 1e6277d + cad14bb + 501b326 + 956079e commit 34e7724

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‎Documentation/kernel-parameters.txt

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -746,6 +746,12 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
746746
cpuidle.off=1 [CPU_IDLE]
747747
disable the cpuidle sub-system
748748

749+
cpu_init_udelay=N
750+
[X86] Delay for N microsec between assert and de-assert
751+
of APIC INIT to start processors. This delay occurs
752+
on every CPU online, such as boot, and resume from suspend.
753+
Default: 10000
754+
749755
cpcihp_generic= [HW,PCI] Generic port I/O CompactPCI driver
750756
Format:
751757
<first_slot>,<last_slot>,<port>,<enum_bit>[,<debug>]

‎Documentation/x86/mtrr.txt

Lines changed: 15 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,19 @@
11
MTRR (Memory Type Range Register) control
2-
3 Jun 1999
3-
Richard Gooch
4-
<rgooch@atnf.csiro.au>
2+
3+
Richard Gooch <rgooch@atnf.csiro.au> - 3 Jun 1999
4+
Luis R. Rodriguez <mcgrof@do-not-panic.com> - April 9, 2015
5+
6+
===============================================================================
7+
Phasing out MTRR use
8+
9+
MTRR use is replaced on modern x86 hardware with PAT. Over time the only type
10+
of effective MTRR that is expected to be supported will be for write-combining.
11+
As MTRR use is phased out device drivers should use arch_phys_wc_add() to make
12+
MTRR effective on non-PAT systems while a no-op on PAT enabled systems.
13+
14+
For details refer to Documentation/x86/pat.txt.
15+
16+
===============================================================================
517

618
On Intel P6 family processors (Pentium Pro, Pentium II and later)
719
the Memory Type Range Registers (MTRRs) may be used to control

‎Documentation/x86/pat.txt

Lines changed: 34 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -34,6 +34,8 @@ ioremap | -- | UC- | UC- |
3434
| | | |
3535
ioremap_cache | -- | WB | WB |
3636
| | | |
37+
ioremap_uc | -- | UC | UC |
38+
| | | |
3739
ioremap_nocache | -- | UC- | UC- |
3840
| | | |
3941
ioremap_wc | -- | -- | WC |
@@ -102,7 +104,38 @@ wants to export a RAM region, it has to do set_memory_uc() or set_memory_wc()
102104
as step 0 above and also track the usage of those pages and use set_memory_wb()
103105
before the page is freed to free pool.
104106

105-
107+
MTRR effects on PAT / non-PAT systems
108+
-------------------------------------
109+
110+
The following table provides the effects of using write-combining MTRRs when
111+
using ioremap*() calls on x86 for both non-PAT and PAT systems. Ideally
112+
mtrr_add() usage will be phased out in favor of arch_phys_wc_add() which will
113+
be a no-op on PAT enabled systems. The region over which a arch_phys_wc_add()
114+
is made, should already have been ioremapped with WC attributes or PAT entries,
115+
this can be done by using ioremap_wc() / set_memory_wc(). Devices which
116+
combine areas of IO memory desired to remain uncacheable with areas where
117+
write-combining is desirable should consider use of ioremap_uc() followed by
118+
set_memory_wc() to white-list effective write-combined areas. Such use is
119+
nevertheless discouraged as the effective memory type is considered
120+
implementation defined, yet this strategy can be used as last resort on devices
121+
with size-constrained regions where otherwise MTRR write-combining would
122+
otherwise not be effective.
123+
124+
----------------------------------------------------------------------
125+
MTRR Non-PAT PAT Linux ioremap value Effective memory type
126+
----------------------------------------------------------------------
127+
Non-PAT | PAT
128+
PAT
129+
|PCD
130+
||PWT
131+
|||
132+
WC 000 WB _PAGE_CACHE_MODE_WB WC | WC
133+
WC 001 WC _PAGE_CACHE_MODE_WC WC* | WC
134+
WC 010 UC- _PAGE_CACHE_MODE_UC_MINUS WC* | UC
135+
WC 011 UC _PAGE_CACHE_MODE_UC UC | UC
136+
----------------------------------------------------------------------
137+
138+
(*) denotes implementation defined and is discouraged
106139

107140
Notes:
108141

‎arch/ia64/include/asm/irq_remapping.h

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,4 @@
11
#ifndef __IA64_INTR_REMAPPING_H
22
#define __IA64_INTR_REMAPPING_H
33
#define irq_remapping_enabled 0
4-
#define dmar_alloc_hwirq create_irq
5-
#define dmar_free_hwirq destroy_irq
64
#endif

‎arch/ia64/kernel/msi_ia64.c

Lines changed: 19 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -165,7 +165,7 @@ static struct irq_chip dmar_msi_type = {
165165
.irq_retrigger = ia64_msi_retrigger_irq,
166166
};
167167

168-
static int
168+
static void
169169
msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_msg *msg)
170170
{
171171
struct irq_cfg *cfg = irq_cfg + irq;
@@ -186,21 +186,29 @@ msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_msg *msg)
186186
MSI_DATA_LEVEL_ASSERT |
187187
MSI_DATA_DELIVERY_FIXED |
188188
MSI_DATA_VECTOR(cfg->vector);
189-
return 0;
190189
}
191190

192-
int arch_setup_dmar_msi(unsigned int irq)
191+
int dmar_alloc_hwirq(int id, int node, void *arg)
193192
{
194-
int ret;
193+
int irq;
195194
struct msi_msg msg;
196195

197-
ret = msi_compose_msg(NULL, irq, &msg);
198-
if (ret < 0)
199-
return ret;
200-
dmar_msi_write(irq, &msg);
201-
irq_set_chip_and_handler_name(irq, &dmar_msi_type, handle_edge_irq,
202-
"edge");
203-
return 0;
196+
irq = create_irq();
197+
if (irq > 0) {
198+
irq_set_handler_data(irq, arg);
199+
irq_set_chip_and_handler_name(irq, &dmar_msi_type,
200+
handle_edge_irq, "edge");
201+
msi_compose_msg(NULL, irq, &msg);
202+
dmar_msi_write(irq, &msg);
203+
}
204+
205+
return irq;
206+
}
207+
208+
void dmar_free_hwirq(int irq)
209+
{
210+
irq_set_handler_data(irq, NULL);
211+
destroy_irq(irq);
204212
}
205213
#endif /* CONFIG_INTEL_IOMMU */
206214

‎arch/x86/Kconfig

Lines changed: 8 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -100,7 +100,7 @@ config X86
100100
select IRQ_FORCED_THREADING
101101
select HAVE_BPF_JIT if X86_64
102102
select HAVE_ARCH_TRANSPARENT_HUGEPAGE
103-
select HAVE_ARCH_HUGE_VMAP if X86_64 || (X86_32 && X86_PAE)
103+
select HAVE_ARCH_HUGE_VMAP if X86_64 || X86_PAE
104104
select ARCH_HAS_SG_CHAIN
105105
select CLKEVT_I8253
106106
select ARCH_HAVE_NMI_SAFE_CMPXCHG
@@ -341,7 +341,7 @@ config X86_FEATURE_NAMES
341341

342342
config X86_X2APIC
343343
bool "Support x2apic"
344-
depends on X86_LOCAL_APIC && X86_64 && IRQ_REMAP
344+
depends on X86_LOCAL_APIC && X86_64 && (IRQ_REMAP || HYPERVISOR_GUEST)
345345
---help---
346346
This enables x2apic support on CPUs that have this feature.
347347

@@ -441,6 +441,7 @@ config X86_UV
441441
depends on X86_EXTENDED_PLATFORM
442442
depends on NUMA
443443
depends on X86_X2APIC
444+
depends on PCI
444445
---help---
445446
This option is needed in order to support SGI Ultraviolet systems.
446447
If you don't have one of these, you should say N here.
@@ -466,7 +467,6 @@ config X86_INTEL_CE
466467
select X86_REBOOTFIXUPS
467468
select OF
468469
select OF_EARLY_FLATTREE
469-
select IRQ_DOMAIN
470470
---help---
471471
Select for the Intel CE media processor (CE4100) SOC.
472472
This option compiles in support for the CE4100 SOC for settop
@@ -851,11 +851,12 @@ config NR_CPUS
851851
default "1" if !SMP
852852
default "8192" if MAXSMP
853853
default "32" if SMP && X86_BIGSMP
854-
default "8" if SMP
854+
default "8" if SMP && X86_32
855+
default "64" if SMP
855856
---help---
856857
This allows you to specify the maximum number of CPUs which this
857858
kernel will support. If CPUMASK_OFFSTACK is enabled, the maximum
858-
supported value is 4096, otherwise the maximum value is 512. The
859+
supported value is 8192, otherwise the maximum value is 512. The
859860
minimum value which makes sense is 2.
860861

861862
This is purely to save memory - each supported CPU adds
@@ -914,12 +915,12 @@ config X86_UP_IOAPIC
914915
config X86_LOCAL_APIC
915916
def_bool y
916917
depends on X86_64 || SMP || X86_32_NON_STANDARD || X86_UP_APIC || PCI_MSI
917-
select GENERIC_IRQ_LEGACY_ALLOC_HWIRQ
918+
select IRQ_DOMAIN_HIERARCHY
919+
select PCI_MSI_IRQ_DOMAIN if PCI_MSI
918920

919921
config X86_IO_APIC
920922
def_bool y
921923
depends on X86_LOCAL_APIC || X86_UP_IOAPIC
922-
select IRQ_DOMAIN
923924

924925
config X86_REROUTE_FOR_BROKEN_BOOT_IRQS
925926
bool "Reroute for broken boot IRQs"

‎arch/x86/Kconfig.debug

Lines changed: 11 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -332,4 +332,15 @@ config X86_DEBUG_STATIC_CPU_HAS
332332

333333
If unsure, say N.
334334

335+
config PUNIT_ATOM_DEBUG
336+
tristate "ATOM Punit debug driver"
337+
select DEBUG_FS
338+
select IOSF_MBI
339+
---help---
340+
This is a debug driver, which gets the power states
341+
of all Punit North Complex devices. The power states of
342+
each device is exposed as part of the debugfs interface.
343+
The current power state can be read from
344+
/sys/kernel/debug/punit_atom/dev_power_state
345+
335346
endmenu

‎arch/x86/Makefile

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -77,13 +77,22 @@ else
7777
KBUILD_AFLAGS += -m64
7878
KBUILD_CFLAGS += -m64
7979

80+
# Align jump targets to 1 byte, not the default 16 bytes:
81+
KBUILD_CFLAGS += -falign-jumps=1
82+
83+
# Pack loops tightly as well:
84+
KBUILD_CFLAGS += -falign-loops=1
85+
8086
# Don't autogenerate traditional x87 instructions
8187
KBUILD_CFLAGS += $(call cc-option,-mno-80387)
8288
KBUILD_CFLAGS += $(call cc-option,-mno-fp-ret-in-387)
8389

8490
# Use -mpreferred-stack-boundary=3 if supported.
8591
KBUILD_CFLAGS += $(call cc-option,-mpreferred-stack-boundary=3)
8692

93+
# Use -mskip-rax-setup if supported.
94+
KBUILD_CFLAGS += $(call cc-option,-mskip-rax-setup)
95+
8796
# FIXME - should be integrated in Makefile.cpu (Makefile_32.cpu)
8897
cflags-$(CONFIG_MK8) += $(call cc-option,-march=k8)
8998
cflags-$(CONFIG_MPSC) += $(call cc-option,-march=nocona)

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