@@ -122,23 +122,37 @@ enum {
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HOST_VERSION = 0x10 , /* AHCI spec. version compliancy */
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HOST_EM_LOC = 0x1c , /* Enclosure Management location */
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HOST_EM_CTL = 0x20 , /* Enclosure Management Control */
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+ HOST_CAP2 = 0x24 , /* host capabilities, extended */
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/* HOST_CTL bits */
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HOST_RESET = (1 << 0 ), /* reset controller; self-clear */
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HOST_IRQ_EN = (1 << 1 ), /* global IRQ enable */
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HOST_AHCI_EN = (1 << 31 ), /* AHCI enabled */
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/* HOST_CAP bits */
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+ HOST_CAP_SXS = (1 << 5 ), /* Supports External SATA */
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HOST_CAP_EMS = (1 << 6 ), /* Enclosure Management support */
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- HOST_CAP_SSC = (1 << 14 ), /* Slumber capable */
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+ HOST_CAP_CCC = (1 << 7 ), /* Command Completion Coalescing */
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+ HOST_CAP_PART = (1 << 13 ), /* Partial state capable */
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+ HOST_CAP_SSC = (1 << 14 ), /* Slumber state capable */
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+ HOST_CAP_PIO_MULTI = (1 << 15 ), /* PIO multiple DRQ support */
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+ HOST_CAP_FBS = (1 << 16 ), /* FIS-based switching support */
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HOST_CAP_PMP = (1 << 17 ), /* Port Multiplier support */
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+ HOST_CAP_ONLY = (1 << 18 ), /* Supports AHCI mode only */
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HOST_CAP_CLO = (1 << 24 ), /* Command List Override support */
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+ HOST_CAP_LED = (1 << 25 ), /* Supports activity LED */
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HOST_CAP_ALPM = (1 << 26 ), /* Aggressive Link PM support */
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HOST_CAP_SSS = (1 << 27 ), /* Staggered Spin-up */
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+ HOST_CAP_MPS = (1 << 28 ), /* Mechanical presence switch */
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HOST_CAP_SNTF = (1 << 29 ), /* SNotification register */
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HOST_CAP_NCQ = (1 << 30 ), /* Native Command Queueing */
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HOST_CAP_64 = (1 << 31 ), /* PCI DAC (64-bit DMA) support */
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+ /* HOST_CAP2 bits */
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+ HOST_CAP2_BOH = (1 << 0 ), /* BIOS/OS handoff supported */
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+ HOST_CAP2_NVMHCI = (1 << 1 ), /* NVMHCI supported */
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+ HOST_CAP2_APST = (1 << 2 ), /* Automatic partial to slumber */
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+
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/* registers for each SATA port */
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PORT_LST_ADDR = 0x00 , /* command list DMA addr */
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PORT_LST_ADDR_HI = 0x04 , /* command list DMA addr hi */
@@ -267,8 +281,10 @@ struct ahci_em_priv {
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struct ahci_host_priv {
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unsigned int flags ; /* AHCI_HFLAG_* */
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u32 cap ; /* cap to use */
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+ u32 cap2 ; /* cap2 to use */
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u32 port_map ; /* port map to use */
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u32 saved_cap ; /* saved initial cap */
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+ u32 saved_cap2 ; /* saved initial cap2 */
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u32 saved_port_map ; /* saved initial port_map */
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u32 em_loc ; /* enclosure management location */
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};
@@ -331,12 +347,15 @@ static void ahci_init_sw_activity(struct ata_link *link);
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static ssize_t ahci_show_host_caps (struct device * dev ,
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struct device_attribute * attr , char * buf );
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+ static ssize_t ahci_show_host_cap2 (struct device * dev ,
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+ struct device_attribute * attr , char * buf );
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static ssize_t ahci_show_host_version (struct device * dev ,
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struct device_attribute * attr , char * buf );
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static ssize_t ahci_show_port_cmd (struct device * dev ,
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struct device_attribute * attr , char * buf );
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DEVICE_ATTR (ahci_host_caps , S_IRUGO , ahci_show_host_caps , NULL );
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+ DEVICE_ATTR (ahci_host_cap2 , S_IRUGO , ahci_show_host_cap2 , NULL );
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DEVICE_ATTR (ahci_host_version , S_IRUGO , ahci_show_host_version , NULL );
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DEVICE_ATTR (ahci_port_cmd , S_IRUGO , ahci_show_port_cmd , NULL );
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@@ -345,6 +364,7 @@ static struct device_attribute *ahci_shost_attrs[] = {
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& dev_attr_em_message_type ,
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& dev_attr_em_message ,
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& dev_attr_ahci_host_caps ,
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+ & dev_attr_ahci_host_cap2 ,
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& dev_attr_ahci_host_version ,
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& dev_attr_ahci_port_cmd ,
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NULL
@@ -447,7 +467,8 @@ static const struct ata_port_info ahci_port_info[] = {
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[board_ahci_sb600 ] =
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{
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AHCI_HFLAGS (AHCI_HFLAG_IGN_SERR_INTERNAL |
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- AHCI_HFLAG_NO_MSI | AHCI_HFLAG_SECT255 ),
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+ AHCI_HFLAG_NO_MSI | AHCI_HFLAG_SECT255 |
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+ AHCI_HFLAG_32BIT_ONLY ),
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.flags = AHCI_FLAG_COMMON ,
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.pio_mask = ATA_PIO4 ,
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.udma_mask = ATA_UDMA6 ,
@@ -732,6 +753,16 @@ static ssize_t ahci_show_host_caps(struct device *dev,
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return sprintf (buf , "%x\n" , hpriv -> cap );
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}
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+ static ssize_t ahci_show_host_cap2 (struct device * dev ,
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+ struct device_attribute * attr , char * buf )
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+ {
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+ struct Scsi_Host * shost = class_to_shost (dev );
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+ struct ata_port * ap = ata_shost_to_port (shost );
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+ struct ahci_host_priv * hpriv = ap -> host -> private_data ;
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+
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+ return sprintf (buf , "%x\n" , hpriv -> cap2 );
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+ }
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+
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static ssize_t ahci_show_host_version (struct device * dev ,
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struct device_attribute * attr , char * buf )
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{
@@ -771,7 +802,7 @@ static void ahci_save_initial_config(struct pci_dev *pdev,
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struct ahci_host_priv * hpriv )
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{
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void __iomem * mmio = pcim_iomap_table (pdev )[AHCI_PCI_BAR ];
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- u32 cap , port_map ;
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+ u32 cap , cap2 , vers , port_map ;
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int i ;
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int mv ;
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@@ -784,6 +815,14 @@ static void ahci_save_initial_config(struct pci_dev *pdev,
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hpriv -> saved_cap = cap = readl (mmio + HOST_CAP );
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hpriv -> saved_port_map = port_map = readl (mmio + HOST_PORTS_IMPL );
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+ /* CAP2 register is only defined for AHCI 1.2 and later */
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+ vers = readl (mmio + HOST_VERSION );
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+ if ((vers >> 16 ) > 1 ||
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+ ((vers >> 16 ) == 1 && (vers & 0xFFFF ) >= 0x200 ))
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+ hpriv -> saved_cap2 = cap2 = readl (mmio + HOST_CAP2 );
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+ else
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+ hpriv -> saved_cap2 = cap2 = 0 ;
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+
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/* some chips have errata preventing 64bit use */
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if ((cap & HOST_CAP_64 ) && (hpriv -> flags & AHCI_HFLAG_32BIT_ONLY )) {
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dev_printk (KERN_INFO , & pdev -> dev ,
@@ -869,6 +908,7 @@ static void ahci_save_initial_config(struct pci_dev *pdev,
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/* record values to use during operation */
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hpriv -> cap = cap ;
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+ hpriv -> cap2 = cap2 ;
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hpriv -> port_map = port_map ;
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}
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@@ -887,6 +927,8 @@ static void ahci_restore_initial_config(struct ata_host *host)
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void __iomem * mmio = host -> iomap [AHCI_PCI_BAR ];
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writel (hpriv -> saved_cap , mmio + HOST_CAP );
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+ if (hpriv -> saved_cap2 )
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+ writel (hpriv -> saved_cap2 , mmio + HOST_CAP2 );
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writel (hpriv -> saved_port_map , mmio + HOST_PORTS_IMPL );
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(void ) readl (mmio + HOST_PORTS_IMPL ); /* flush */
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}
@@ -2534,13 +2576,14 @@ static void ahci_print_info(struct ata_host *host)
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struct ahci_host_priv * hpriv = host -> private_data ;
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struct pci_dev * pdev = to_pci_dev (host -> dev );
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void __iomem * mmio = host -> iomap [AHCI_PCI_BAR ];
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- u32 vers , cap , impl , speed ;
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+ u32 vers , cap , cap2 , impl , speed ;
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const char * speed_s ;
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u16 cc ;
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const char * scc_s ;
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vers = readl (mmio + HOST_VERSION );
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cap = hpriv -> cap ;
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+ cap2 = hpriv -> cap2 ;
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impl = hpriv -> port_map ;
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speed = (cap >> 20 ) & 0xf ;
@@ -2583,25 +2626,29 @@ static void ahci_print_info(struct ata_host *host)
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"flags: "
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"%s%s%s%s%s%s%s"
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"%s%s%s%s%s%s%s"
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- "%s\n"
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+ "%s%s%s%s%s%s \n"
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,
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- cap & (1 << 31 ) ? "64bit " : "" ,
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- cap & (1 << 30 ) ? "ncq " : "" ,
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- cap & (1 << 29 ) ? "sntf " : "" ,
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- cap & (1 << 28 ) ? "ilck " : "" ,
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- cap & (1 << 27 ) ? "stag " : "" ,
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- cap & (1 << 26 ) ? "pm " : "" ,
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- cap & (1 << 25 ) ? "led " : "" ,
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-
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- cap & (1 << 24 ) ? "clo " : "" ,
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- cap & (1 << 19 ) ? "nz " : "" ,
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- cap & (1 << 18 ) ? "only " : "" ,
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- cap & (1 << 17 ) ? "pmp " : "" ,
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- cap & (1 << 15 ) ? "pio " : "" ,
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- cap & (1 << 14 ) ? "slum " : "" ,
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- cap & (1 << 13 ) ? "part " : "" ,
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- cap & (1 << 6 ) ? "ems " : ""
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+ cap & HOST_CAP_64 ? "64bit " : "" ,
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+ cap & HOST_CAP_NCQ ? "ncq " : "" ,
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+ cap & HOST_CAP_SNTF ? "sntf " : "" ,
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+ cap & HOST_CAP_MPS ? "ilck " : "" ,
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+ cap & HOST_CAP_SSS ? "stag " : "" ,
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+ cap & HOST_CAP_ALPM ? "pm " : "" ,
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+ cap & HOST_CAP_LED ? "led " : "" ,
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+ cap & HOST_CAP_CLO ? "clo " : "" ,
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+ cap & HOST_CAP_ONLY ? "only " : "" ,
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+ cap & HOST_CAP_PMP ? "pmp " : "" ,
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+ cap & HOST_CAP_FBS ? "fbs " : "" ,
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+ cap & HOST_CAP_PIO_MULTI ? "pio " : "" ,
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+ cap & HOST_CAP_SSC ? "slum " : "" ,
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+ cap & HOST_CAP_PART ? "part " : "" ,
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+ cap & HOST_CAP_CCC ? "ccc " : "" ,
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+ cap & HOST_CAP_EMS ? "ems " : "" ,
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+ cap & HOST_CAP_SXS ? "sxs " : "" ,
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+ cap2 & HOST_CAP2_APST ? "apst " : "" ,
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+ cap2 & HOST_CAP2_NVMHCI ? "nvmp " : "" ,
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+ cap2 & HOST_CAP2_BOH ? "boh " : ""
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);
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}
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@@ -2650,17 +2697,15 @@ static void ahci_p5wdh_workaround(struct ata_host *host)
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}
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}
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- /*
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- * SB600 ahci controller on certain boards can't do 64bit DMA with
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- * older BIOS.
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- */
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- static bool ahci_sb600_32bit_only (struct pci_dev * pdev )
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+ /* only some SB600 ahci controllers can do 64bit DMA */
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+ static bool ahci_sb600_enable_64bit (struct pci_dev * pdev )
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{
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static const struct dmi_system_id sysids [] = {
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/*
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* The oldest version known to be broken is 0901 and
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* working is 1501 which was released on 2007-10-26.
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- * Force 32bit DMA on anything older than 1501.
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+ * Enable 64bit DMA on 1501 and anything newer.
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+ *
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* Please read bko#9412 for more info.
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*/
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{
@@ -2672,48 +2717,29 @@ static bool ahci_sb600_32bit_only(struct pci_dev *pdev)
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},
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.driver_data = "20071026" , /* yyyymmdd */
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},
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- /*
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- * It's yet unknown whether more recent BIOS fixes the
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- * problem. Blacklist the whole board for the time
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- * being. Please read the following thread for more
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- * info.
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- *
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- * http://thread.gmane.org/gmane.linux.ide/42326
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- */
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- {
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- .ident = "Gigabyte GA-MA69VM-S2" ,
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- .matches = {
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- DMI_MATCH (DMI_BOARD_VENDOR ,
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- "Gigabyte Technology Co., Ltd." ),
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- DMI_MATCH (DMI_BOARD_NAME , "GA-MA69VM-S2" ),
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- },
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- },
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{ }
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};
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const struct dmi_system_id * match ;
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+ int year , month , date ;
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+ char buf [9 ];
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match = dmi_first_match (sysids );
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if (pdev -> bus -> number != 0 || pdev -> devfn != PCI_DEVFN (0x12 , 0 ) ||
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!match )
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return false;
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- if (match -> driver_data ) {
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- int year , month , date ;
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- char buf [9 ];
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-
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- dmi_get_date (DMI_BIOS_DATE , & year , & month , & date );
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- snprintf (buf , sizeof (buf ), "%04d%02d%02d" , year , month , date );
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-
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- if (strcmp (buf , match -> driver_data ) >= 0 )
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- return false;
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+ dmi_get_date (DMI_BIOS_DATE , & year , & month , & date );
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+ snprintf (buf , sizeof (buf ), "%04d%02d%02d" , year , month , date );
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+ if (strcmp (buf , match -> driver_data ) >= 0 ) {
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+ dev_printk (KERN_WARNING , & pdev -> dev , "%s: enabling 64bit DMA\n" ,
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+ match -> ident );
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+ return true;
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+ } else {
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dev_printk (KERN_WARNING , & pdev -> dev , "%s: BIOS too old, "
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"forcing 32bit DMA, update BIOS\n" , match -> ident );
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- } else
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- dev_printk (KERN_WARNING , & pdev -> dev , "%s: this board can't "
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- "do 64bit DMA, forcing 32bit\n" , match -> ident );
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-
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- return true;
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+ return false;
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+ }
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}
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static bool ahci_broken_system_poweroff (struct pci_dev * pdev )
@@ -2858,6 +2884,50 @@ static bool ahci_broken_online(struct pci_dev *pdev)
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return pdev -> bus -> number == (val >> 8 ) && pdev -> devfn == (val & 0xff );
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}
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+ static void ahci_gtf_filter_workaround (struct ata_host * host )
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+ {
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+ static const struct dmi_system_id sysids [] = {
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+ /*
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+ * Aspire 3810T issues a bunch of SATA enable commands
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+ * via _GTF including an invalid one and one which is
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+ * rejected by the device. Among the successful ones
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+ * is FPDMA non-zero offset enable which when enabled
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+ * only on the drive side leads to NCQ command
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+ * failures. Filter it out.
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+ */
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+ {
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+ .ident = "Aspire 3810T" ,
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+ .matches = {
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+ DMI_MATCH (DMI_SYS_VENDOR , "Acer" ),
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+ DMI_MATCH (DMI_PRODUCT_NAME , "Aspire 3810T" ),
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+ },
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+ .driver_data = (void * )ATA_ACPI_FILTER_FPDMA_OFFSET ,
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+ },
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+ { }
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+ };
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+ const struct dmi_system_id * dmi = dmi_first_match (sysids );
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+ unsigned int filter ;
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+ int i ;
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+
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+ if (!dmi )
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+ return ;
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+
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+ filter = (unsigned long )dmi -> driver_data ;
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+ dev_printk (KERN_INFO , host -> dev ,
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+ "applying extra ACPI _GTF filter 0x%x for %s\n" ,
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+ filter , dmi -> ident );
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+
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+ for (i = 0 ; i < host -> n_ports ; i ++ ) {
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+ struct ata_port * ap = host -> ports [i ];
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+ struct ata_link * link ;
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+ struct ata_device * dev ;
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+
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+ ata_for_each_link (link , ap , EDGE )
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+ ata_for_each_dev (dev , link , ALL )
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+ dev -> gtf_filter |= filter ;
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+ }
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+ }
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+
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static int ahci_init_one (struct pci_dev * pdev , const struct pci_device_id * ent )
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{
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static int printed_version ;
@@ -2926,9 +2996,9 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
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if (board_id == board_ahci_sb700 && pdev -> revision >= 0x40 )
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hpriv -> flags &= ~AHCI_HFLAG_IGN_SERR_INTERNAL ;
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- /* apply sb600 32bit only quirk */
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- if (ahci_sb600_32bit_only (pdev ))
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- hpriv -> flags |= AHCI_HFLAG_32BIT_ONLY ;
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+ /* only some SB600s can do 64bit DMA */
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+ if (ahci_sb600_enable_64bit (pdev ))
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+ hpriv -> flags &= ~ AHCI_HFLAG_32BIT_ONLY ;
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if ((hpriv -> flags & AHCI_HFLAG_NO_MSI ) || pci_enable_msi (pdev ))
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pci_intx (pdev , 1 );
@@ -3023,6 +3093,9 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
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/* apply workaround for ASUS P5W DH Deluxe mainboard */
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ahci_p5wdh_workaround (host );
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+ /* apply gtf filter quirk */
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+ ahci_gtf_filter_workaround (host );
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+
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/* initialize adapter */
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rc = ahci_configure_dma_masks (pdev , hpriv -> cap & HOST_CAP_64 );
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if (rc )
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