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Russell Kinglinusw
Russell King
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linusw
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gpio: add generic single-register fixed-direction GPIO driver
Add a simple, generic, single register fixed-direction GPIO driver. This is able to support a single register with a mixture of inputs and outputs. This is different from gpio-mmio and gpio-74xx-mmio: * gpio-mmio doesn't allow a fixed direction, it assumes there is always a direction register. * gpio-74xx-mmio only supports all-in or all-out setups * gpio-74xx-mmio is DT only, this needs to support legacy too * they don't double-read when getting the GPIO value, as required by some implementations that this driver supports * we need to always do 32-bit reads, which bgpio doesn't guarantee * the current output state may not be readable from the hardware register - reading may reflect input status but not output status. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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‎drivers/gpio/Kconfig

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@@ -380,6 +380,12 @@ config GPIO_RCAR
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help
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Say yes here to support GPIO on Renesas R-Car SoCs.
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config GPIO_REG
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bool
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help
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A 32-bit single register GPIO fixed in/out implementation. This
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can be used to represent any register as a set of GPIO signals.
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config GPIO_SPEAR_SPICS
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bool "ST SPEAr13xx SPI Chip Select as GPIO support"
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depends on PLAT_SPEAR

‎drivers/gpio/Makefile

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@@ -98,6 +98,7 @@ obj-$(CONFIG_GPIO_PXA) += gpio-pxa.o
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obj-$(CONFIG_GPIO_RC5T583) += gpio-rc5t583.o
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obj-$(CONFIG_GPIO_RDC321X) += gpio-rdc321x.o
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obj-$(CONFIG_GPIO_RCAR) += gpio-rcar.o
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obj-$(CONFIG_GPIO_REG) += gpio-reg.o
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obj-$(CONFIG_ARCH_SA1100) += gpio-sa1100.o
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obj-$(CONFIG_GPIO_SCH) += gpio-sch.o
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obj-$(CONFIG_GPIO_SCH311X) += gpio-sch311x.o

‎drivers/gpio/gpio-reg.c

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/*
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* gpio-reg: single register individually fixed-direction GPIOs
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*
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* Copyright (C) 2016 Russell King
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*/
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#include <linux/gpio/driver.h>
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#include <linux/gpio/gpio-reg.h>
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#include <linux/io.h>
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#include <linux/slab.h>
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#include <linux/spinlock.h>
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struct gpio_reg {
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struct gpio_chip gc;
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spinlock_t lock;
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u32 direction;
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u32 out;
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void __iomem *reg;
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};
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#define to_gpio_reg(x) container_of(x, struct gpio_reg, gc)
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static int gpio_reg_get_direction(struct gpio_chip *gc, unsigned offset)
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{
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struct gpio_reg *r = to_gpio_reg(gc);
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return r->direction & BIT(offset) ? 1 : 0;
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}
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static int gpio_reg_direction_output(struct gpio_chip *gc, unsigned offset,
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int value)
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{
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struct gpio_reg *r = to_gpio_reg(gc);
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if (r->direction & BIT(offset))
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return -ENOTSUPP;
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gc->set(gc, offset, value);
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return 0;
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}
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static int gpio_reg_direction_input(struct gpio_chip *gc, unsigned offset)
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{
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struct gpio_reg *r = to_gpio_reg(gc);
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return r->direction & BIT(offset) ? 0 : -ENOTSUPP;
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}
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static void gpio_reg_set(struct gpio_chip *gc, unsigned offset, int value)
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{
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struct gpio_reg *r = to_gpio_reg(gc);
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unsigned long flags;
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u32 val, mask = BIT(offset);
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spin_lock_irqsave(&r->lock, flags);
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val = r->out;
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if (value)
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val |= mask;
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else
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val &= ~mask;
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r->out = val;
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writel_relaxed(val, r->reg);
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spin_unlock_irqrestore(&r->lock, flags);
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}
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static int gpio_reg_get(struct gpio_chip *gc, unsigned offset)
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{
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struct gpio_reg *r = to_gpio_reg(gc);
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u32 val, mask = BIT(offset);
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if (r->direction & mask) {
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/*
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* double-read the value, some registers latch after the
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* first read.
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*/
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readl_relaxed(r->reg);
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val = readl_relaxed(r->reg);
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} else {
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val = r->out;
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}
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return !!(val & mask);
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}
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static void gpio_reg_set_multiple(struct gpio_chip *gc, unsigned long *mask,
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unsigned long *bits)
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{
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struct gpio_reg *r = to_gpio_reg(gc);
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unsigned long flags;
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spin_lock_irqsave(&r->lock, flags);
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r->out = (r->out & ~*mask) | (*bits & *mask);
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writel_relaxed(r->out, r->reg);
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spin_unlock_irqrestore(&r->lock, flags);
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}
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/**
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* gpio_reg_init - add a fixed in/out register as gpio
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* @dev: optional struct device associated with this register
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* @base: start gpio number, or -1 to allocate
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* @num: number of GPIOs, maximum 32
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* @label: GPIO chip label
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* @direction: bitmask of fixed direction, one per GPIO signal, 1 = in
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* @def_out: initial GPIO output value
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* @names: array of %num strings describing each GPIO signal
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*
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* Add a single-register GPIO device containing up to 32 GPIO signals,
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* where each GPIO has a fixed input or output configuration. Only
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* input GPIOs are assumed to be readable from the register, and only
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* then after a double-read. Output values are assumed not to be
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* readable.
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*/
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struct gpio_chip *gpio_reg_init(struct device *dev, void __iomem *reg,
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int base, int num, const char *label, u32 direction, u32 def_out,
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const char *const *names)
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{
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struct gpio_reg *r;
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int ret;
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if (dev)
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r = devm_kzalloc(dev, sizeof(*r), GFP_KERNEL);
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else
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r = kzalloc(sizeof(*r), GFP_KERNEL);
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if (!r)
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return ERR_PTR(-ENOMEM);
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spin_lock_init(&r->lock);
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r->gc.label = label;
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r->gc.get_direction = gpio_reg_get_direction;
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r->gc.direction_input = gpio_reg_direction_input;
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r->gc.direction_output = gpio_reg_direction_output;
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r->gc.set = gpio_reg_set;
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r->gc.get = gpio_reg_get;
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r->gc.set_multiple = gpio_reg_set_multiple;
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r->gc.base = base;
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r->gc.ngpio = num;
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r->gc.names = names;
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r->direction = direction;
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r->out = def_out;
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r->reg = reg;
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if (dev)
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ret = devm_gpiochip_add_data(dev, &r->gc, r);
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else
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ret = gpiochip_add_data(&r->gc, r);
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return ret ? ERR_PTR(ret) : &r->gc;
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}
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int gpio_reg_resume(struct gpio_chip *gc)
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{
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struct gpio_reg *r = to_gpio_reg(gc);
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unsigned long flags;
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spin_lock_irqsave(&r->lock, flags);
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writel_relaxed(r->out, r->reg);
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spin_unlock_irqrestore(&r->lock, flags);
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return 0;
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}

‎include/linux/gpio/gpio-reg.h

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#ifndef GPIO_REG_H
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#define GPIO_REG_H
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struct device;
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struct gpio_chip *gpio_reg_init(struct device *dev, void __iomem *reg,
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int base, int num, const char *label, u32 direction, u32 def_out,
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const char *const *names);
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int gpio_reg_resume(struct gpio_chip *gc);
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#endif

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