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drm/i915: Introduce concept of per-timeline (context) HWSP
Supplement the per-engine HWSP with a per-timeline HWSP. That is a per-request pointer through which we can check a local seqno, abstracting away the presumption of a global seqno. In this first step, we point each request back into the engine's HWSP so everything continues to work with the global timeline. v2: s/i915_request_hwsp/hwsp_seqno/ to emphasis that this is the current HW value and that we are accessing it via i915_request merely as a convenience. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: John Harrison <John.C.Harrison@Intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190128181812.22804-1-chris@chris-wilson.co.uk
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+55
-15
lines changed

3 files changed

+55
-15
lines changed

‎drivers/gpu/drm/i915/i915_request.c

Lines changed: 11 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -182,10 +182,11 @@ static void free_capture_list(struct i915_request *request)
182182
static void __retire_engine_request(struct intel_engine_cs *engine,
183183
struct i915_request *rq)
184184
{
185-
GEM_TRACE("%s(%s) fence %llx:%lld, global=%d, current %d\n",
185+
GEM_TRACE("%s(%s) fence %llx:%lld, global=%d, current %d:%d\n",
186186
__func__, engine->name,
187187
rq->fence.context, rq->fence.seqno,
188188
rq->global_seqno,
189+
hwsp_seqno(rq),
189190
intel_engine_get_seqno(engine));
190191

191192
GEM_BUG_ON(!i915_request_completed(rq));
@@ -244,10 +245,11 @@ static void i915_request_retire(struct i915_request *request)
244245
{
245246
struct i915_gem_active *active, *next;
246247

247-
GEM_TRACE("%s fence %llx:%lld, global=%d, current %d\n",
248+
GEM_TRACE("%s fence %llx:%lld, global=%d, current %d:%d\n",
248249
request->engine->name,
249250
request->fence.context, request->fence.seqno,
250251
request->global_seqno,
252+
hwsp_seqno(request),
251253
intel_engine_get_seqno(request->engine));
252254

253255
lockdep_assert_held(&request->i915->drm.struct_mutex);
@@ -307,10 +309,11 @@ void i915_request_retire_upto(struct i915_request *rq)
307309
struct intel_ring *ring = rq->ring;
308310
struct i915_request *tmp;
309311

310-
GEM_TRACE("%s fence %llx:%lld, global=%d, current %d\n",
312+
GEM_TRACE("%s fence %llx:%lld, global=%d, current %d:%d\n",
311313
rq->engine->name,
312314
rq->fence.context, rq->fence.seqno,
313315
rq->global_seqno,
316+
hwsp_seqno(rq),
314317
intel_engine_get_seqno(rq->engine));
315318

316319
lockdep_assert_held(&rq->i915->drm.struct_mutex);
@@ -355,10 +358,11 @@ void __i915_request_submit(struct i915_request *request)
355358
struct intel_engine_cs *engine = request->engine;
356359
u32 seqno;
357360

358-
GEM_TRACE("%s fence %llx:%lld -> global=%d, current %d\n",
361+
GEM_TRACE("%s fence %llx:%lld -> global=%d, current %d:%d\n",
359362
engine->name,
360363
request->fence.context, request->fence.seqno,
361364
engine->timeline.seqno + 1,
365+
hwsp_seqno(request),
362366
intel_engine_get_seqno(engine));
363367

364368
GEM_BUG_ON(!irqs_disabled());
@@ -405,10 +409,11 @@ void __i915_request_unsubmit(struct i915_request *request)
405409
{
406410
struct intel_engine_cs *engine = request->engine;
407411

408-
GEM_TRACE("%s fence %llx:%lld <- global=%d, current %d\n",
412+
GEM_TRACE("%s fence %llx:%lld <- global=%d, current %d:%d\n",
409413
engine->name,
410414
request->fence.context, request->fence.seqno,
411415
request->global_seqno,
416+
hwsp_seqno(request),
412417
intel_engine_get_seqno(engine));
413418

414419
GEM_BUG_ON(!irqs_disabled());
@@ -616,6 +621,7 @@ i915_request_alloc(struct intel_engine_cs *engine, struct i915_gem_context *ctx)
616621
rq->ring = ce->ring;
617622
rq->timeline = ce->ring->timeline;
618623
GEM_BUG_ON(rq->timeline == &engine->timeline);
624+
rq->hwsp_seqno = &engine->status_page.addr[I915_GEM_HWS_INDEX];
619625

620626
spin_lock_init(&rq->lock);
621627
dma_fence_init(&rq->fence,

‎drivers/gpu/drm/i915/i915_request.h

Lines changed: 38 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -130,6 +130,13 @@ struct i915_request {
130130
struct i915_sched_node sched;
131131
struct i915_dependency dep;
132132

133+
/*
134+
* A convenience pointer to the current breadcrumb value stored in
135+
* the HW status page (or our timeline's local equivalent). The full
136+
* path would be rq->hw_context->ring->timeline->hwsp_seqno.
137+
*/
138+
const u32 *hwsp_seqno;
139+
133140
/**
134141
* GEM sequence number associated with this request on the
135142
* global execution timeline. It is zero when the request is not
@@ -285,11 +292,6 @@ static inline bool i915_request_signaled(const struct i915_request *rq)
285292
return test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &rq->fence.flags);
286293
}
287294

288-
static inline bool intel_engine_has_started(struct intel_engine_cs *engine,
289-
u32 seqno);
290-
static inline bool intel_engine_has_completed(struct intel_engine_cs *engine,
291-
u32 seqno);
292-
293295
/**
294296
* Returns true if seq1 is later than seq2.
295297
*/
@@ -298,6 +300,35 @@ static inline bool i915_seqno_passed(u32 seq1, u32 seq2)
298300
return (s32)(seq1 - seq2) >= 0;
299301
}
300302

303+
static inline u32 __hwsp_seqno(const struct i915_request *rq)
304+
{
305+
return READ_ONCE(*rq->hwsp_seqno);
306+
}
307+
308+
/**
309+
* hwsp_seqno - the current breadcrumb value in the HW status page
310+
* @rq: the request, to chase the relevant HW status page
311+
*
312+
* The emphasis in naming here is that hwsp_seqno() is not a property of the
313+
* request, but an indication of the current HW state (associated with this
314+
* request). Its value will change as the GPU executes more requests.
315+
*
316+
* Returns the current breadcrumb value in the associated HW status page (or
317+
* the local timeline's equivalent) for this request. The request itself
318+
* has the associated breadcrumb value of rq->fence.seqno, when the HW
319+
* status page has that breadcrumb or later, this request is complete.
320+
*/
321+
static inline u32 hwsp_seqno(const struct i915_request *rq)
322+
{
323+
u32 seqno;
324+
325+
rcu_read_lock(); /* the HWSP may be freed at runtime */
326+
seqno = __hwsp_seqno(rq);
327+
rcu_read_unlock();
328+
329+
return seqno;
330+
}
331+
301332
/**
302333
* i915_request_started - check if the request has begun being executed
303334
* @rq: the request
@@ -315,14 +346,14 @@ static inline bool i915_request_started(const struct i915_request *rq)
315346
if (!seqno) /* not yet submitted to HW */
316347
return false;
317348

318-
return intel_engine_has_started(rq->engine, seqno);
349+
return i915_seqno_passed(hwsp_seqno(rq), seqno - 1);
319350
}
320351

321352
static inline bool
322353
__i915_request_completed(const struct i915_request *rq, u32 seqno)
323354
{
324355
GEM_BUG_ON(!seqno);
325-
return intel_engine_has_completed(rq->engine, seqno) &&
356+
return i915_seqno_passed(hwsp_seqno(rq), seqno) &&
326357
seqno == i915_request_global_seqno(rq);
327358
}
328359

‎drivers/gpu/drm/i915/intel_lrc.c

Lines changed: 6 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -446,11 +446,12 @@ static void execlists_submit_ports(struct intel_engine_cs *engine)
446446
desc = execlists_update_context(rq);
447447
GEM_DEBUG_EXEC(port[n].context_id = upper_32_bits(desc));
448448

449-
GEM_TRACE("%s in[%d]: ctx=%d.%d, global=%d (fence %llx:%lld) (current %d), prio=%d\n",
449+
GEM_TRACE("%s in[%d]: ctx=%d.%d, global=%d (fence %llx:%lld) (current %d:%d), prio=%d\n",
450450
engine->name, n,
451451
port[n].context_id, count,
452452
rq->global_seqno,
453453
rq->fence.context, rq->fence.seqno,
454+
hwsp_seqno(rq),
454455
intel_engine_get_seqno(engine),
455456
rq_prio(rq));
456457
} else {
@@ -742,11 +743,12 @@ execlists_cancel_port_requests(struct intel_engine_execlists * const execlists)
742743
while (num_ports-- && port_isset(port)) {
743744
struct i915_request *rq = port_request(port);
744745

745-
GEM_TRACE("%s:port%u global=%d (fence %llx:%lld), (current %d)\n",
746+
GEM_TRACE("%s:port%u global=%d (fence %llx:%lld), (current %d:%d)\n",
746747
rq->engine->name,
747748
(unsigned int)(port - execlists->port),
748749
rq->global_seqno,
749750
rq->fence.context, rq->fence.seqno,
751+
hwsp_seqno(rq),
750752
intel_engine_get_seqno(rq->engine));
751753

752754
GEM_BUG_ON(!execlists->active);
@@ -970,12 +972,13 @@ static void process_csb(struct intel_engine_cs *engine)
970972
EXECLISTS_ACTIVE_USER));
971973

972974
rq = port_unpack(port, &count);
973-
GEM_TRACE("%s out[0]: ctx=%d.%d, global=%d (fence %llx:%lld) (current %d), prio=%d\n",
975+
GEM_TRACE("%s out[0]: ctx=%d.%d, global=%d (fence %llx:%lld) (current %d:%d), prio=%d\n",
974976
engine->name,
975977
port->context_id, count,
976978
rq ? rq->global_seqno : 0,
977979
rq ? rq->fence.context : 0,
978980
rq ? rq->fence.seqno : 0,
981+
rq ? hwsp_seqno(rq) : 0,
979982
intel_engine_get_seqno(engine),
980983
rq ? rq_prio(rq) : 0);
981984

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