ARCv2: [axs103_smp] Reduce clk for SMP FPGA configs

Vineet Gupta · torvalds · commit 3ebb0540c20d · 2015-09-11T19:34:01.000-07:00
Newer bitfiles needs the reduced clk even for SMP builds

Cc: &lt;stable@vger.kernel.org&gt;  #4.2
Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
diff --git a/arch/arc/plat-axs10x/axs10x.c b/arch/arc/plat-axs10x/axs10x.c
@@ -402,6 +402,8 @@ static void __init axs103_early_init(void)
 	unsigned int num_cores = (read_aux_reg(ARC_REG_MCIP_BCR) >> 16) & 0x3F;
 	if (num_cores > 2)
 		arc_set_core_freq(50 * 1000000);
+	else if (num_cores == 2)
+		arc_set_core_freq(75 * 1000000);
 #endif
 
 	switch (arc_get_core_freq()/1000000) {
