@@ -379,8 +379,9 @@ void bgx_lmac_internal_loopback(int node, int bgx_idx,
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}
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EXPORT_SYMBOL (bgx_lmac_internal_loopback );
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- static int bgx_lmac_sgmii_init (struct bgx * bgx , int lmacid )
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+ static int bgx_lmac_sgmii_init (struct bgx * bgx , struct lmac * lmac )
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{
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+ int lmacid = lmac -> lmacid ;
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u64 cfg ;
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bgx_reg_modify (bgx , lmacid , BGX_GMP_GMI_TXX_THRESH , 0x30 );
@@ -409,6 +410,14 @@ static int bgx_lmac_sgmii_init(struct bgx *bgx, int lmacid)
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cfg |= (PCS_MRX_CTL_RST_AN | PCS_MRX_CTL_AN_EN );
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bgx_reg_write (bgx , lmacid , BGX_GMP_PCS_MRX_CTL , cfg );
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+ if (lmac -> lmac_type == BGX_MODE_QSGMII ) {
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+ /* Disable disparity check for QSGMII */
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+ cfg = bgx_reg_read (bgx , lmacid , BGX_GMP_PCS_MISCX_CTL );
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+ cfg &= ~PCS_MISC_CTL_DISP_EN ;
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+ bgx_reg_write (bgx , lmacid , BGX_GMP_PCS_MISCX_CTL , cfg );
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+ return 0 ;
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+ }
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+
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if (bgx_poll_reg (bgx , lmacid , BGX_GMP_PCS_MRX_STATUS ,
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PCS_MRX_STATUS_AN_CPT , false)) {
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dev_err (& bgx -> pdev -> dev , "BGX AN_CPT not completed\n" );
@@ -650,6 +659,14 @@ static void bgx_poll_for_link(struct work_struct *work)
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queue_delayed_work (lmac -> check_link , & lmac -> dwork , HZ * 2 );
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}
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+ static int phy_interface_mode (u8 lmac_type )
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+ {
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+ if (lmac_type == BGX_MODE_QSGMII )
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+ return PHY_INTERFACE_MODE_QSGMII ;
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+
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+ return PHY_INTERFACE_MODE_SGMII ;
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+ }
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+
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static int bgx_lmac_enable (struct bgx * bgx , u8 lmacid )
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{
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struct lmac * lmac ;
@@ -658,9 +675,10 @@ static int bgx_lmac_enable(struct bgx *bgx, u8 lmacid)
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lmac = & bgx -> lmac [lmacid ];
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lmac -> bgx = bgx ;
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- if (lmac -> lmac_type == BGX_MODE_SGMII ) {
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+ if ((lmac -> lmac_type == BGX_MODE_SGMII ) ||
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+ (lmac -> lmac_type == BGX_MODE_QSGMII )) {
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lmac -> is_sgmii = 1 ;
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- if (bgx_lmac_sgmii_init (bgx , lmacid ))
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+ if (bgx_lmac_sgmii_init (bgx , lmac ))
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return -1 ;
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} else {
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lmac -> is_sgmii = 0 ;
@@ -697,7 +715,7 @@ static int bgx_lmac_enable(struct bgx *bgx, u8 lmacid)
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if (phy_connect_direct (& lmac -> netdev , lmac -> phydev ,
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bgx_lmac_handler ,
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- PHY_INTERFACE_MODE_SGMII ))
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+ phy_interface_mode ( lmac -> lmac_type ) ))
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return - ENODEV ;
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phy_start_aneg (lmac -> phydev );
@@ -799,6 +817,11 @@ static void bgx_init_hw(struct bgx *bgx)
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bgx_reg_write (bgx , 0 , BGX_CMR_RX_STREERING + (i * 8 ), 0x00 );
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}
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+ static u8 bgx_get_lane2sds_cfg (struct bgx * bgx , struct lmac * lmac )
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+ {
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+ return (u8 )(bgx_reg_read (bgx , lmac -> lmacid , BGX_CMRX_CFG ) & 0xFF );
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+ }
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+
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static void bgx_print_qlm_mode (struct bgx * bgx , u8 lmacid )
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{
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struct device * dev = & bgx -> pdev -> dev ;
@@ -838,12 +861,22 @@ static void bgx_print_qlm_mode(struct bgx *bgx, u8 lmacid)
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else
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dev_info (dev , "%s: 40G_KR4\n" , (char * )str );
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break ;
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- default :
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- dev_info (dev , "%s: INVALID\n" , (char * )str );
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+ case BGX_MODE_QSGMII :
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+ if ((lmacid == 0 ) &&
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+ (bgx_get_lane2sds_cfg (bgx , lmac ) != lmacid ))
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+ return ;
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+ if ((lmacid == 2 ) &&
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+ (bgx_get_lane2sds_cfg (bgx , lmac ) == lmacid ))
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+ return ;
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+ dev_info (dev , "%s: QSGMII\n" , (char * )str );
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+ break ;
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+ case BGX_MODE_INVALID :
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+ /* Nothing to do */
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+ break ;
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}
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}
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- static void lmac_set_lane2sds (struct lmac * lmac )
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+ static void lmac_set_lane2sds (struct bgx * bgx , struct lmac * lmac )
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{
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switch (lmac -> lmac_type ) {
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case BGX_MODE_SGMII :
@@ -857,6 +890,14 @@ static void lmac_set_lane2sds(struct lmac *lmac)
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case BGX_MODE_RXAUI :
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lmac -> lane_to_sds = (lmac -> lmacid ) ? 0xE : 0x4 ;
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break ;
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+ case BGX_MODE_QSGMII :
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+ /* There is no way to determine if DLM0/2 is QSGMII or
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+ * DLM1/3 is configured to QSGMII as bootloader will
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+ * configure all LMACs, so take whatever is configured
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+ * by low level firmware.
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+ */
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+ lmac -> lane_to_sds = bgx_get_lane2sds_cfg (bgx , lmac );
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+ break ;
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default :
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lmac -> lane_to_sds = 0 ;
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break ;
@@ -882,7 +923,7 @@ static void bgx_set_lmac_config(struct bgx *bgx, u8 idx)
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lmac -> use_training =
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bgx_reg_read (bgx , 0 , BGX_SPUX_BR_PMD_CRTL ) &
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SPU_PMD_CRTL_TRAIN_EN ;
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- lmac_set_lane2sds (lmac );
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+ lmac_set_lane2sds (bgx , lmac );
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return ;
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}
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@@ -901,15 +942,15 @@ static void bgx_set_lmac_config(struct bgx *bgx, u8 idx)
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lmac -> use_training =
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bgx_reg_read (bgx , idx , BGX_SPUX_BR_PMD_CRTL ) &
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SPU_PMD_CRTL_TRAIN_EN ;
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- lmac_set_lane2sds (lmac );
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+ lmac_set_lane2sds (bgx , lmac );
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/* Set LMAC type of other lmac on same DLM i.e LMAC 1/3 */
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olmac = & bgx -> lmac [idx + 1 ];
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olmac -> lmac_type = lmac -> lmac_type ;
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olmac -> use_training =
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bgx_reg_read (bgx , idx + 1 , BGX_SPUX_BR_PMD_CRTL ) &
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SPU_PMD_CRTL_TRAIN_EN ;
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- lmac_set_lane2sds (olmac );
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+ lmac_set_lane2sds (bgx , olmac );
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}
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}
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@@ -920,7 +961,7 @@ static bool is_dlm0_in_bgx_mode(struct bgx *bgx)
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if (!bgx -> is_81xx )
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return true;
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- lmac = & bgx -> lmac [1 ];
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+ lmac = & bgx -> lmac [0 ];
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if (lmac -> lmac_type == BGX_MODE_INVALID )
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return false;
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@@ -946,7 +987,7 @@ static void bgx_get_qlm_mode(struct bgx *bgx)
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if (bgx -> lmac_count > MAX_LMAC_PER_BGX )
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bgx -> lmac_count = MAX_LMAC_PER_BGX ;
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- for (idx = 0 ; idx < bgx -> lmac_count ; idx ++ )
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+ for (idx = 0 ; idx < MAX_LMAC_PER_BGX ; idx ++ )
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bgx_set_lmac_config (bgx , idx );
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if (!bgx -> is_81xx ) {
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