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Min LiNipaLocal
Min Li
authored and
NipaLocal
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ptp: clockmatrix: Fix caps.max_adj to reflect DPLL_MAX_FREQ_OFFSET[MAX_FFO]
Query MAX_FREQ_OFFSET register to set the proper limit. Signed-off-by: Min Li <min.li.xe@renesas.com> Signed-off-by: NipaLocal <nipa@local>
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3 files changed

+36
-9
lines changed

3 files changed

+36
-9
lines changed

‎drivers/ptp/ptp_clockmatrix.c

Lines changed: 34 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -1038,7 +1038,7 @@ static int _idtcm_adjtime_deprecated(struct idtcm_channel *channel, s64 delta)
10381038
s64 now;
10391039

10401040
if (abs(delta) < PHASE_PULL_IN_THRESHOLD_NS_DEPRECATED) {
1041-
err = channel->do_phase_pull_in(channel, delta, 0);
1041+
err = channel->do_phase_pull_in(channel, delta, channel->caps.max_adj);
10421042
} else {
10431043
idtcm->calculate_overhead_flag = 1;
10441044

@@ -1594,7 +1594,7 @@ static int do_phase_pull_in_sw(struct idtcm_channel *channel,
15941594
if (abs(delta_ns) < PHASE_PULL_IN_MIN_THRESHOLD_NS)
15951595
return 0;
15961596

1597-
if (max_ffo_ppb == 0)
1597+
if (max_ffo_ppb == 0 || max_ffo_ppb > PHASE_PULL_IN_MAX_PPB)
15981598
max_ffo_ppb = PHASE_PULL_IN_MAX_PPB;
15991599

16001600
/* For most cases, keep phase pull-in duration 1 second */
@@ -1880,7 +1880,7 @@ static int idtcm_adjtime(struct ptp_clock_info *ptp, s64 delta)
18801880
mutex_lock(idtcm->lock);
18811881

18821882
if (abs(delta) < PHASE_PULL_IN_THRESHOLD_NS) {
1883-
err = channel->do_phase_pull_in(channel, delta, 0);
1883+
err = channel->do_phase_pull_in(channel, delta, channel->caps.max_adj);
18841884
} else {
18851885
if (delta >= 0) {
18861886
ts = ns_to_timespec64(delta);
@@ -1927,9 +1927,6 @@ static int idtcm_adjfine(struct ptp_clock_info *ptp, long scaled_ppm)
19271927
if (channel->phase_pull_in == true)
19281928
return 0;
19291929

1930-
if (scaled_ppm == channel->current_freq_scaled_ppm)
1931-
return 0;
1932-
19331930
mutex_lock(idtcm->lock);
19341931
err = _idtcm_adjfine(channel, scaled_ppm);
19351932
mutex_unlock(idtcm->lock);
@@ -2054,7 +2051,7 @@ static struct ptp_pin_desc pin_config[MAX_TOD][MAX_REF_CLK];
20542051

20552052
static const struct ptp_clock_info idtcm_caps = {
20562053
.owner = THIS_MODULE,
2057-
.max_adj = 244000,
2054+
.max_adj = MAX_FFO_PPB,
20582055
.n_per_out = 12,
20592056
.n_ext_ts = MAX_TOD,
20602057
.n_pins = MAX_REF_CLK,
@@ -2071,7 +2068,7 @@ static const struct ptp_clock_info idtcm_caps = {
20712068

20722069
static const struct ptp_clock_info idtcm_caps_deprecated = {
20732070
.owner = THIS_MODULE,
2074-
.max_adj = 244000,
2071+
.max_adj = MAX_FFO_PPB,
20752072
.n_per_out = 12,
20762073
.n_ext_ts = MAX_TOD,
20772074
.n_pins = MAX_REF_CLK,
@@ -2242,6 +2239,25 @@ static int configure_channel_tod(struct idtcm_channel *channel, u32 index)
22422239
return 0;
22432240
}
22442241

2242+
static int initialize_max_adj(struct idtcm_channel *channel)
2243+
{
2244+
struct idtcm *idtcm = channel->idtcm;
2245+
u8 ffo_ppm;
2246+
int err;
2247+
2248+
err = idtcm_read(idtcm, channel->dpll_n, DPLL_MAX_FREQ_OFFSET,
2249+
&ffo_ppm, sizeof(ffo_ppm));
2250+
if (err)
2251+
return err;
2252+
2253+
if (ffo_ppm && ffo_ppm <= (MAX_FFO_PPB / 1000))
2254+
channel->caps.max_adj = ffo_ppm * 1000;
2255+
else
2256+
channel->caps.max_adj = MAX_FFO_PPB;
2257+
2258+
return 0;
2259+
}
2260+
22452261
static int idtcm_enable_channel(struct idtcm *idtcm, u32 index)
22462262
{
22472263
struct idtcm_channel *channel;
@@ -2285,6 +2301,10 @@ static int idtcm_enable_channel(struct idtcm *idtcm, u32 index)
22852301
ppd->chan = index;
22862302
}
22872303

2304+
err = initialize_max_adj(channel);
2305+
if (err)
2306+
return err;
2307+
22882308
err = initialize_dco_operating_mode(channel);
22892309
if (err)
22902310
return err;
@@ -2437,8 +2457,13 @@ static int idtcm_probe(struct platform_device *pdev)
24372457

24382458
err = idtcm_load_firmware(idtcm, &pdev->dev);
24392459

2440-
if (err)
2460+
if (err) {
2461+
if (err == -ENOENT) {
2462+
mutex_unlock(idtcm->lock);
2463+
return -EPROBE_DEFER;
2464+
}
24412465
dev_warn(idtcm->dev, "loading firmware failed with %d", err);
2466+
}
24422467

24432468
wait_for_chip_ready(idtcm);
24442469

‎drivers/ptp/ptp_clockmatrix.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -19,6 +19,7 @@
1919
#define MAX_REF_CLK (16)
2020

2121
#define MAX_ABS_WRITE_PHASE_NANOSECONDS (107374182L)
22+
#define MAX_FFO_PPB (244000)
2223

2324
#define TOD_MASK_ADDR (0xFFA5)
2425
#define DEFAULT_TOD_MASK (0x04)

‎include/linux/mfd/idt8a340_reg.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -192,6 +192,7 @@
192192
#define DPLL_CTRL_REG_0 0x0002
193193
#define DPLL_CTRL_REG_1 0x0003
194194
#define DPLL_CTRL_REG_2 0x0004
195+
#define DPLL_MAX_FREQ_OFFSET 0x0025
195196
#define DPLL_WF_TIMER 0x002c
196197
#define DPLL_WP_TIMER 0x002e
197198
#define DPLL_TOD_SYNC_CFG 0x0031

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