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Erick Chenbroonie
Erick Chen
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broonie
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regulator: sc2731: Add regulator driver to support Spreadtrum SC2731 PMIC
Add regulator driver for Spreadtrum SC2731 device. It has 17 general purpose LDOs, BUCKs generator and digital output to control regulators. Signed-off-by: Erick Chen <erick.chen@spreadtrum.com> Reviewed-by: Baolin Wang <baolin.wang@spreadtrum.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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‎drivers/regulator/Kconfig

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@@ -744,6 +744,13 @@ config REGULATOR_S5M8767
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via I2C bus. S5M8767A have 9 Bucks and 28 LDOs output and
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supports DVS mode with 8bits of output voltage control.
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config REGULATOR_SC2731
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tristate "Spreadtrum SC2731 power regulator driver"
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depends on MFD_SC27XX_PMIC || COMPILE_TEST
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help
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This driver provides support for the voltage regulators on the
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SC2731 PMIC.
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config REGULATOR_SKY81452
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tristate "Skyworks Solutions SKY81452 voltage regulator"
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depends on MFD_SKY81452

‎drivers/regulator/Makefile

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@@ -95,6 +95,7 @@ obj-$(CONFIG_REGULATOR_RT5033) += rt5033-regulator.o
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obj-$(CONFIG_REGULATOR_S2MPA01) += s2mpa01.o
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obj-$(CONFIG_REGULATOR_S2MPS11) += s2mps11.o
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obj-$(CONFIG_REGULATOR_S5M8767) += s5m8767.o
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obj-$(CONFIG_REGULATOR_SC2731) += sc2731-regulator.o
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obj-$(CONFIG_REGULATOR_SKY81452) += sky81452-regulator.o
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obj-$(CONFIG_REGULATOR_STM32_VREFBUF) += stm32-vrefbuf.o
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obj-$(CONFIG_REGULATOR_STW481X_VMMC) += stw481x-vmmc.o

‎drivers/regulator/sc2731-regulator.c

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//SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2017 Spreadtrum Communications Inc.
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*/
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#include <linux/regulator/driver.h>
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#include <linux/regulator/of_regulator.h>
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/*
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* SC2731 regulator lock register
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*/
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#define SC2731_PWR_WR_PROT_VALUE 0xf0c
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#define SC2731_WR_UNLOCK 0x6e7f
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/*
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* SC2731 enable register
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*/
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#define SC2731_POWER_PD_SW 0xc28
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#define SC2731_LDO_CAMA0_PD 0xcfc
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#define SC2731_LDO_CAMA1_PD 0xd04
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#define SC2731_LDO_CAMMOT_PD 0xd0c
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#define SC2731_LDO_VLDO_PD 0xd6c
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#define SC2731_LDO_EMMCCORE_PD 0xd2c
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#define SC2731_LDO_SDCORE_PD 0xd74
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#define SC2731_LDO_SDIO_PD 0xd70
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#define SC2731_LDO_WIFIPA_PD 0xd4c
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#define SC2731_LDO_USB33_PD 0xd5c
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#define SC2731_LDO_CAMD0_PD 0xd7c
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#define SC2731_LDO_CAMD1_PD 0xd84
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#define SC2731_LDO_CON_PD 0xd8c
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#define SC2731_LDO_CAMIO_PD 0xd94
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#define SC2731_LDO_SRAM_PD 0xd78
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/*
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* SC2731 enable mask
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*/
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#define SC2731_DCDC_CPU0_PD_MASK BIT(4)
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#define SC2731_DCDC_CPU1_PD_MASK BIT(3)
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#define SC2731_DCDC_RF_PD_MASK BIT(11)
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#define SC2731_LDO_CAMA0_PD_MASK BIT(0)
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#define SC2731_LDO_CAMA1_PD_MASK BIT(0)
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#define SC2731_LDO_CAMMOT_PD_MASK BIT(0)
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#define SC2731_LDO_VLDO_PD_MASK BIT(0)
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#define SC2731_LDO_EMMCCORE_PD_MASK BIT(0)
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#define SC2731_LDO_SDCORE_PD_MASK BIT(0)
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#define SC2731_LDO_SDIO_PD_MASK BIT(0)
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#define SC2731_LDO_WIFIPA_PD_MASK BIT(0)
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#define SC2731_LDO_USB33_PD_MASK BIT(0)
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#define SC2731_LDO_CAMD0_PD_MASK BIT(0)
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#define SC2731_LDO_CAMD1_PD_MASK BIT(0)
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#define SC2731_LDO_CON_PD_MASK BIT(0)
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#define SC2731_LDO_CAMIO_PD_MASK BIT(0)
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#define SC2731_LDO_SRAM_PD_MASK BIT(0)
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/*
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* SC2731 vsel register
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*/
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#define SC2731_DCDC_CPU0_VOL 0xc54
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#define SC2731_DCDC_CPU1_VOL 0xc64
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#define SC2731_DCDC_RF_VOL 0xcb8
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#define SC2731_LDO_CAMA0_VOL 0xd00
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#define SC2731_LDO_CAMA1_VOL 0xd08
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#define SC2731_LDO_CAMMOT_VOL 0xd10
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#define SC2731_LDO_VLDO_VOL 0xd28
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#define SC2731_LDO_EMMCCORE_VOL 0xd30
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#define SC2731_LDO_SDCORE_VOL 0xd38
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#define SC2731_LDO_SDIO_VOL 0xd40
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#define SC2731_LDO_WIFIPA_VOL 0xd50
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#define SC2731_LDO_USB33_VOL 0xd60
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#define SC2731_LDO_CAMD0_VOL 0xd80
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#define SC2731_LDO_CAMD1_VOL 0xd88
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#define SC2731_LDO_CON_VOL 0xd90
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#define SC2731_LDO_CAMIO_VOL 0xd98
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#define SC2731_LDO_SRAM_VOL 0xdB0
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/*
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* SC2731 vsel register mask
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*/
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#define SC2731_DCDC_CPU0_VOL_MASK GENMASK(8, 0)
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#define SC2731_DCDC_CPU1_VOL_MASK GENMASK(8, 0)
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#define SC2731_DCDC_RF_VOL_MASK GENMASK(8, 0)
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#define SC2731_LDO_CAMA0_VOL_MASK GENMASK(7, 0)
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#define SC2731_LDO_CAMA1_VOL_MASK GENMASK(7, 0)
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#define SC2731_LDO_CAMMOT_VOL_MASK GENMASK(7, 0)
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#define SC2731_LDO_VLDO_VOL_MASK GENMASK(7, 0)
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#define SC2731_LDO_EMMCCORE_VOL_MASK GENMASK(7, 0)
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#define SC2731_LDO_SDCORE_VOL_MASK GENMASK(7, 0)
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#define SC2731_LDO_SDIO_VOL_MASK GENMASK(7, 0)
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#define SC2731_LDO_WIFIPA_VOL_MASK GENMASK(7, 0)
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#define SC2731_LDO_USB33_VOL_MASK GENMASK(7, 0)
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#define SC2731_LDO_CAMD0_VOL_MASK GENMASK(6, 0)
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#define SC2731_LDO_CAMD1_VOL_MASK GENMASK(6, 0)
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#define SC2731_LDO_CON_VOL_MASK GENMASK(6, 0)
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#define SC2731_LDO_CAMIO_VOL_MASK GENMASK(6, 0)
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#define SC2731_LDO_SRAM_VOL_MASK GENMASK(6, 0)
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enum sc2731_regulator_id {
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SC2731_BUCK_CPU0,
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SC2731_BUCK_CPU1,
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SC2731_BUCK_RF,
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SC2731_LDO_CAMA0,
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SC2731_LDO_CAMA1,
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SC2731_LDO_CAMMOT,
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SC2731_LDO_VLDO,
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SC2731_LDO_EMMCCORE,
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SC2731_LDO_SDCORE,
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SC2731_LDO_SDIO,
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SC2731_LDO_WIFIPA,
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SC2731_LDO_USB33,
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SC2731_LDO_CAMD0,
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SC2731_LDO_CAMD1,
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SC2731_LDO_CON,
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SC2731_LDO_CAMIO,
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SC2731_LDO_SRAM,
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};
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static const struct regulator_ops sc2731_regu_linear_ops = {
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.enable = regulator_enable_regmap,
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.disable = regulator_disable_regmap,
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.is_enabled = regulator_is_enabled_regmap,
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.list_voltage = regulator_list_voltage_linear,
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.get_voltage_sel = regulator_get_voltage_sel_regmap,
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.set_voltage_sel = regulator_set_voltage_sel_regmap,
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};
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#define SC2731_REGU_LINEAR(_id, en_reg, en_mask, vreg, vmask, \
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vstep, vmin, vmax) { \
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.name = #_id, \
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.of_match = of_match_ptr(#_id), \
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.ops = &sc2731_regu_linear_ops, \
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.type = REGULATOR_VOLTAGE, \
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.id = SC2731_##_id, \
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.owner = THIS_MODULE, \
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.min_uV = vmin, \
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.n_voltages = ((vmax) - (vmin)) / (vstep) + 1, \
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.uV_step = vstep, \
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.enable_is_inverted = true, \
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.enable_val = 0, \
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.enable_reg = en_reg, \
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.enable_mask = en_mask, \
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.vsel_reg = vreg, \
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.vsel_mask = vmask, \
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}
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static struct regulator_desc regulators[] = {
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SC2731_REGU_LINEAR(BUCK_CPU0, SC2731_POWER_PD_SW,
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SC2731_DCDC_CPU0_PD_MASK, SC2731_DCDC_CPU0_VOL,
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SC2731_DCDC_CPU0_VOL_MASK, 3125, 400000, 1996875),
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SC2731_REGU_LINEAR(BUCK_CPU1, SC2731_POWER_PD_SW,
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SC2731_DCDC_CPU1_PD_MASK, SC2731_DCDC_CPU1_VOL,
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SC2731_DCDC_CPU1_VOL_MASK, 3125, 400000, 1996875),
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SC2731_REGU_LINEAR(BUCK_RF, SC2731_POWER_PD_SW, SC2731_DCDC_RF_PD_MASK,
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SC2731_DCDC_RF_VOL, SC2731_DCDC_RF_VOL_MASK,
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3125, 600000, 2196875),
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SC2731_REGU_LINEAR(LDO_CAMA0, SC2731_LDO_CAMA0_PD,
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SC2731_LDO_CAMA0_PD_MASK, SC2731_LDO_CAMA0_VOL,
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SC2731_LDO_CAMA0_VOL_MASK, 10000, 1200000, 3750000),
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SC2731_REGU_LINEAR(LDO_CAMA1, SC2731_LDO_CAMA1_PD,
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SC2731_LDO_CAMA1_PD_MASK, SC2731_LDO_CAMA1_VOL,
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SC2731_LDO_CAMA1_VOL_MASK, 10000, 1200000, 3750000),
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SC2731_REGU_LINEAR(LDO_CAMMOT, SC2731_LDO_CAMMOT_PD,
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SC2731_LDO_CAMMOT_PD_MASK, SC2731_LDO_CAMMOT_VOL,
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SC2731_LDO_CAMMOT_VOL_MASK, 10000, 1200000, 3750000),
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SC2731_REGU_LINEAR(LDO_VLDO, SC2731_LDO_VLDO_PD,
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SC2731_LDO_VLDO_PD_MASK, SC2731_LDO_VLDO_VOL,
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SC2731_LDO_VLDO_VOL_MASK, 10000, 1200000, 3750000),
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SC2731_REGU_LINEAR(LDO_EMMCCORE, SC2731_LDO_EMMCCORE_PD,
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SC2731_LDO_EMMCCORE_PD_MASK, SC2731_LDO_EMMCCORE_VOL,
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SC2731_LDO_EMMCCORE_VOL_MASK, 10000, 1200000,
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3750000),
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SC2731_REGU_LINEAR(LDO_SDCORE, SC2731_LDO_SDCORE_PD,
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SC2731_LDO_SDCORE_PD_MASK, SC2731_LDO_SDCORE_VOL,
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SC2731_LDO_SDCORE_VOL_MASK, 10000, 1200000, 3750000),
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SC2731_REGU_LINEAR(LDO_SDIO, SC2731_LDO_SDIO_PD,
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SC2731_LDO_SDIO_PD_MASK, SC2731_LDO_SDIO_VOL,
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SC2731_LDO_SDIO_VOL_MASK, 10000, 1200000, 3750000),
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SC2731_REGU_LINEAR(LDO_WIFIPA, SC2731_LDO_WIFIPA_PD,
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SC2731_LDO_WIFIPA_PD_MASK, SC2731_LDO_WIFIPA_VOL,
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SC2731_LDO_WIFIPA_VOL_MASK, 10000, 1200000, 3750000),
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SC2731_REGU_LINEAR(LDO_USB33, SC2731_LDO_USB33_PD,
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SC2731_LDO_USB33_PD_MASK, SC2731_LDO_USB33_VOL,
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SC2731_LDO_USB33_VOL_MASK, 10000, 1200000, 3750000),
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SC2731_REGU_LINEAR(LDO_CAMD0, SC2731_LDO_CAMD0_PD,
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SC2731_LDO_CAMD0_PD_MASK, SC2731_LDO_CAMD0_VOL,
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SC2731_LDO_CAMD0_VOL_MASK, 6250, 1000000, 1793750),
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SC2731_REGU_LINEAR(LDO_CAMD1, SC2731_LDO_CAMD1_PD,
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SC2731_LDO_CAMD1_PD_MASK, SC2731_LDO_CAMD1_VOL,
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SC2731_LDO_CAMD1_VOL_MASK, 6250, 1000000, 1793750),
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SC2731_REGU_LINEAR(LDO_CON, SC2731_LDO_CON_PD,
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SC2731_LDO_CON_PD_MASK, SC2731_LDO_CON_VOL,
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SC2731_LDO_CON_VOL_MASK, 6250, 1000000, 1793750),
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SC2731_REGU_LINEAR(LDO_CAMIO, SC2731_LDO_CAMIO_PD,
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SC2731_LDO_CAMIO_PD_MASK, SC2731_LDO_CAMIO_VOL,
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SC2731_LDO_CAMIO_VOL_MASK, 6250, 1000000, 1793750),
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SC2731_REGU_LINEAR(LDO_SRAM, SC2731_LDO_SRAM_PD,
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SC2731_LDO_SRAM_PD_MASK, SC2731_LDO_SRAM_VOL,
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SC2731_LDO_SRAM_VOL_MASK, 6250, 1000000, 1793750),
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};
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static int sc2731_regulator_unlock(struct regmap *regmap)
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{
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return regmap_write(regmap, SC2731_PWR_WR_PROT_VALUE,
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SC2731_WR_UNLOCK);
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}
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static int sc2731_regulator_probe(struct platform_device *pdev)
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{
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int i, ret;
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struct regmap *regmap;
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struct regulator_config config = { };
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struct regulator_dev *rdev;
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regmap = dev_get_regmap(pdev->dev.parent, NULL);
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if (!regmap) {
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dev_err(&pdev->dev, "failed to get regmap.\n");
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return -ENODEV;
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}
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ret = sc2731_regulator_unlock(regmap);
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if (ret) {
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dev_err(&pdev->dev, "failed to release regulator lock\n");
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return ret;
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}
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config.dev = &pdev->dev;
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config.regmap = regmap;
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for (i = 0; i < ARRAY_SIZE(regulators); i++) {
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rdev = devm_regulator_register(&pdev->dev, &regulators[i],
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&config);
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if (IS_ERR(rdev)) {
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dev_err(&pdev->dev, "failed to register regulator %s\n",
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regulators[i].name);
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return PTR_ERR(rdev);
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}
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}
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return 0;
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}
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static struct platform_driver sc2731_regulator_driver = {
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.driver = {
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.name = "sc27xx-regulator",
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},
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.probe = sc2731_regulator_probe,
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};
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module_platform_driver(sc2731_regulator_driver);
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MODULE_AUTHOR("Chen Junhui <erick.chen@spreadtrum.com>");
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MODULE_DESCRIPTION("Spreadtrum SC2731 regulator driver");
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MODULE_LICENSE("GPL v2");

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