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torvaldstorvalds
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Merge branch 'ras-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull RAS updates from Thomas Gleixner: "The RAS updates for the 4.13 merge window: - Cleanup of the MCE injection facility (Borsilav Petkov) - Rework of the AMD/SMCA handling (Yazen Ghannam) - Enhancements for ACPI/APEI to handle new notitication types (Shiju Jose) - atomic_t to refcount_t conversion (Elena Reshetova) - A few fixes and enhancements all over the place" * 'ras-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: RAS/CEC: Check the correct variable in the debugfs error handling x86/mce: Always save severity in machine_check_poll() x86/MCE, xen/mcelog: Make /dev/mcelog registration messages more precise x86/mce: Update bootlog description to reflect behavior on AMD x86/mce: Don't disable MCA banks when offlining a CPU on AMD x86/mce/mce-inject: Preset the MCE injection struct x86/mce: Clean up include files x86/mce: Get rid of register_mce_write_callback() x86/mce: Merge mce_amd_inj into mce-inject x86/mce/AMD: Use saved threshold block info in interrupt handler x86/mce/AMD: Use msr_stat when clearing MCA_STATUS x86/mce/AMD: Carve out SMCA bank configuration x86/mce/AMD: Redo error logging from APIC LVT interrupt handlers x86/mce: Convert threshold_bank.cpus from atomic_t to refcount_t RAS: Make local function parse_ras_param() static ACPI/APEI: Handle GSIV and GPIO notification types
2 parents 9a9594e + 32288da commit 4422d80

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18 files changed

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‎Documentation/x86/x86_64/boot-options.txt

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -36,7 +36,8 @@ Machine check
3636
to broadcast MCEs.
3737
mce=bootlog
3838
Enable logging of machine checks left over from booting.
39-
Disabled by default on AMD because some BIOS leave bogus ones.
39+
Disabled by default on AMD Fam10h and older because some BIOS
40+
leave bogus ones.
4041
If your BIOS doesn't do that it's a good idea to enable though
4142
to make sure you log even machine check events that result
4243
in a reboot. On Intel systems it is enabled by default.

‎arch/x86/Kconfig

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1085,7 +1085,7 @@ config X86_MCE_THRESHOLD
10851085
def_bool y
10861086

10871087
config X86_MCE_INJECT
1088-
depends on X86_MCE && X86_LOCAL_APIC && X86_MCELOG_LEGACY
1088+
depends on X86_MCE && X86_LOCAL_APIC && DEBUG_FS
10891089
tristate "Machine check injector support"
10901090
---help---
10911091
Provide support for injecting machine checks for testing purposes.

‎arch/x86/Makefile

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -257,8 +257,6 @@ drivers-$(CONFIG_PM) += arch/x86/power/
257257

258258
drivers-$(CONFIG_FB) += arch/x86/video/
259259

260-
drivers-$(CONFIG_RAS) += arch/x86/ras/
261-
262260
####
263261
# boot loader support. Several targets are kept for legacy purposes
264262

‎arch/x86/include/asm/amd_nb.h

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3,6 +3,7 @@
33

44
#include <linux/ioport.h>
55
#include <linux/pci.h>
6+
#include <linux/refcount.h>
67

78
struct amd_nb_bus_dev_range {
89
u8 bus;
@@ -55,7 +56,7 @@ struct threshold_bank {
5556
struct threshold_block *blocks;
5657

5758
/* initialized to the number of CPUs on the node sharing this bank */
58-
atomic_t cpus;
59+
refcount_t cpus;
5960
};
6061

6162
struct amd_northbridge {

‎arch/x86/include/asm/mce.h

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -285,10 +285,6 @@ int mce_notify_irq(void);
285285

286286
DECLARE_PER_CPU(struct mce, injectm);
287287

288-
extern void register_mce_write_callback(ssize_t (*)(struct file *filp,
289-
const char __user *ubuf,
290-
size_t usize, loff_t *off));
291-
292288
/* Disable CMCI/polling for MCA bank claimed by firmware */
293289
extern void mce_disable_bank(int bank);
294290

‎arch/x86/include/asm/processor.h

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -907,8 +907,13 @@ static inline int mpx_disable_management(void)
907907
}
908908
#endif /* CONFIG_X86_INTEL_MPX */
909909

910+
#ifdef CONFIG_CPU_SUP_AMD
910911
extern u16 amd_get_nb_id(int cpu);
911912
extern u32 amd_get_nodes_per_socket(void);
913+
#else
914+
static inline u16 amd_get_nb_id(int cpu) { return 0; }
915+
static inline u32 amd_get_nodes_per_socket(void) { return 0; }
916+
#endif
912917

913918
static inline uint32_t hypervisor_cpuid_base(const char *sig, uint32_t leaves)
914919
{

‎arch/x86/kernel/cpu/mcheck/dev-mcelog.c

Lines changed: 44 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -17,6 +17,8 @@
1717

1818
#include "mce-internal.h"
1919

20+
static BLOCKING_NOTIFIER_HEAD(mce_injector_chain);
21+
2022
static DEFINE_MUTEX(mce_chrdev_read_mutex);
2123

2224
static char mce_helper[128];
@@ -345,24 +347,49 @@ static long mce_chrdev_ioctl(struct file *f, unsigned int cmd,
345347
}
346348
}
347349

348-
static ssize_t (*mce_write)(struct file *filp, const char __user *ubuf,
349-
size_t usize, loff_t *off);
350+
void mce_register_injector_chain(struct notifier_block *nb)
351+
{
352+
blocking_notifier_chain_register(&mce_injector_chain, nb);
353+
}
354+
EXPORT_SYMBOL_GPL(mce_register_injector_chain);
350355

351-
void register_mce_write_callback(ssize_t (*fn)(struct file *filp,
352-
const char __user *ubuf,
353-
size_t usize, loff_t *off))
356+
void mce_unregister_injector_chain(struct notifier_block *nb)
354357
{
355-
mce_write = fn;
358+
blocking_notifier_chain_unregister(&mce_injector_chain, nb);
356359
}
357-
EXPORT_SYMBOL_GPL(register_mce_write_callback);
360+
EXPORT_SYMBOL_GPL(mce_unregister_injector_chain);
358361

359362
static ssize_t mce_chrdev_write(struct file *filp, const char __user *ubuf,
360363
size_t usize, loff_t *off)
361364
{
362-
if (mce_write)
363-
return mce_write(filp, ubuf, usize, off);
364-
else
365+
struct mce m;
366+
367+
if (!capable(CAP_SYS_ADMIN))
368+
return -EPERM;
369+
/*
370+
* There are some cases where real MSR reads could slip
371+
* through.
372+
*/
373+
if (!boot_cpu_has(X86_FEATURE_MCE) || !boot_cpu_has(X86_FEATURE_MCA))
374+
return -EIO;
375+
376+
if ((unsigned long)usize > sizeof(struct mce))
377+
usize = sizeof(struct mce);
378+
if (copy_from_user(&m, ubuf, usize))
379+
return -EFAULT;
380+
381+
if (m.extcpu >= num_possible_cpus() || !cpu_online(m.extcpu))
365382
return -EINVAL;
383+
384+
/*
385+
* Need to give user space some time to set everything up,
386+
* so do it a jiffie or two later everywhere.
387+
*/
388+
schedule_timeout(2);
389+
390+
blocking_notifier_call_chain(&mce_injector_chain, 0, &m);
391+
392+
return usize;
366393
}
367394

368395
static const struct file_operations mce_chrdev_ops = {
@@ -388,9 +415,15 @@ static __init int dev_mcelog_init_device(void)
388415
/* register character device /dev/mcelog */
389416
err = misc_register(&mce_chrdev_device);
390417
if (err) {
391-
pr_err("Unable to init device /dev/mcelog (rc: %d)\n", err);
418+
if (err == -EBUSY)
419+
/* Xen dom0 might have registered the device already. */
420+
pr_info("Unable to init device /dev/mcelog, already registered");
421+
else
422+
pr_err("Unable to init device /dev/mcelog (rc: %d)\n", err);
423+
392424
return err;
393425
}
426+
394427
mce_register_decode_chain(&dev_mcelog_nb);
395428
return 0;
396429
}

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