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Amit Nischalbebarino
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clk: qcom: gdsc: Add support to reset AON and block reset logic
For some of the gdsc power domains, there could be need to reset the AON logic or assert/deassert the block control reset before removing the clamp_io. Add support for the same by introducing new flags SW_RESET and AON_RESET. Both SW reset and AON reset requires to be asserted for at least 1us before being de-asserted. Signed-off-by: Taniya Das <tdas@codeaurora.org> Signed-off-by: Amit Nischal <anischal@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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+23
-3
lines changed

2 files changed

+23
-3
lines changed

drivers/clk/qcom/gdsc.c

Lines changed: 20 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* Copyright (c) 2015, The Linux Foundation. All rights reserved.
2+
* Copyright (c) 2015, 2017-2018, The Linux Foundation. All rights reserved.
33
*
44
* This program is free software; you can redistribute it and/or modify
55
* it under the terms of the GNU General Public License version 2 and
@@ -31,6 +31,7 @@
3131
#define HW_CONTROL_MASK BIT(1)
3232
#define SW_COLLAPSE_MASK BIT(0)
3333
#define GMEM_CLAMP_IO_MASK BIT(0)
34+
#define GMEM_RESET_MASK BIT(4)
3435

3536
/* Wait 2^n CXO cycles between all states. Here, n=2 (4 cycles). */
3637
#define EN_REST_WAIT_VAL (0x2 << 20)
@@ -166,6 +167,14 @@ static inline void gdsc_assert_clamp_io(struct gdsc *sc)
166167
GMEM_CLAMP_IO_MASK, 1);
167168
}
168169

170+
static inline void gdsc_assert_reset_aon(struct gdsc *sc)
171+
{
172+
regmap_update_bits(sc->regmap, sc->clamp_io_ctrl,
173+
GMEM_RESET_MASK, 1);
174+
udelay(1);
175+
regmap_update_bits(sc->regmap, sc->clamp_io_ctrl,
176+
GMEM_RESET_MASK, 0);
177+
}
169178
static int gdsc_enable(struct generic_pm_domain *domain)
170179
{
171180
struct gdsc *sc = domain_to_gdsc(domain);
@@ -174,8 +183,17 @@ static int gdsc_enable(struct generic_pm_domain *domain)
174183
if (sc->pwrsts == PWRSTS_ON)
175184
return gdsc_deassert_reset(sc);
176185

177-
if (sc->flags & CLAMP_IO)
186+
if (sc->flags & SW_RESET) {
187+
gdsc_assert_reset(sc);
188+
udelay(1);
189+
gdsc_deassert_reset(sc);
190+
}
191+
192+
if (sc->flags & CLAMP_IO) {
193+
if (sc->flags & AON_RESET)
194+
gdsc_assert_reset_aon(sc);
178195
gdsc_deassert_clamp_io(sc);
196+
}
179197

180198
ret = gdsc_toggle_logic(sc, true);
181199
if (ret)

drivers/clk/qcom/gdsc.h

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* Copyright (c) 2015, The Linux Foundation. All rights reserved.
2+
* Copyright (c) 2015, 2017-2018, The Linux Foundation. All rights reserved.
33
*
44
* This program is free software; you can redistribute it and/or modify
55
* it under the terms of the GNU General Public License version 2 and
@@ -53,6 +53,8 @@ struct gdsc {
5353
#define VOTABLE BIT(0)
5454
#define CLAMP_IO BIT(1)
5555
#define HW_CTRL BIT(2)
56+
#define SW_RESET BIT(3)
57+
#define AON_RESET BIT(4)
5658
struct reset_controller_dev *rcdev;
5759
unsigned int *resets;
5860
unsigned int reset_count;

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