Skip to content

Commit 44e7475

Browse files
committed
ARM: OMAP2+: Fix build if CONFIG_SMP is not set
Looks like I only partially fixed up things if CONFIG_SMP is not set for the recent kexec changes. We don't have boot_secondary available without SMP as reported by Arnd. Fixes: 0573b95 ("ARM: OMAP4+: Prevent CPU1 related hang with kexec") Reported-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Tony Lindgren <tony@atomide.com>
1 parent 3696203 commit 44e7475

File tree

1 file changed

+14
-4
lines changed

1 file changed

+14
-4
lines changed

arch/arm/mach-omap2/omap-headsmp.S

Lines changed: 14 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -24,6 +24,16 @@
2424
#define AUX_CORE_BOOT0_PA 0x48281800
2525
#define API_HYP_ENTRY 0x102
2626

27+
ENTRY(omap_secondary_startup)
28+
#ifdef CONFIG_SMP
29+
b secondary_startup
30+
#else
31+
/* Should never get here */
32+
again: wfi
33+
b again
34+
#endif
35+
#ENDPROC(omap_secondary_startup)
36+
2737
/*
2838
* OMAP5 specific entry point for secondary CPU to jump from ROM
2939
* code. This routine also provides a holding flag into which
@@ -39,7 +49,7 @@ wait: ldr r2, =AUX_CORE_BOOT0_PA @ read from AuxCoreBoot0
3949
and r4, r4, #0x0f
4050
cmp r0, r4
4151
bne wait
42-
b secondary_startup
52+
b omap_secondary_startup
4353
ENDPROC(omap5_secondary_startup)
4454
/*
4555
* Same as omap5_secondary_startup except we call into the ROM to
@@ -59,7 +69,7 @@ wait_2: ldr r2, =AUX_CORE_BOOT0_PA @ read from AuxCoreBoot0
5969
adr r0, hyp_boot
6070
smc #0
6171
hyp_boot:
62-
b secondary_startup
72+
b omap_secondary_startup
6373
ENDPROC(omap5_secondary_hyp_startup)
6474
/*
6575
* OMAP4 specific entry point for secondary CPU to jump from ROM
@@ -82,7 +92,7 @@ hold: ldr r12,=0x103
8292
* we've been released from the wait loop,secondary_stack
8393
* should now contain the SVC stack for this core
8494
*/
85-
b secondary_startup
95+
b omap_secondary_startup
8696
ENDPROC(omap4_secondary_startup)
8797

8898
ENTRY(omap4460_secondary_startup)
@@ -119,5 +129,5 @@ hold_2: ldr r12,=0x103
119129
* we've been released from the wait loop,secondary_stack
120130
* should now contain the SVC stack for this core
121131
*/
122-
b secondary_startup
132+
b omap_secondary_startup
123133
ENDPROC(omap4460_secondary_startup)

0 commit comments

Comments
 (0)