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Merge branches 'clk-qcom-rpmh', 'clk-gpio-sleep', 'clk-stm32mp1', 'clk-qcom-qcs404' and 'clk-actions-s500' into clk-next
 - IPA clk support on Qualcomm RPMh clk controllers - Support sleeping gpios in clk-gpio type - Minor fixes for STM32MP1 clk driver (parents, critical flag, etc.) - Actions Semi S500 SoC clk support * clk-qcom-rpmh: clk: qcom: clk-rpmh: Add IPA clock support * clk-gpio-sleep: clk: clk-gpio: add support for sleeping GPIOs in gpio-gate-clk * clk-stm32mp1: dt-bindings: clock: remove unused definition for stm32mp1 clk: stm32mp1: fix bit width of hse_rtc divider clk: stm32mp1: remove unnecessary CLK_DIVIDER_ALLOW_ZERO flag clk: stm32mp1: fix HSI divider flag clk: stm32mp1: fix mcu divider table clk: stm32mp1: set ck_csi as critical clock clk: stm32mp1: add CLK_SET_RATE_NO_REPARENT to Kernel clocks clk: stm32mp1: parent clocks update * clk-qcom-qcs404: clk: qcom: gcc-qcs404: Add cfg_offset for blsp1_uart3 clock clk: qcom: clk-rcg2: Introduce a cfg offset for RCGs clk: qcom: remove empty lines in clk-rcg.h * clk-actions-s500: clk: actions: Add clock driver for S500 SoC dt-bindings: clock: Add DT bindings for Actions Semi S500 CMU clk: actions: Add configurable PLL delay
6 parents e7faa09 + 04053f4 + c0189fe + 585fc46 + 9d57571 + ed6b479 commit 461ea6a

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15 files changed

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‎Documentation/devicetree/bindings/clock/actions,owl-cmu.txt

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -2,13 +2,14 @@
22

33
The Actions Semi Owl Clock Management Unit generates and supplies clock
44
to various controllers within the SoC. The clock binding described here is
5-
applicable to S900 and S700 SoC's.
5+
applicable to S900, S700 and S500 SoC's.
66

77
Required Properties:
88

99
- compatible: should be one of the following,
1010
"actions,s900-cmu"
1111
"actions,s700-cmu"
12+
"actions,s500-cmu"
1213
- reg: physical base address of the controller and length of memory mapped
1314
region.
1415
- clocks: Reference to the parent clocks ("hosc", "losc")
@@ -19,8 +20,8 @@ Each clock is assigned an identifier, and client nodes can use this identifier
1920
to specify the clock which they consume.
2021

2122
All available clocks are defined as preprocessor macros in corresponding
22-
dt-bindings/clock/actions,s900-cmu.h or actions,s700-cmu.h header and can be
23-
used in device tree sources.
23+
dt-bindings/clock/actions,s900-cmu.h or actions,s700-cmu.h or
24+
actions,s500-cmu.h header and can be used in device tree sources.
2425

2526
External clocks:
2627

‎drivers/clk/actions/Kconfig

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -9,6 +9,11 @@ if CLK_ACTIONS
99

1010
# SoC Drivers
1111

12+
config CLK_OWL_S500
13+
bool "Support for the Actions Semi OWL S500 clocks"
14+
depends on ARCH_ACTIONS || COMPILE_TEST
15+
default ARCH_ACTIONS
16+
1217
config CLK_OWL_S700
1318
bool "Support for the Actions Semi OWL S700 clocks"
1419
depends on (ARM64 && ARCH_ACTIONS) || COMPILE_TEST

‎drivers/clk/actions/Makefile

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -10,5 +10,6 @@ clk-owl-y += owl-pll.o
1010
clk-owl-y += owl-reset.o
1111

1212
# SoC support
13+
obj-$(CONFIG_CLK_OWL_S500) += owl-s500.o
1314
obj-$(CONFIG_CLK_OWL_S700) += owl-s700.o
1415
obj-$(CONFIG_CLK_OWL_S900) += owl-s900.o

‎drivers/clk/actions/owl-pll.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -179,7 +179,7 @@ static int owl_pll_set_rate(struct clk_hw *hw, unsigned long rate,
179179

180180
regmap_write(common->regmap, pll_hw->reg, reg);
181181

182-
udelay(PLL_STABILITY_WAIT_US);
182+
udelay(pll_hw->delay);
183183

184184
return 0;
185185
}

‎drivers/clk/actions/owl-pll.h

Lines changed: 24 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -13,6 +13,8 @@
1313

1414
#include "owl-common.h"
1515

16+
#define OWL_PLL_DEF_DELAY 50
17+
1618
/* last entry should have rate = 0 */
1719
struct clk_pll_table {
1820
unsigned int val;
@@ -27,6 +29,7 @@ struct owl_pll_hw {
2729
u8 width;
2830
u8 min_mul;
2931
u8 max_mul;
32+
u8 delay;
3033
const struct clk_pll_table *table;
3134
};
3235

@@ -36,7 +39,7 @@ struct owl_pll {
3639
};
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3841
#define OWL_PLL_HW(_reg, _bfreq, _bit_idx, _shift, \
39-
_width, _min_mul, _max_mul, _table) \
42+
_width, _min_mul, _max_mul, _delay, _table) \
4043
{ \
4144
.reg = _reg, \
4245
.bfreq = _bfreq, \
@@ -45,15 +48,16 @@ struct owl_pll {
4548
.width = _width, \
4649
.min_mul = _min_mul, \
4750
.max_mul = _max_mul, \
51+
.delay = _delay, \
4852
.table = _table, \
4953
}
5054

5155
#define OWL_PLL(_struct, _name, _parent, _reg, _bfreq, _bit_idx, \
5256
_shift, _width, _min_mul, _max_mul, _table, _flags) \
5357
struct owl_pll _struct = { \
5458
.pll_hw = OWL_PLL_HW(_reg, _bfreq, _bit_idx, _shift, \
55-
_width, _min_mul, \
56-
_max_mul, _table), \
59+
_width, _min_mul, _max_mul, \
60+
OWL_PLL_DEF_DELAY, _table), \
5761
.common = { \
5862
.regmap = NULL, \
5963
.hw.init = CLK_HW_INIT(_name, \
@@ -67,8 +71,23 @@ struct owl_pll {
6771
_shift, _width, _min_mul, _max_mul, _table, _flags) \
6872
struct owl_pll _struct = { \
6973
.pll_hw = OWL_PLL_HW(_reg, _bfreq, _bit_idx, _shift, \
70-
_width, _min_mul, \
71-
_max_mul, _table), \
74+
_width, _min_mul, _max_mul, \
75+
OWL_PLL_DEF_DELAY, _table), \
76+
.common = { \
77+
.regmap = NULL, \
78+
.hw.init = CLK_HW_INIT_NO_PARENT(_name, \
79+
&owl_pll_ops, \
80+
_flags), \
81+
}, \
82+
}
83+
84+
#define OWL_PLL_NO_PARENT_DELAY(_struct, _name, _reg, _bfreq, _bit_idx, \
85+
_shift, _width, _min_mul, _max_mul, _delay, _table, \
86+
_flags) \
87+
struct owl_pll _struct = { \
88+
.pll_hw = OWL_PLL_HW(_reg, _bfreq, _bit_idx, _shift, \
89+
_width, _min_mul, _max_mul, \
90+
_delay, _table), \
7291
.common = { \
7392
.regmap = NULL, \
7493
.hw.init = CLK_HW_INIT_NO_PARENT(_name, \
@@ -78,7 +97,6 @@ struct owl_pll {
7897
}
7998

8099
#define mul_mask(m) ((1 << ((m)->width)) - 1)
81-
#define PLL_STABILITY_WAIT_US (50)
82100

83101
static inline struct owl_pll *hw_to_owl_pll(const struct clk_hw *hw)
84102
{

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