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author
Linus Torvalds
committed
Merge master.kernel.org:/pub/scm/linux/kernel/git/paulus/ppc64-2.6
2 parents 5bcaa15 + cebb2b1 commit 4706df3

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56 files changed

+699
-1240
lines changed

‎arch/ppc64/kernel/Makefile

Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -31,7 +31,7 @@ obj-$(CONFIG_PPC_MULTIPLATFORM) += nvram.o i8259.o prom_init.o prom.o
3131

3232
obj-$(CONFIG_PPC_PSERIES) += pSeries_pci.o pSeries_lpar.o pSeries_hvCall.o \
3333
pSeries_nvram.o rtasd.o ras.o pSeries_reconfig.o \
34-
pSeries_setup.o pSeries_iommu.o
34+
pSeries_setup.o pSeries_iommu.o udbg_16550.o
3535

3636
obj-$(CONFIG_PPC_BPA) += bpa_setup.o bpa_iommu.o bpa_nvram.o \
3737
bpa_iic.o spider-pic.o
@@ -58,9 +58,11 @@ obj-$(CONFIG_XICS) += xics.o
5858
obj-$(CONFIG_MPIC) += mpic.o
5959

6060
obj-$(CONFIG_PPC_PMAC) += pmac_setup.o pmac_feature.o pmac_pci.o \
61-
pmac_time.o pmac_nvram.o pmac_low_i2c.o
61+
pmac_time.o pmac_nvram.o pmac_low_i2c.o \
62+
udbg_scc.o
6263

63-
obj-$(CONFIG_PPC_MAPLE) += maple_setup.o maple_pci.o maple_time.o
64+
obj-$(CONFIG_PPC_MAPLE) += maple_setup.o maple_pci.o maple_time.o \
65+
udbg_16550.o
6466

6567
obj-$(CONFIG_U3_DART) += u3_iommu.o
6668

‎arch/ppc64/kernel/btext.c

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -7,7 +7,6 @@
77
#include <linux/kernel.h>
88
#include <linux/string.h>
99
#include <linux/init.h>
10-
#include <linux/version.h>
1110

1211
#include <asm/sections.h>
1312
#include <asm/prom.h>

‎arch/ppc64/kernel/cputable.c

Lines changed: 77 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -19,6 +19,7 @@
1919
#include <linux/init.h>
2020
#include <linux/module.h>
2121

22+
#include <asm/oprofile_impl.h>
2223
#include <asm/cputable.h>
2324

2425
struct cpu_spec* cur_cpu_spec = NULL;
@@ -54,96 +55,134 @@ struct cpu_spec cpu_specs[] = {
5455
.pvr_value = 0x00400000,
5556
.cpu_name = "POWER3 (630)",
5657
.cpu_features = CPU_FTR_SPLIT_ID_CACHE |
57-
CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_IABR |
58-
CPU_FTR_PMC8,
58+
CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_IABR,
5959
.cpu_user_features = COMMON_USER_PPC64,
6060
.icache_bsize = 128,
6161
.dcache_bsize = 128,
62+
.num_pmcs = 8,
6263
.cpu_setup = __setup_cpu_power3,
64+
#ifdef CONFIG_OPROFILE
65+
.oprofile_cpu_type = "ppc64/power3",
66+
.oprofile_model = &op_model_rs64,
67+
#endif
6368
},
6469
{ /* Power3+ */
6570
.pvr_mask = 0xffff0000,
6671
.pvr_value = 0x00410000,
6772
.cpu_name = "POWER3 (630+)",
6873
.cpu_features = CPU_FTR_SPLIT_ID_CACHE |
69-
CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_IABR |
70-
CPU_FTR_PMC8,
74+
CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_IABR,
7175
.cpu_user_features = COMMON_USER_PPC64,
7276
.icache_bsize = 128,
7377
.dcache_bsize = 128,
78+
.num_pmcs = 8,
7479
.cpu_setup = __setup_cpu_power3,
80+
#ifdef CONFIG_OPROFILE
81+
.oprofile_cpu_type = "ppc64/power3",
82+
.oprofile_model = &op_model_rs64,
83+
#endif
7584
},
7685
{ /* Northstar */
7786
.pvr_mask = 0xffff0000,
7887
.pvr_value = 0x00330000,
7988
.cpu_name = "RS64-II (northstar)",
8089
.cpu_features = CPU_FTR_SPLIT_ID_CACHE |
8190
CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_IABR |
82-
CPU_FTR_PMC8 | CPU_FTR_MMCRA | CPU_FTR_CTRL,
91+
CPU_FTR_MMCRA | CPU_FTR_CTRL,
8392
.cpu_user_features = COMMON_USER_PPC64,
8493
.icache_bsize = 128,
8594
.dcache_bsize = 128,
95+
.num_pmcs = 8,
8696
.cpu_setup = __setup_cpu_power3,
97+
#ifdef CONFIG_OPROFILE
98+
.oprofile_cpu_type = "ppc64/rs64",
99+
.oprofile_model = &op_model_rs64,
100+
#endif
87101
},
88102
{ /* Pulsar */
89103
.pvr_mask = 0xffff0000,
90104
.pvr_value = 0x00340000,
91105
.cpu_name = "RS64-III (pulsar)",
92106
.cpu_features = CPU_FTR_SPLIT_ID_CACHE |
93107
CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_IABR |
94-
CPU_FTR_PMC8 | CPU_FTR_MMCRA | CPU_FTR_CTRL,
108+
CPU_FTR_MMCRA | CPU_FTR_CTRL,
95109
.cpu_user_features = COMMON_USER_PPC64,
96110
.icache_bsize = 128,
97111
.dcache_bsize = 128,
112+
.num_pmcs = 8,
98113
.cpu_setup = __setup_cpu_power3,
114+
#ifdef CONFIG_OPROFILE
115+
.oprofile_cpu_type = "ppc64/rs64",
116+
.oprofile_model = &op_model_rs64,
117+
#endif
99118
},
100119
{ /* I-star */
101120
.pvr_mask = 0xffff0000,
102121
.pvr_value = 0x00360000,
103122
.cpu_name = "RS64-III (icestar)",
104123
.cpu_features = CPU_FTR_SPLIT_ID_CACHE |
105124
CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_IABR |
106-
CPU_FTR_PMC8 | CPU_FTR_MMCRA | CPU_FTR_CTRL,
125+
CPU_FTR_MMCRA | CPU_FTR_CTRL,
107126
.cpu_user_features = COMMON_USER_PPC64,
108127
.icache_bsize = 128,
109128
.dcache_bsize = 128,
129+
.num_pmcs = 8,
110130
.cpu_setup = __setup_cpu_power3,
131+
#ifdef CONFIG_OPROFILE
132+
.oprofile_cpu_type = "ppc64/rs64",
133+
.oprofile_model = &op_model_rs64,
134+
#endif
111135
},
112136
{ /* S-star */
113137
.pvr_mask = 0xffff0000,
114138
.pvr_value = 0x00370000,
115139
.cpu_name = "RS64-IV (sstar)",
116140
.cpu_features = CPU_FTR_SPLIT_ID_CACHE |
117141
CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_IABR |
118-
CPU_FTR_PMC8 | CPU_FTR_MMCRA | CPU_FTR_CTRL,
142+
CPU_FTR_MMCRA | CPU_FTR_CTRL,
119143
.cpu_user_features = COMMON_USER_PPC64,
120144
.icache_bsize = 128,
121145
.dcache_bsize = 128,
146+
.num_pmcs = 8,
122147
.cpu_setup = __setup_cpu_power3,
148+
#ifdef CONFIG_OPROFILE
149+
.oprofile_cpu_type = "ppc64/rs64",
150+
.oprofile_model = &op_model_rs64,
151+
#endif
123152
},
124153
{ /* Power4 */
125154
.pvr_mask = 0xffff0000,
126155
.pvr_value = 0x00350000,
127156
.cpu_name = "POWER4 (gp)",
128157
.cpu_features = CPU_FTR_SPLIT_ID_CACHE |
129158
CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
130-
CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_PMC8 | CPU_FTR_MMCRA,
159+
CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_MMCRA,
131160
.cpu_user_features = COMMON_USER_PPC64,
132161
.icache_bsize = 128,
133162
.dcache_bsize = 128,
163+
.num_pmcs = 8,
134164
.cpu_setup = __setup_cpu_power4,
165+
#ifdef CONFIG_OPROFILE
166+
.oprofile_cpu_type = "ppc64/power4",
167+
.oprofile_model = &op_model_rs64,
168+
#endif
135169
},
136170
{ /* Power4+ */
137171
.pvr_mask = 0xffff0000,
138172
.pvr_value = 0x00380000,
139173
.cpu_name = "POWER4+ (gq)",
140174
.cpu_features = CPU_FTR_SPLIT_ID_CACHE |
141175
CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
142-
CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_PMC8 | CPU_FTR_MMCRA,
176+
CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_MMCRA,
143177
.cpu_user_features = COMMON_USER_PPC64,
144178
.icache_bsize = 128,
145179
.dcache_bsize = 128,
180+
.num_pmcs = 8,
146181
.cpu_setup = __setup_cpu_power4,
182+
#ifdef CONFIG_OPROFILE
183+
.oprofile_cpu_type = "ppc64/power4",
184+
.oprofile_model = &op_model_power4,
185+
#endif
147186
},
148187
{ /* PPC970 */
149188
.pvr_mask = 0xffff0000,
@@ -152,12 +191,17 @@ struct cpu_spec cpu_specs[] = {
152191
.cpu_features = CPU_FTR_SPLIT_ID_CACHE |
153192
CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
154193
CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_ALTIVEC_COMP |
155-
CPU_FTR_CAN_NAP | CPU_FTR_PMC8 | CPU_FTR_MMCRA,
194+
CPU_FTR_CAN_NAP | CPU_FTR_MMCRA,
156195
.cpu_user_features = COMMON_USER_PPC64 |
157196
PPC_FEATURE_HAS_ALTIVEC_COMP,
158197
.icache_bsize = 128,
159198
.dcache_bsize = 128,
199+
.num_pmcs = 8,
160200
.cpu_setup = __setup_cpu_ppc970,
201+
#ifdef CONFIG_OPROFILE
202+
.oprofile_cpu_type = "ppc64/970",
203+
.oprofile_model = &op_model_power4,
204+
#endif
161205
},
162206
{ /* PPC970FX */
163207
.pvr_mask = 0xffff0000,
@@ -166,12 +210,17 @@ struct cpu_spec cpu_specs[] = {
166210
.cpu_features = CPU_FTR_SPLIT_ID_CACHE |
167211
CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
168212
CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_ALTIVEC_COMP |
169-
CPU_FTR_CAN_NAP | CPU_FTR_PMC8 | CPU_FTR_MMCRA,
213+
CPU_FTR_CAN_NAP | CPU_FTR_MMCRA,
170214
.cpu_user_features = COMMON_USER_PPC64 |
171215
PPC_FEATURE_HAS_ALTIVEC_COMP,
172216
.icache_bsize = 128,
173217
.dcache_bsize = 128,
218+
.num_pmcs = 8,
174219
.cpu_setup = __setup_cpu_ppc970,
220+
#ifdef CONFIG_OPROFILE
221+
.oprofile_cpu_type = "ppc64/970",
222+
.oprofile_model = &op_model_power4,
223+
#endif
175224
},
176225
{ /* PPC970MP */
177226
.pvr_mask = 0xffff0000,
@@ -180,12 +229,16 @@ struct cpu_spec cpu_specs[] = {
180229
.cpu_features = CPU_FTR_SPLIT_ID_CACHE |
181230
CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
182231
CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_ALTIVEC_COMP |
183-
CPU_FTR_CAN_NAP | CPU_FTR_PMC8 | CPU_FTR_MMCRA,
232+
CPU_FTR_CAN_NAP | CPU_FTR_MMCRA,
184233
.cpu_user_features = COMMON_USER_PPC64 |
185234
PPC_FEATURE_HAS_ALTIVEC_COMP,
186235
.icache_bsize = 128,
187236
.dcache_bsize = 128,
188237
.cpu_setup = __setup_cpu_ppc970,
238+
#ifdef CONFIG_OPROFILE
239+
.oprofile_cpu_type = "ppc64/970",
240+
.oprofile_model = &op_model_power4,
241+
#endif
189242
},
190243
{ /* Power5 */
191244
.pvr_mask = 0xffff0000,
@@ -199,7 +252,12 @@ struct cpu_spec cpu_specs[] = {
199252
.cpu_user_features = COMMON_USER_PPC64,
200253
.icache_bsize = 128,
201254
.dcache_bsize = 128,
255+
.num_pmcs = 6,
202256
.cpu_setup = __setup_cpu_power4,
257+
#ifdef CONFIG_OPROFILE
258+
.oprofile_cpu_type = "ppc64/power5",
259+
.oprofile_model = &op_model_power4,
260+
#endif
203261
},
204262
{ /* Power5 */
205263
.pvr_mask = 0xffff0000,
@@ -213,7 +271,12 @@ struct cpu_spec cpu_specs[] = {
213271
.cpu_user_features = COMMON_USER_PPC64,
214272
.icache_bsize = 128,
215273
.dcache_bsize = 128,
274+
.num_pmcs = 6,
216275
.cpu_setup = __setup_cpu_power4,
276+
#ifdef CONFIG_OPROFILE
277+
.oprofile_cpu_type = "ppc64/power5",
278+
.oprofile_model = &op_model_power4,
279+
#endif
217280
},
218281
{ /* BE DD1.x */
219282
.pvr_mask = 0xffff0000,
@@ -239,6 +302,7 @@ struct cpu_spec cpu_specs[] = {
239302
.cpu_user_features = COMMON_USER_PPC64,
240303
.icache_bsize = 128,
241304
.dcache_bsize = 128,
305+
.num_pmcs = 6,
242306
.cpu_setup = __setup_cpu_power4,
243307
}
244308
};

‎arch/ppc64/kernel/entry.S

Lines changed: 5 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -400,15 +400,14 @@ BEGIN_FTR_SECTION
400400
cmpd cr1,r6,r9 /* or is new ESID the same as current ESID? */
401401
cror eq,4*cr1+eq,eq
402402
beq 2f /* if yes, don't slbie it */
403-
oris r0,r6,0x0800 /* set C (class) bit */
404403

405404
/* Bolt in the new stack SLB entry */
406405
ld r7,KSP_VSID(r4) /* Get new stack's VSID */
407-
oris r6,r6,(SLB_ESID_V)@h
408-
ori r6,r6,(SLB_NUM_BOLTED-1)@l
409-
slbie r0
410-
slbie r0 /* Workaround POWER5 < DD2.1 issue */
411-
slbmte r7,r6
406+
oris r0,r6,(SLB_ESID_V)@h
407+
ori r0,r0,(SLB_NUM_BOLTED-1)@l
408+
slbie r6
409+
slbie r6 /* Workaround POWER5 < DD2.1 issue */
410+
slbmte r7,r0
412411
isync
413412

414413
2:

‎arch/ppc64/kernel/head.S

Lines changed: 6 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1646,8 +1646,9 @@ _GLOBAL(__secondary_start)
16461646
#else
16471647
/* set the ASR */
16481648
ld r3,systemcfg@got(r2) /* r3 = ptr to systemcfg */
1649+
ld r3,0(r3)
16491650
lwz r3,PLATFORM(r3) /* r3 = platform flags */
1650-
cmpldi r3,PLATFORM_PSERIES_LPAR
1651+
andi. r3,r3,PLATFORM_LPAR /* Test if bit 0 is set (LPAR bit) */
16511652
bne 98f
16521653
mfspr r3,PVR
16531654
srwi r3,r3,16
@@ -1809,8 +1810,9 @@ _STATIC(start_here_multiplatform)
18091810
ld r3,PACASTABREAL(r13)
18101811
ori r4,r3,1 /* turn on valid bit */
18111812
ld r3,systemcfg@got(r2) /* r3 = ptr to systemcfg */
1813+
ld r3,0(r3)
18121814
lwz r3,PLATFORM(r3) /* r3 = platform flags */
1813-
cmpldi r3,PLATFORM_PSERIES_LPAR
1815+
andi. r3,r3,PLATFORM_LPAR /* Test if bit 0 is set (LPAR bit) */
18141816
bne 98f
18151817
mfspr r3,PVR
18161818
srwi r3,r3,16
@@ -1828,9 +1830,10 @@ _STATIC(start_here_multiplatform)
18281830
99:
18291831
/* Set SDR1 (hash table pointer) */
18301832
ld r3,systemcfg@got(r2) /* r3 = ptr to systemcfg */
1833+
ld r3,0(r3)
18311834
lwz r3,PLATFORM(r3) /* r3 = platform flags */
18321835
/* Test if bit 0 is set (LPAR bit) */
1833-
andi. r3,r3,0x1
1836+
andi. r3,r3,PLATFORM_LPAR
18341837
bne 98f
18351838
LOADADDR(r6,_SDR1) /* Only if NOT LPAR */
18361839
sub r6,r6,r26

‎arch/ppc64/kernel/lparcfg.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -569,7 +569,7 @@ struct file_operations lparcfg_fops = {
569569
int __init lparcfg_init(void)
570570
{
571571
struct proc_dir_entry *ent;
572-
mode_t mode = S_IRUSR;
572+
mode_t mode = S_IRUSR | S_IRGRP | S_IROTH;
573573

574574
/* Allow writing if we have FW_FEATURE_SPLPAR */
575575
if (firmware_has_feature(FW_FEATURE_SPLPAR)) {

‎arch/ppc64/kernel/maple_setup.c

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -207,9 +207,6 @@ static void __init maple_init_early(void)
207207
comport = (void *)ioremap(physport, 16);
208208
udbg_init_uart(comport, default_speed);
209209

210-
ppc_md.udbg_putc = udbg_putc;
211-
ppc_md.udbg_getc = udbg_getc;
212-
ppc_md.udbg_getc_poll = udbg_getc_poll;
213210
DBG("Hello World !\n");
214211
}
215212

‎arch/ppc64/kernel/pSeries_lpar.c

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -192,9 +192,9 @@ static unsigned char udbg_getcLP(void)
192192
void udbg_init_debug_lpar(void)
193193
{
194194
vtermno = 0;
195-
ppc_md.udbg_putc = udbg_putcLP;
196-
ppc_md.udbg_getc = udbg_getcLP;
197-
ppc_md.udbg_getc_poll = udbg_getc_pollLP;
195+
udbg_putc = udbg_putcLP;
196+
udbg_getc = udbg_getcLP;
197+
udbg_getc_poll = udbg_getc_pollLP;
198198
}
199199

200200
/* returns 0 if couldn't find or use /chosen/stdout as console */
@@ -227,18 +227,18 @@ int find_udbg_vterm(void)
227227
termno = (u32 *)get_property(stdout_node, "reg", NULL);
228228
if (termno) {
229229
vtermno = termno[0];
230-
ppc_md.udbg_putc = udbg_putcLP;
231-
ppc_md.udbg_getc = udbg_getcLP;
232-
ppc_md.udbg_getc_poll = udbg_getc_pollLP;
230+
udbg_putc = udbg_putcLP;
231+
udbg_getc = udbg_getcLP;
232+
udbg_getc_poll = udbg_getc_pollLP;
233233
found = 1;
234234
}
235235
} else if (device_is_compatible(stdout_node, "hvterm-protocol")) {
236236
termno = (u32 *)get_property(stdout_node, "reg", NULL);
237237
if (termno) {
238238
vtermno = termno[0];
239-
ppc_md.udbg_putc = udbg_hvsi_putc;
240-
ppc_md.udbg_getc = udbg_hvsi_getc;
241-
ppc_md.udbg_getc_poll = udbg_hvsi_getc_poll;
239+
udbg_putc = udbg_hvsi_putc;
240+
udbg_getc = udbg_hvsi_getc;
241+
udbg_getc_poll = udbg_hvsi_getc_poll;
242242
found = 1;
243243
}
244244
}

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