@@ -515,6 +515,44 @@ static int bxt_get_cd(struct mmc_host *mmc)
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return ret ;
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}
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+ #define SDHCI_INTEL_PWR_TIMEOUT_CNT 20
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+ #define SDHCI_INTEL_PWR_TIMEOUT_UDELAY 100
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+
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+ static void sdhci_intel_set_power (struct sdhci_host * host , unsigned char mode ,
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+ unsigned short vdd )
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+ {
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+ int cntr ;
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+ u8 reg ;
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+
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+ sdhci_set_power (host , mode , vdd );
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+
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+ if (mode == MMC_POWER_OFF )
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+ return ;
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+
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+ /*
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+ * Bus power might not enable after D3 -> D0 transition due to the
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+ * present state not yet having propagated. Retry for up to 2ms.
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+ */
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+ for (cntr = 0 ; cntr < SDHCI_INTEL_PWR_TIMEOUT_CNT ; cntr ++ ) {
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+ reg = sdhci_readb (host , SDHCI_POWER_CONTROL );
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+ if (reg & SDHCI_POWER_ON )
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+ break ;
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+ udelay (SDHCI_INTEL_PWR_TIMEOUT_UDELAY );
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+ reg |= SDHCI_POWER_ON ;
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+ sdhci_writeb (host , reg , SDHCI_POWER_CONTROL );
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+ }
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+ }
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+
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+ static const struct sdhci_ops sdhci_intel_byt_ops = {
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+ .set_clock = sdhci_set_clock ,
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+ .set_power = sdhci_intel_set_power ,
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+ .enable_dma = sdhci_pci_enable_dma ,
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+ .set_bus_width = sdhci_pci_set_bus_width ,
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+ .reset = sdhci_reset ,
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+ .set_uhs_signaling = sdhci_set_uhs_signaling ,
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+ .hw_reset = sdhci_pci_hw_reset ,
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+ };
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+
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static void byt_read_dsm (struct sdhci_pci_slot * slot )
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{
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struct intel_host * intel_host = sdhci_pci_priv (slot );
@@ -606,44 +644,6 @@ static int byt_sd_probe_slot(struct sdhci_pci_slot *slot)
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return 0 ;
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}
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- #define SDHCI_INTEL_PWR_TIMEOUT_CNT 20
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- #define SDHCI_INTEL_PWR_TIMEOUT_UDELAY 100
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-
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- static void sdhci_intel_set_power (struct sdhci_host * host , unsigned char mode ,
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- unsigned short vdd )
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- {
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- int cntr ;
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- u8 reg ;
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-
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- sdhci_set_power (host , mode , vdd );
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-
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- if (mode == MMC_POWER_OFF )
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- return ;
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-
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- /*
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- * Bus power might not enable after D3 -> D0 transition due to the
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- * present state not yet having propagated. Retry for up to 2ms.
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- */
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- for (cntr = 0 ; cntr < SDHCI_INTEL_PWR_TIMEOUT_CNT ; cntr ++ ) {
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- reg = sdhci_readb (host , SDHCI_POWER_CONTROL );
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- if (reg & SDHCI_POWER_ON )
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- break ;
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- udelay (SDHCI_INTEL_PWR_TIMEOUT_UDELAY );
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- reg |= SDHCI_POWER_ON ;
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- sdhci_writeb (host , reg , SDHCI_POWER_CONTROL );
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- }
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- }
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-
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- static const struct sdhci_ops sdhci_intel_byt_ops = {
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- .set_clock = sdhci_set_clock ,
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- .set_power = sdhci_intel_set_power ,
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- .enable_dma = sdhci_pci_enable_dma ,
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- .set_bus_width = sdhci_pci_set_bus_width ,
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- .reset = sdhci_reset ,
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- .set_uhs_signaling = sdhci_set_uhs_signaling ,
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- .hw_reset = sdhci_pci_hw_reset ,
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- };
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-
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static const struct sdhci_pci_fixes sdhci_intel_byt_emmc = {
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.allow_runtime_pm = true,
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.probe_slot = byt_emmc_probe_slot ,
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