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rmileckilinvjw
rmilecki
authored and
linvjw
committed
b43: N-PHY: implement spurious tone avoidance
Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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‎drivers/net/wireless/b43/phy_n.c

Lines changed: 91 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -4023,13 +4023,69 @@ int b43_phy_initn(struct b43_wldev *dev)
40234023
return 0;
40244024
}
40254025

4026+
/* http://bcm-v4.sipsolutions.net/802.11/PmuSpurAvoid */
4027+
static void b43_nphy_pmu_spur_avoid(struct b43_wldev *dev, bool avoid)
4028+
{
4029+
struct bcma_drv_cc *cc = &dev->dev->bdev->bus->drv_cc;
4030+
u32 pmu_ctl;
4031+
if (dev->dev->chip_id == 43224 || dev->dev->chip_id == 43225) {
4032+
if (avoid) {
4033+
bcma_chipco_pll_write(cc, 0x0, 0x11500010);
4034+
bcma_chipco_pll_write(cc, 0x1, 0x000C0C06);
4035+
bcma_chipco_pll_write(cc, 0x2, 0x0F600a08);
4036+
bcma_chipco_pll_write(cc, 0x3, 0x00000000);
4037+
bcma_chipco_pll_write(cc, 0x4, 0x2001E920);
4038+
bcma_chipco_pll_write(cc, 0x5, 0x88888815);
4039+
} else {
4040+
bcma_chipco_pll_write(cc, 0x0, 0x11100010);
4041+
bcma_chipco_pll_write(cc, 0x1, 0x000c0c06);
4042+
bcma_chipco_pll_write(cc, 0x2, 0x03000a08);
4043+
bcma_chipco_pll_write(cc, 0x3, 0x00000000);
4044+
bcma_chipco_pll_write(cc, 0x4, 0x200005c0);
4045+
bcma_chipco_pll_write(cc, 0x5, 0x88888815);
4046+
}
4047+
pmu_ctl = BCMA_CC_PMU_CTL_PLL_UPD;
4048+
} else if (dev->dev->chip_id == 0x4716) {
4049+
if (avoid) {
4050+
bcma_chipco_pll_write(cc, 0x0, 0x11500060);
4051+
bcma_chipco_pll_write(cc, 0x1, 0x080C0C06);
4052+
bcma_chipco_pll_write(cc, 0x2, 0x0F600000);
4053+
bcma_chipco_pll_write(cc, 0x3, 0x00000000);
4054+
bcma_chipco_pll_write(cc, 0x4, 0x2001E924);
4055+
bcma_chipco_pll_write(cc, 0x5, 0x88888815);
4056+
} else {
4057+
bcma_chipco_pll_write(cc, 0x0, 0x11100060);
4058+
bcma_chipco_pll_write(cc, 0x1, 0x080c0c06);
4059+
bcma_chipco_pll_write(cc, 0x2, 0x03000000);
4060+
bcma_chipco_pll_write(cc, 0x3, 0x00000000);
4061+
bcma_chipco_pll_write(cc, 0x4, 0x200005c0);
4062+
bcma_chipco_pll_write(cc, 0x5, 0x88888815);
4063+
}
4064+
pmu_ctl = BCMA_CC_PMU_CTL_PLL_UPD | BCMA_CC_PMU_CTL_NOILPONW;
4065+
} else if (dev->dev->chip_id == 0x4322 || dev->dev->chip_id == 0x4340 ||
4066+
dev->dev->chip_id == 0x4341) {
4067+
bcma_chipco_pll_write(cc, 0x0, 0x11100070);
4068+
bcma_chipco_pll_write(cc, 0x1, 0x1014140a);
4069+
bcma_chipco_pll_write(cc, 0x5, 0x88888854);
4070+
if (avoid)
4071+
bcma_chipco_pll_write(cc, 0x2, 0x05201828);
4072+
else
4073+
bcma_chipco_pll_write(cc, 0x2, 0x05001828);
4074+
pmu_ctl = BCMA_CC_PMU_CTL_PLL_UPD;
4075+
} else {
4076+
return;
4077+
}
4078+
bcma_cc_set32(cc, BCMA_CC_PMU_CTL, pmu_ctl);
4079+
}
4080+
40264081
/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/ChanspecSetup */
40274082
static void b43_nphy_channel_setup(struct b43_wldev *dev,
40284083
const struct b43_phy_n_sfo_cfg *e,
40294084
struct ieee80211_channel *new_channel)
40304085
{
40314086
struct b43_phy *phy = &dev->phy;
40324087
struct b43_phy_n *nphy = dev->phy.n;
4088+
int ch = new_channel->hw_value;
40334089

40344090
u16 old_band_5ghz;
40354091
u32 tmp32;
@@ -4069,8 +4125,41 @@ static void b43_nphy_channel_setup(struct b43_wldev *dev,
40694125

40704126
b43_nphy_tx_lp_fbw(dev);
40714127

4072-
if (dev->phy.rev >= 3 && 0) {
4073-
/* TODO */
4128+
if (dev->phy.rev >= 3 &&
4129+
dev->phy.n->spur_avoid != B43_SPUR_AVOID_DISABLE) {
4130+
bool avoid = false;
4131+
if (dev->phy.n->spur_avoid == B43_SPUR_AVOID_FORCE) {
4132+
avoid = true;
4133+
} else if (!b43_channel_type_is_40mhz(phy->channel_type)) {
4134+
if ((ch >= 5 && ch <= 8) || ch == 13 || ch == 14)
4135+
avoid = true;
4136+
} else { /* 40MHz */
4137+
if (nphy->aband_spurwar_en &&
4138+
(ch == 38 || ch == 102 || ch == 118))
4139+
avoid = dev->dev->chip_id == 0x4716;
4140+
}
4141+
4142+
b43_nphy_pmu_spur_avoid(dev, avoid);
4143+
4144+
if (dev->dev->chip_id == 43222 || dev->dev->chip_id == 43224 ||
4145+
dev->dev->chip_id == 43225) {
4146+
b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW,
4147+
avoid ? 0x5341 : 0x8889);
4148+
b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0x8);
4149+
}
4150+
4151+
if (dev->phy.rev == 3 || dev->phy.rev == 4)
4152+
; /* TODO: reset PLL */
4153+
4154+
if (avoid)
4155+
b43_phy_set(dev, B43_NPHY_BBCFG, B43_NPHY_BBCFG_RSTRX);
4156+
else
4157+
b43_phy_mask(dev, B43_NPHY_BBCFG,
4158+
~B43_NPHY_BBCFG_RSTRX & 0xFFFF);
4159+
4160+
b43_nphy_reset_cca(dev);
4161+
4162+
/* wl sets useless phy_isspuravoid here */
40744163
}
40754164

40764165
b43_phy_write(dev, B43_NPHY_NDATAT_DUP40, 0x3830);

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