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ecree-solarflareBen Hutchings
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sfc: Refactor EF10 stat mask code to allow for more conditional stats
Previously, efx_ef10_stat_mask returned a static const unsigned long[], which meant that each possible mask had to be declared statically with STAT_MASK_BITMAP. Since adding a condition would double the size of the decision tree, we now create the bitmask dynamically. To do this, we have two functions efx_ef10_raw_stat_mask, which returns a u64, and efx_ef10_get_stat_mask, which fills in an unsigned long * argument. Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
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  • drivers/net/ethernet/sfc

1 file changed

+28
-21
lines changed

drivers/net/ethernet/sfc/ef10.c

Lines changed: 28 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -498,52 +498,57 @@ static const struct efx_hw_stat_desc efx_ef10_stat_desc[EF10_STAT_COUNT] = {
498498
#define HUNT_40G_EXTRA_STAT_MASK ((1ULL << EF10_STAT_rx_align_error) | \
499499
(1ULL << EF10_STAT_rx_length_error))
500500

501-
#if BITS_PER_LONG == 64
502-
#define STAT_MASK_BITMAP(bits) (bits)
503-
#else
504-
#define STAT_MASK_BITMAP(bits) (bits) & 0xffffffff, (bits) >> 32
505-
#endif
506-
507-
static const unsigned long *efx_ef10_stat_mask(struct efx_nic *efx)
501+
static u64 efx_ef10_raw_stat_mask(struct efx_nic *efx)
508502
{
509-
static const unsigned long hunt_40g_stat_mask[] = {
510-
STAT_MASK_BITMAP(HUNT_COMMON_STAT_MASK |
511-
HUNT_40G_EXTRA_STAT_MASK)
512-
};
513-
static const unsigned long hunt_10g_only_stat_mask[] = {
514-
STAT_MASK_BITMAP(HUNT_COMMON_STAT_MASK |
515-
HUNT_10G_ONLY_STAT_MASK)
516-
};
503+
u64 raw_mask = HUNT_COMMON_STAT_MASK;
517504
u32 port_caps = efx_mcdi_phy_get_caps(efx);
518505

519506
if (port_caps & (1 << MC_CMD_PHY_CAP_40000FDX_LBN))
520-
return hunt_40g_stat_mask;
507+
raw_mask |= HUNT_40G_EXTRA_STAT_MASK;
521508
else
522-
return hunt_10g_only_stat_mask;
509+
raw_mask |= HUNT_10G_ONLY_STAT_MASK;
510+
return raw_mask;
511+
}
512+
513+
static void efx_ef10_get_stat_mask(struct efx_nic *efx, unsigned long *mask)
514+
{
515+
u64 raw_mask = efx_ef10_raw_stat_mask(efx);
516+
517+
#if BITS_PER_LONG == 64
518+
mask[0] = raw_mask;
519+
#else
520+
mask[0] = raw_mask & 0xffffffff;
521+
mask[1] = raw_mask >> 32;
522+
#endif
523523
}
524524

525525
static size_t efx_ef10_describe_stats(struct efx_nic *efx, u8 *names)
526526
{
527+
DECLARE_BITMAP(mask, EF10_STAT_COUNT);
528+
529+
efx_ef10_get_stat_mask(efx, mask);
527530
return efx_nic_describe_stats(efx_ef10_stat_desc, EF10_STAT_COUNT,
528-
efx_ef10_stat_mask(efx), names);
531+
mask, names);
529532
}
530533

531534
static int efx_ef10_try_update_nic_stats(struct efx_nic *efx)
532535
{
533536
struct efx_ef10_nic_data *nic_data = efx->nic_data;
534-
const unsigned long *stats_mask = efx_ef10_stat_mask(efx);
537+
DECLARE_BITMAP(mask, EF10_STAT_COUNT);
535538
__le64 generation_start, generation_end;
536539
u64 *stats = nic_data->stats;
537540
__le64 *dma_stats;
538541

542+
efx_ef10_get_stat_mask(efx, mask);
543+
539544
dma_stats = efx->stats_buffer.addr;
540545
nic_data = efx->nic_data;
541546

542547
generation_end = dma_stats[MC_CMD_MAC_GENERATION_END];
543548
if (generation_end == EFX_MC_STATS_GENERATION_INVALID)
544549
return 0;
545550
rmb();
546-
efx_nic_update_stats(efx_ef10_stat_desc, EF10_STAT_COUNT, stats_mask,
551+
efx_nic_update_stats(efx_ef10_stat_desc, EF10_STAT_COUNT, mask,
547552
stats, efx->stats_buffer.addr, false);
548553
rmb();
549554
generation_start = dma_stats[MC_CMD_MAC_GENERATION_START];
@@ -564,12 +569,14 @@ static int efx_ef10_try_update_nic_stats(struct efx_nic *efx)
564569
static size_t efx_ef10_update_stats(struct efx_nic *efx, u64 *full_stats,
565570
struct rtnl_link_stats64 *core_stats)
566571
{
567-
const unsigned long *mask = efx_ef10_stat_mask(efx);
572+
DECLARE_BITMAP(mask, EF10_STAT_COUNT);
568573
struct efx_ef10_nic_data *nic_data = efx->nic_data;
569574
u64 *stats = nic_data->stats;
570575
size_t stats_count = 0, index;
571576
int retry;
572577

578+
efx_ef10_get_stat_mask(efx, mask);
579+
573580
/* If we're unlucky enough to read statistics during the DMA, wait
574581
* up to 10ms for it to finish (typically takes <500us)
575582
*/

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