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ozbenhdavem330
ozbenh
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davem330
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ftgmac100: Remove rx descriptor accessors
Directly access the fields when needed. The accessors add clutter not clarity and in some cases cause unnecessary read-modify-write type access on the slow (uncached) descriptor memory. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: David S. Miller <davem@davemloft.net>
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-115
lines changed

2 files changed

+53
-115
lines changed

‎drivers/net/ethernet/faraday/ftgmac100.c

Lines changed: 41 additions & 111 deletions
Original file line numberDiff line numberDiff line change
@@ -278,92 +278,6 @@ static void ftgmac100_stop_hw(struct ftgmac100 *priv)
278278
iowrite32(0, priv->base + FTGMAC100_OFFSET_MACCR);
279279
}
280280

281-
static bool ftgmac100_rxdes_first_segment(struct ftgmac100_rxdes *rxdes)
282-
{
283-
return rxdes->rxdes0 & cpu_to_le32(FTGMAC100_RXDES0_FRS);
284-
}
285-
286-
static bool ftgmac100_rxdes_last_segment(struct ftgmac100_rxdes *rxdes)
287-
{
288-
return rxdes->rxdes0 & cpu_to_le32(FTGMAC100_RXDES0_LRS);
289-
}
290-
291-
static bool ftgmac100_rxdes_packet_ready(struct ftgmac100_rxdes *rxdes)
292-
{
293-
return rxdes->rxdes0 & cpu_to_le32(FTGMAC100_RXDES0_RXPKT_RDY);
294-
}
295-
296-
#define RXDES0_ANY_ERROR ( \
297-
FTGMAC100_RXDES0_RX_ERR | \
298-
FTGMAC100_RXDES0_CRC_ERR | \
299-
FTGMAC100_RXDES0_FTL | \
300-
FTGMAC100_RXDES0_RUNT | \
301-
FTGMAC100_RXDES0_RX_ODD_NB)
302-
303-
static inline bool ftgmac100_rxdes_any_error(struct ftgmac100_rxdes *rxdes)
304-
{
305-
return rxdes->rxdes0 & cpu_to_le32(RXDES0_ANY_ERROR);
306-
}
307-
308-
static bool ftgmac100_rxdes_rx_error(struct ftgmac100_rxdes *rxdes)
309-
{
310-
return rxdes->rxdes0 & cpu_to_le32(FTGMAC100_RXDES0_RX_ERR);
311-
}
312-
313-
static bool ftgmac100_rxdes_crc_error(struct ftgmac100_rxdes *rxdes)
314-
{
315-
return rxdes->rxdes0 & cpu_to_le32(FTGMAC100_RXDES0_CRC_ERR);
316-
}
317-
318-
static bool ftgmac100_rxdes_frame_too_long(struct ftgmac100_rxdes *rxdes)
319-
{
320-
return rxdes->rxdes0 & cpu_to_le32(FTGMAC100_RXDES0_FTL);
321-
}
322-
323-
static bool ftgmac100_rxdes_runt(struct ftgmac100_rxdes *rxdes)
324-
{
325-
return rxdes->rxdes0 & cpu_to_le32(FTGMAC100_RXDES0_RUNT);
326-
}
327-
328-
static bool ftgmac100_rxdes_odd_nibble(struct ftgmac100_rxdes *rxdes)
329-
{
330-
return rxdes->rxdes0 & cpu_to_le32(FTGMAC100_RXDES0_RX_ODD_NB);
331-
}
332-
333-
static unsigned int ftgmac100_rxdes_data_length(struct ftgmac100_rxdes *rxdes)
334-
{
335-
return le32_to_cpu(rxdes->rxdes0) & FTGMAC100_RXDES0_VDBC;
336-
}
337-
338-
static bool ftgmac100_rxdes_multicast(struct ftgmac100_rxdes *rxdes)
339-
{
340-
return rxdes->rxdes0 & cpu_to_le32(FTGMAC100_RXDES0_MULTICAST);
341-
}
342-
343-
static void ftgmac100_rxdes_set_end_of_ring(const struct ftgmac100 *priv,
344-
struct ftgmac100_rxdes *rxdes)
345-
{
346-
rxdes->rxdes0 |= cpu_to_le32(priv->rxdes0_edorr_mask);
347-
}
348-
349-
static void ftgmac100_rxdes_set_dma_addr(struct ftgmac100_rxdes *rxdes,
350-
dma_addr_t addr)
351-
{
352-
rxdes->rxdes3 = cpu_to_le32(addr);
353-
}
354-
355-
static dma_addr_t ftgmac100_rxdes_get_dma_addr(struct ftgmac100_rxdes *rxdes)
356-
{
357-
return le32_to_cpu(rxdes->rxdes3);
358-
}
359-
360-
static inline bool ftgmac100_rxdes_csum_err(struct ftgmac100_rxdes *rxdes)
361-
{
362-
return !!(rxdes->rxdes1 & cpu_to_le32(FTGMAC100_RXDES1_TCP_CHKSUM_ERR |
363-
FTGMAC100_RXDES1_UDP_CHKSUM_ERR |
364-
FTGMAC100_RXDES1_IP_CHKSUM_ERR));
365-
}
366-
367281
static int ftgmac100_alloc_rx_buf(struct ftgmac100 *priv, unsigned int entry,
368282
struct ftgmac100_rxdes *rxdes, gfp_t gfp)
369283
{
@@ -395,13 +309,16 @@ static int ftgmac100_alloc_rx_buf(struct ftgmac100 *priv, unsigned int entry,
395309
priv->rx_skbs[entry] = skb;
396310

397311
/* Store DMA address into RX desc */
398-
ftgmac100_rxdes_set_dma_addr(rxdes, map);
312+
rxdes->rxdes3 = cpu_to_le32(map);
399313

400314
/* Ensure the above is ordered vs clearing the OWN bit */
401315
dma_wmb();
402316

403-
/* Clean rxdes0 (which resets own bit) */
404-
rxdes->rxdes0 &= cpu_to_le32(priv->rxdes0_edorr_mask);
317+
/* Clean status (which resets own bit) */
318+
if (entry == (RX_QUEUE_ENTRIES - 1))
319+
rxdes->rxdes0 = cpu_to_le32(priv->rxdes0_edorr_mask);
320+
else
321+
rxdes->rxdes0 = 0;
405322

406323
return 0;
407324
}
@@ -411,20 +328,19 @@ static int ftgmac100_next_rx_pointer(int pointer)
411328
return (pointer + 1) & (RX_QUEUE_ENTRIES - 1);
412329
}
413330

414-
static void ftgmac100_rx_packet_error(struct ftgmac100 *priv,
415-
struct ftgmac100_rxdes *rxdes)
331+
static void ftgmac100_rx_packet_error(struct ftgmac100 *priv, u32 status)
416332
{
417333
struct net_device *netdev = priv->netdev;
418334

419-
if (ftgmac100_rxdes_rx_error(rxdes))
335+
if (status & FTGMAC100_RXDES0_RX_ERR)
420336
netdev->stats.rx_errors++;
421337

422-
if (ftgmac100_rxdes_crc_error(rxdes))
338+
if (status & FTGMAC100_RXDES0_CRC_ERR)
423339
netdev->stats.rx_crc_errors++;
424340

425-
if (ftgmac100_rxdes_frame_too_long(rxdes) ||
426-
ftgmac100_rxdes_runt(rxdes) ||
427-
ftgmac100_rxdes_odd_nibble(rxdes))
341+
if (status & (FTGMAC100_RXDES0_FTL |
342+
FTGMAC100_RXDES0_RUNT |
343+
FTGMAC100_RXDES0_RX_ODD_NB))
428344
netdev->stats.rx_length_errors++;
429345
}
430346

@@ -434,27 +350,31 @@ static bool ftgmac100_rx_packet(struct ftgmac100 *priv, int *processed)
434350
struct ftgmac100_rxdes *rxdes;
435351
struct sk_buff *skb;
436352
unsigned int pointer, size;
353+
u32 status;
437354
dma_addr_t map;
438355

439356
/* Grab next RX descriptor */
440357
pointer = priv->rx_pointer;
441358
rxdes = &priv->descs->rxdes[pointer];
442359

360+
/* Grab descriptor status */
361+
status = le32_to_cpu(rxdes->rxdes0);
362+
443363
/* Do we have a packet ? */
444-
if (!ftgmac100_rxdes_packet_ready(rxdes))
364+
if (!(status & FTGMAC100_RXDES0_RXPKT_RDY))
445365
return false;
446366

447367
/* Order subsequent reads with the test for the ready bit */
448368
dma_rmb();
449369

450370
/* We don't cope with fragmented RX packets */
451-
if (unlikely(!ftgmac100_rxdes_first_segment(rxdes) ||
452-
!ftgmac100_rxdes_last_segment(rxdes)))
371+
if (unlikely(!(status & FTGMAC100_RXDES0_FRS) ||
372+
!(status & FTGMAC100_RXDES0_LRS)))
453373
goto drop;
454374

455375
/* Any error (other than csum offload) flagged ? */
456-
if (unlikely(ftgmac100_rxdes_any_error(rxdes))) {
457-
ftgmac100_rx_packet_error(priv, rxdes);
376+
if (unlikely(status & RXDES0_ANY_ERROR)) {
377+
ftgmac100_rx_packet_error(priv, status);
458378
goto drop;
459379
}
460380

@@ -467,7 +387,7 @@ static bool ftgmac100_rx_packet(struct ftgmac100 *priv, int *processed)
467387
goto drop;
468388
}
469389

470-
if (unlikely(ftgmac100_rxdes_multicast(rxdes)))
390+
if (unlikely(status & FTGMAC100_RXDES0_MULTICAST))
471391
netdev->stats.multicast++;
472392

473393
/* If the HW found checksum errors, bounce it to software.
@@ -489,11 +409,12 @@ static bool ftgmac100_rx_packet(struct ftgmac100 *priv, int *processed)
489409
}
490410

491411
/* Grab received size annd transfer to skb */
492-
size = ftgmac100_rxdes_data_length(rxdes);
412+
size = status & FTGMAC100_RXDES0_VDBC;
493413
skb_put(skb, size);
494414

495415
/* Tear down DMA mapping, do necessary cache management */
496-
map = ftgmac100_rxdes_get_dma_addr(rxdes);
416+
map = le32_to_cpu(rxdes->rxdes3);
417+
497418
#if defined(CONFIG_ARM) && !defined(CONFIG_ARM_DMA_USE_IOMMU)
498419
/* When we don't have an iommu, we can save cycles by not
499420
* invalidating the cache for the part of the packet that
@@ -525,7 +446,7 @@ static bool ftgmac100_rx_packet(struct ftgmac100 *priv, int *processed)
525446

526447
drop:
527448
/* Clean rxdes0 (which resets own bit) */
528-
rxdes->rxdes0 &= cpu_to_le32(priv->rxdes0_edorr_mask);
449+
rxdes->rxdes0 = cpu_to_le32(status & priv->rxdes0_edorr_mask);
529450
priv->rx_pointer = ftgmac100_next_rx_pointer(pointer);
530451
netdev->stats.rx_dropped++;
531452
return true;
@@ -747,7 +668,7 @@ static void ftgmac100_free_buffers(struct ftgmac100 *priv)
747668
for (i = 0; i < RX_QUEUE_ENTRIES; i++) {
748669
struct ftgmac100_rxdes *rxdes = &priv->descs->rxdes[i];
749670
struct sk_buff *skb = priv->rx_skbs[i];
750-
dma_addr_t map = ftgmac100_rxdes_get_dma_addr(rxdes);
671+
dma_addr_t map = le32_to_cpu(rxdes->rxdes3);
751672

752673
if (!skb)
753674
continue;
@@ -806,15 +727,17 @@ static int ftgmac100_alloc_rings(struct ftgmac100 *priv)
806727

807728
static void ftgmac100_init_rings(struct ftgmac100 *priv)
808729
{
730+
struct ftgmac100_rxdes *rxdes;
809731
int i;
810732

811733
/* Initialize RX ring */
812734
for (i = 0; i < RX_QUEUE_ENTRIES; i++) {
813-
struct ftgmac100_rxdes *rxdes = &priv->descs->rxdes[i];
814-
ftgmac100_rxdes_set_dma_addr(rxdes, priv->rx_scratch_dma);
735+
rxdes = &priv->descs->rxdes[i];
815736
rxdes->rxdes0 = 0;
737+
rxdes->rxdes3 = cpu_to_le32(priv->rx_scratch_dma);
816738
}
817-
ftgmac100_rxdes_set_end_of_ring(priv, &priv->descs->rxdes[i - 1]);
739+
/* Mark the end of the ring */
740+
rxdes->rxdes0 |= cpu_to_le32(priv->rxdes0_edorr_mask);
818741

819742
/* Initialize TX ring */
820743
for (i = 0; i < TX_QUEUE_ENTRIES; i++)
@@ -1030,6 +953,14 @@ static irqreturn_t ftgmac100_interrupt(int irq, void *dev_id)
1030953
return IRQ_HANDLED;
1031954
}
1032955

956+
static bool ftgmac100_check_rx(struct ftgmac100 *priv)
957+
{
958+
struct ftgmac100_rxdes *rxdes = &priv->descs->rxdes[priv->rx_pointer];
959+
960+
/* Do we have a packet ? */
961+
return !!(rxdes->rxdes0 & cpu_to_le32(FTGMAC100_RXDES0_RXPKT_RDY));
962+
}
963+
1033964
static int ftgmac100_poll(struct napi_struct *napi, int budget)
1034965
{
1035966
struct ftgmac100 *priv = container_of(napi, struct ftgmac100, napi);
@@ -1069,8 +1000,7 @@ static int ftgmac100_poll(struct napi_struct *napi, int budget)
10691000
*/
10701001
iowrite32(FTGMAC100_INT_RXTX,
10711002
priv->base + FTGMAC100_OFFSET_ISR);
1072-
if (ftgmac100_rxdes_packet_ready
1073-
(ftgmac100_current_rxdes(priv)) || priv->tx_pending)
1003+
if (ftgmac100_check_rx(priv) || priv->tx_pending)
10741004
return budget;
10751005

10761006
/* deschedule NAPI */

‎drivers/net/ethernet/faraday/ftgmac100.h

Lines changed: 12 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -227,10 +227,10 @@ struct ftgmac100_txdes {
227227
* Receive descriptor, aligned to 16 bytes
228228
*/
229229
struct ftgmac100_rxdes {
230-
unsigned int rxdes0;
231-
unsigned int rxdes1;
232-
unsigned int rxdes2; /* not used by HW */
233-
unsigned int rxdes3; /* RXBUF_BADR */
230+
__le32 rxdes0; /* Control & status bits */
231+
__le32 rxdes1; /* Checksum and vlan status */
232+
__le32 rxdes2; /* length/type on AST2500 */
233+
__le32 rxdes3; /* DMA buffer address */
234234
} __attribute__ ((aligned(16)));
235235

236236
#define FTGMAC100_RXDES0_VDBC 0x3fff
@@ -248,6 +248,14 @@ struct ftgmac100_rxdes {
248248
#define FTGMAC100_RXDES0_FRS (1 << 29)
249249
#define FTGMAC100_RXDES0_RXPKT_RDY (1 << 31)
250250

251+
/* Errors we care about for dropping packets */
252+
#define RXDES0_ANY_ERROR ( \
253+
FTGMAC100_RXDES0_RX_ERR | \
254+
FTGMAC100_RXDES0_CRC_ERR | \
255+
FTGMAC100_RXDES0_FTL | \
256+
FTGMAC100_RXDES0_RUNT | \
257+
FTGMAC100_RXDES0_RX_ODD_NB)
258+
251259
#define FTGMAC100_RXDES1_VLANTAG_CI 0xffff
252260
#define FTGMAC100_RXDES1_PROT_MASK (0x3 << 20)
253261
#define FTGMAC100_RXDES1_PROT_NONIP (0x0 << 20)

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