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torvaldstorvalds
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Merge branch 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull timer updates from Thomas Gleixner: "This update provides the following changes: - The rework of the timer wheel which addresses the shortcomings of the current wheel (cascading, slow search for next expiring timer, etc). That's the first major change of the wheel in almost 20 years since Finn implemted it. - A large overhaul of the clocksource drivers init functions to consolidate the Device Tree initialization - Some more Y2038 updates - A capability fix for timerfd - Yet another clock chip driver - The usual pile of updates, comment improvements all over the place" * 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (130 commits) tick/nohz: Optimize nohz idle enter clockevents: Make clockevents_subsys static clocksource/drivers/time-armada-370-xp: Fix return value check timers: Implement optimization for same expiry time in mod_timer() timers: Split out index calculation timers: Only wake softirq if necessary timers: Forward the wheel clock whenever possible timers/nohz: Remove pointless tick_nohz_kick_tick() function timers: Optimize collect_expired_timers() for NOHZ timers: Move __run_timers() function timers: Remove set_timer_slack() leftovers timers: Switch to a non-cascading wheel timers: Reduce the CPU index space to 256k timers: Give a few structs and members proper names hlist: Add hlist_is_singular_node() helper signals: Use hrtimer for sigtimedwait() timers: Remove the deprecated mod_timer_pinned() API timers, net/ipv4/inet: Initialize connection request timers as pinned timers, drivers/tty/mips_ejtag: Initialize the poll timer as pinned timers, drivers/tty/metag_da: Initialize the poll timer as pinned ...
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‎Documentation/devicetree/bindings/timer/oxsemi,rps-timer.txt

Lines changed: 17 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,17 @@
1+
Oxford Semiconductor OXNAS SoCs Family RPS Timer
2+
================================================
3+
4+
Required properties:
5+
- compatible: Should be "oxsemi,ox810se-rps-timer"
6+
- reg : Specifies base physical address and size of the registers.
7+
- interrupts : The interrupts of the two timers
8+
- clocks : The phandle of the timer clock source
9+
10+
example:
11+
12+
timer0: timer@200 {
13+
compatible = "oxsemi,ox810se-rps-timer";
14+
reg = <0x200 0x40>;
15+
clocks = <&rpsclk>;
16+
interrupts = <4 5>;
17+
};

‎Documentation/devicetree/bindings/timer/rockchip,rk3288-timer.txt renamed to ‎Documentation/devicetree/bindings/timer/rockchip,rk-timer.txt

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,9 @@
1-
Rockchip rk3288 timer
1+
Rockchip rk timer
22

33
Required properties:
4-
- compatible: shall be "rockchip,rk3288-timer"
4+
- compatible: shall be one of:
5+
"rockchip,rk3288-timer" - for rk3066, rk3036, rk3188, rk322x, rk3288, rk3368
6+
"rockchip,rk3399-timer" - for rk3399
57
- reg: base address of the timer register starting with TIMERS CONTROL register
68
- interrupts: should contain the interrupts for Timer0
79
- clocks : must contain an entry for each entry in clock-names

‎Documentation/kernel-parameters.txt

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -687,6 +687,14 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
687687
[SPARC64] tick
688688
[X86-64] hpet,tsc
689689

690+
clocksource.arm_arch_timer.evtstrm=
691+
[ARM,ARM64]
692+
Format: <bool>
693+
Enable/disable the eventstream feature of the ARM
694+
architected timer so that code using WFE-based polling
695+
loops can be debugged more effectively on production
696+
systems.
697+
690698
clearcpuid=BITNUM [X86]
691699
Disable CPUID feature X for the kernel. See
692700
arch/x86/include/asm/cpufeatures.h for the valid bit

‎arch/arc/kernel/time.c

Lines changed: 39 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -116,19 +116,19 @@ static struct clocksource arc_counter_gfrc = {
116116
.flags = CLOCK_SOURCE_IS_CONTINUOUS,
117117
};
118118

119-
static void __init arc_cs_setup_gfrc(struct device_node *node)
119+
static int __init arc_cs_setup_gfrc(struct device_node *node)
120120
{
121121
int exists = cpuinfo_arc700[0].extn.gfrc;
122122
int ret;
123123

124124
if (WARN(!exists, "Global-64-bit-Ctr clocksource not detected"))
125-
return;
125+
return -ENXIO;
126126

127127
ret = arc_get_timer_clk(node);
128128
if (ret)
129-
return;
129+
return ret;
130130

131-
clocksource_register_hz(&arc_counter_gfrc, arc_timer_freq);
131+
return clocksource_register_hz(&arc_counter_gfrc, arc_timer_freq);
132132
}
133133
CLOCKSOURCE_OF_DECLARE(arc_gfrc, "snps,archs-timer-gfrc", arc_cs_setup_gfrc);
134134

@@ -172,25 +172,25 @@ static struct clocksource arc_counter_rtc = {
172172
.flags = CLOCK_SOURCE_IS_CONTINUOUS,
173173
};
174174

175-
static void __init arc_cs_setup_rtc(struct device_node *node)
175+
static int __init arc_cs_setup_rtc(struct device_node *node)
176176
{
177177
int exists = cpuinfo_arc700[smp_processor_id()].extn.rtc;
178178
int ret;
179179

180180
if (WARN(!exists, "Local-64-bit-Ctr clocksource not detected"))
181-
return;
181+
return -ENXIO;
182182

183183
/* Local to CPU hence not usable in SMP */
184184
if (WARN(IS_ENABLED(CONFIG_SMP), "Local-64-bit-Ctr not usable in SMP"))
185-
return;
185+
return -EINVAL;
186186

187187
ret = arc_get_timer_clk(node);
188188
if (ret)
189-
return;
189+
return ret;
190190

191191
write_aux_reg(AUX_RTC_CTRL, 1);
192192

193-
clocksource_register_hz(&arc_counter_rtc, arc_timer_freq);
193+
return clocksource_register_hz(&arc_counter_rtc, arc_timer_freq);
194194
}
195195
CLOCKSOURCE_OF_DECLARE(arc_rtc, "snps,archs-timer-rtc", arc_cs_setup_rtc);
196196

@@ -213,23 +213,23 @@ static struct clocksource arc_counter_timer1 = {
213213
.flags = CLOCK_SOURCE_IS_CONTINUOUS,
214214
};
215215

216-
static void __init arc_cs_setup_timer1(struct device_node *node)
216+
static int __init arc_cs_setup_timer1(struct device_node *node)
217217
{
218218
int ret;
219219

220220
/* Local to CPU hence not usable in SMP */
221221
if (IS_ENABLED(CONFIG_SMP))
222-
return;
222+
return -EINVAL;
223223

224224
ret = arc_get_timer_clk(node);
225225
if (ret)
226-
return;
226+
return ret;
227227

228228
write_aux_reg(ARC_REG_TIMER1_LIMIT, ARC_TIMER_MAX);
229229
write_aux_reg(ARC_REG_TIMER1_CNT, 0);
230230
write_aux_reg(ARC_REG_TIMER1_CTRL, TIMER_CTRL_NH);
231231

232-
clocksource_register_hz(&arc_counter_timer1, arc_timer_freq);
232+
return clocksource_register_hz(&arc_counter_timer1, arc_timer_freq);
233233
}
234234

235235
/********** Clock Event Device *********/
@@ -324,20 +324,28 @@ static struct notifier_block arc_timer_cpu_nb = {
324324
/*
325325
* clockevent setup for boot CPU
326326
*/
327-
static void __init arc_clockevent_setup(struct device_node *node)
327+
static int __init arc_clockevent_setup(struct device_node *node)
328328
{
329329
struct clock_event_device *evt = this_cpu_ptr(&arc_clockevent_device);
330330
int ret;
331331

332-
register_cpu_notifier(&arc_timer_cpu_nb);
332+
ret = register_cpu_notifier(&arc_timer_cpu_nb);
333+
if (ret) {
334+
pr_err("Failed to register cpu notifier");
335+
return ret;
336+
}
333337

334338
arc_timer_irq = irq_of_parse_and_map(node, 0);
335-
if (arc_timer_irq <= 0)
336-
panic("clockevent: missing irq");
339+
if (arc_timer_irq <= 0) {
340+
pr_err("clockevent: missing irq");
341+
return -EINVAL;
342+
}
337343

338344
ret = arc_get_timer_clk(node);
339-
if (ret)
340-
panic("clockevent: missing clk");
345+
if (ret) {
346+
pr_err("clockevent: missing clk");
347+
return ret;
348+
}
341349

342350
evt->irq = arc_timer_irq;
343351
evt->cpumask = cpumask_of(smp_processor_id());
@@ -347,22 +355,29 @@ static void __init arc_clockevent_setup(struct device_node *node)
347355
/* Needs apriori irq_set_percpu_devid() done in intc map function */
348356
ret = request_percpu_irq(arc_timer_irq, timer_irq_handler,
349357
"Timer0 (per-cpu-tick)", evt);
350-
if (ret)
351-
panic("clockevent: unable to request irq\n");
358+
if (ret) {
359+
pr_err("clockevent: unable to request irq\n");
360+
return ret;
361+
}
352362

353363
enable_percpu_irq(arc_timer_irq, 0);
364+
365+
return 0;
354366
}
355367

356-
static void __init arc_of_timer_init(struct device_node *np)
368+
static int __init arc_of_timer_init(struct device_node *np)
357369
{
358370
static int init_count = 0;
371+
int ret;
359372

360373
if (!init_count) {
361374
init_count = 1;
362-
arc_clockevent_setup(np);
375+
ret = arc_clockevent_setup(np);
363376
} else {
364-
arc_cs_setup_timer1(np);
377+
ret = arc_cs_setup_timer1(np);
365378
}
379+
380+
return ret;
366381
}
367382
CLOCKSOURCE_OF_DECLARE(arc_clkevt, "snps,arc-timer", arc_of_timer_init);
368383

‎arch/arm/Kconfig

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -358,10 +358,10 @@ config ARCH_CLPS711X
358358
bool "Cirrus Logic CLPS711x/EP721x/EP731x-based"
359359
select ARCH_REQUIRE_GPIOLIB
360360
select AUTO_ZRELADDR
361-
select CLKSRC_MMIO
362361
select COMMON_CLK
363362
select CPU_ARM720T
364363
select GENERIC_CLOCKEVENTS
364+
select CLPS711X_TIMER
365365
select MFD_SYSCON
366366
select SOC_BUS
367367
help

‎arch/arm/kernel/smp_twd.c

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -390,7 +390,7 @@ int __init twd_local_timer_register(struct twd_local_timer *tlt)
390390
}
391391

392392
#ifdef CONFIG_OF
393-
static void __init twd_local_timer_of_register(struct device_node *np)
393+
static int __init twd_local_timer_of_register(struct device_node *np)
394394
{
395395
int err;
396396

@@ -410,6 +410,7 @@ static void __init twd_local_timer_of_register(struct device_node *np)
410410

411411
out:
412412
WARN(err, "twd_local_timer_of_register failed (%d)\n", err);
413+
return err;
413414
}
414415
CLOCKSOURCE_OF_DECLARE(arm_twd_a9, "arm,cortex-a9-twd-timer", twd_local_timer_of_register);
415416
CLOCKSOURCE_OF_DECLARE(arm_twd_a5, "arm,cortex-a5-twd-timer", twd_local_timer_of_register);

‎arch/arm/mach-bcm/Kconfig

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -89,6 +89,7 @@ config ARCH_BCM_MOBILE
8989
select HAVE_ARM_ARCH_TIMER
9090
select PINCTRL
9191
select ARCH_BCM_MOBILE_SMP if SMP
92+
select BCM_KONA_TIMER
9293
help
9394
This enables support for systems based on Broadcom mobile SoCs.
9495

@@ -143,6 +144,7 @@ config ARCH_BCM2835
143144
select ARM_TIMER_SP804
144145
select HAVE_ARM_ARCH_TIMER if ARCH_MULTI_V7
145146
select CLKSRC_OF
147+
select BCM2835_TIMER
146148
select PINCTRL
147149
select PINCTRL_BCM2835
148150
help

‎arch/arm/mach-integrator/Kconfig

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -20,7 +20,7 @@ if ARCH_INTEGRATOR
2020

2121
config ARCH_INTEGRATOR_AP
2222
bool "Support Integrator/AP and Integrator/PP2 platforms"
23-
select CLKSRC_MMIO
23+
select INTEGRATOR_AP_TIMER
2424
select MIGHT_HAVE_PCI
2525
select SERIAL_AMBA_PL010 if TTY
2626
select SERIAL_AMBA_PL010_CONSOLE if TTY

‎arch/arm/mach-keystone/Kconfig

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4,7 +4,7 @@ config ARCH_KEYSTONE
44
depends on ARM_PATCH_PHYS_VIRT
55
select ARM_GIC
66
select HAVE_ARM_ARCH_TIMER
7-
select CLKSRC_MMIO
7+
select KEYSTONE_TIMER
88
select ARM_ERRATA_798181 if SMP
99
select COMMON_CLK_KEYSTONE
1010
select ARCH_SUPPORTS_BIG_ENDIAN

‎arch/arm/mach-moxart/Kconfig

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3,7 +3,7 @@ menuconfig ARCH_MOXART
33
depends on ARCH_MULTI_V4
44
select CPU_FA526
55
select ARM_DMA_MEM_BUFFERABLE
6-
select CLKSRC_MMIO
6+
select MOXART_TIMER
77
select GENERIC_IRQ_CHIP
88
select ARCH_REQUIRE_GPIOLIB
99
select PHYLIB if NETDEVICES

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