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Merge tag 'mtd/fixes-for-5.0-rc6' of git://git.infradead.org/linux-mtd
Pull mtd fixes from Boris Brezillon: - Fix a problem with the imx28 ECC engine - Remove a debug trace introduced in 2b6f009 ("mtd: Check add_mtd_device() ret code") - Make sure partitions of size 0 can be registered - Fix kernel-doc warning in the rawnand core - Fix the error path of spinand_init() (missing manufacturer cleanup in a few places) - Address a problem with the SPI NAND PROGRAM LOAD operation which does not work as expected on some parts. * tag 'mtd/fixes-for-5.0-rc6' of git://git.infradead.org/linux-mtd: mtd: rawnand: gpmi: fix MX28 bus master lockup problem mtd: Make sure mtd->erasesize is valid even if the partition is of size 0 mtd: Remove a debug trace in mtdpart.c mtd: rawnand: fix kernel-doc warnings mtd: spinand: Fix the error/cleanup path in spinand_init() mtd: spinand: Handle the case where PROGRAM LOAD does not reset the cache
2 parents 3e5e692 + d5d27fd commit 5610789

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5 files changed

+34
-33
lines changed

5 files changed

+34
-33
lines changed

drivers/mtd/mtdpart.c

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -480,6 +480,10 @@ static struct mtd_part *allocate_partition(struct mtd_info *parent,
480480
/* let's register it anyway to preserve ordering */
481481
slave->offset = 0;
482482
slave->mtd.size = 0;
483+
484+
/* Initialize ->erasesize to make add_mtd_device() happy. */
485+
slave->mtd.erasesize = parent->erasesize;
486+
483487
printk(KERN_ERR"mtd: partition \"%s\" is out of reach -- disabled\n",
484488
part->name);
485489
goto out_register;
@@ -632,7 +636,6 @@ int mtd_add_partition(struct mtd_info *parent, const char *name,
632636
mutex_unlock(&mtd_partitions_mutex);
633637

634638
free_partition(new);
635-
pr_info("%s:%i\n", __func__, __LINE__);
636639

637640
return ret;
638641
}

drivers/mtd/nand/raw/gpmi-nand/gpmi-lib.c

Lines changed: 6 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -155,9 +155,10 @@ int gpmi_init(struct gpmi_nand_data *this)
155155

156156
/*
157157
* Reset BCH here, too. We got failures otherwise :(
158-
* See later BCH reset for explanation of MX23 handling
158+
* See later BCH reset for explanation of MX23 and MX28 handling
159159
*/
160-
ret = gpmi_reset_block(r->bch_regs, GPMI_IS_MX23(this));
160+
ret = gpmi_reset_block(r->bch_regs,
161+
GPMI_IS_MX23(this) || GPMI_IS_MX28(this));
161162
if (ret)
162163
goto err_out;
163164

@@ -263,12 +264,10 @@ int bch_set_geometry(struct gpmi_nand_data *this)
263264
/*
264265
* Due to erratum #2847 of the MX23, the BCH cannot be soft reset on this
265266
* chip, otherwise it will lock up. So we skip resetting BCH on the MX23.
266-
* On the other hand, the MX28 needs the reset, because one case has been
267-
* seen where the BCH produced ECC errors constantly after 10000
268-
* consecutive reboots. The latter case has not been seen on the MX23
269-
* yet, still we don't know if it could happen there as well.
267+
* and MX28.
270268
*/
271-
ret = gpmi_reset_block(r->bch_regs, GPMI_IS_MX23(this));
269+
ret = gpmi_reset_block(r->bch_regs,
270+
GPMI_IS_MX23(this) || GPMI_IS_MX28(this));
272271
if (ret)
273272
goto err_out;
274273

drivers/mtd/nand/raw/nand_base.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -410,6 +410,7 @@ static int nand_check_wp(struct nand_chip *chip)
410410

411411
/**
412412
* nand_fill_oob - [INTERN] Transfer client buffer to oob
413+
* @chip: NAND chip object
413414
* @oob: oob data buffer
414415
* @len: oob data write length
415416
* @ops: oob ops structure

drivers/mtd/nand/raw/nand_bbt.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -158,7 +158,7 @@ static u32 add_marker_len(struct nand_bbt_descr *td)
158158

159159
/**
160160
* read_bbt - [GENERIC] Read the bad block table starting from page
161-
* @chip: NAND chip object
161+
* @this: NAND chip object
162162
* @buf: temporary buffer
163163
* @page: the starting page
164164
* @num: the number of bbt descriptors to read

drivers/mtd/nand/spi/core.c

Lines changed: 22 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -304,24 +304,30 @@ static int spinand_write_to_cache_op(struct spinand_device *spinand,
304304
struct nand_device *nand = spinand_to_nand(spinand);
305305
struct mtd_info *mtd = nanddev_to_mtd(nand);
306306
struct nand_page_io_req adjreq = *req;
307-
unsigned int nbytes = 0;
308-
void *buf = NULL;
307+
void *buf = spinand->databuf;
308+
unsigned int nbytes;
309309
u16 column = 0;
310310
int ret;
311311

312-
memset(spinand->databuf, 0xff,
313-
nanddev_page_size(nand) +
314-
nanddev_per_page_oobsize(nand));
312+
/*
313+
* Looks like PROGRAM LOAD (AKA write cache) does not necessarily reset
314+
* the cache content to 0xFF (depends on vendor implementation), so we
315+
* must fill the page cache entirely even if we only want to program
316+
* the data portion of the page, otherwise we might corrupt the BBM or
317+
* user data previously programmed in OOB area.
318+
*/
319+
nbytes = nanddev_page_size(nand) + nanddev_per_page_oobsize(nand);
320+
memset(spinand->databuf, 0xff, nbytes);
321+
adjreq.dataoffs = 0;
322+
adjreq.datalen = nanddev_page_size(nand);
323+
adjreq.databuf.out = spinand->databuf;
324+
adjreq.ooblen = nanddev_per_page_oobsize(nand);
325+
adjreq.ooboffs = 0;
326+
adjreq.oobbuf.out = spinand->oobbuf;
315327

316-
if (req->datalen) {
328+
if (req->datalen)
317329
memcpy(spinand->databuf + req->dataoffs, req->databuf.out,
318330
req->datalen);
319-
adjreq.dataoffs = 0;
320-
adjreq.datalen = nanddev_page_size(nand);
321-
adjreq.databuf.out = spinand->databuf;
322-
nbytes = adjreq.datalen;
323-
buf = spinand->databuf;
324-
}
325331

326332
if (req->ooblen) {
327333
if (req->mode == MTD_OPS_AUTO_OOB)
@@ -332,14 +338,6 @@ static int spinand_write_to_cache_op(struct spinand_device *spinand,
332338
else
333339
memcpy(spinand->oobbuf + req->ooboffs, req->oobbuf.out,
334340
req->ooblen);
335-
336-
adjreq.ooblen = nanddev_per_page_oobsize(nand);
337-
adjreq.ooboffs = 0;
338-
nbytes += nanddev_per_page_oobsize(nand);
339-
if (!buf) {
340-
buf = spinand->oobbuf;
341-
column = nanddev_page_size(nand);
342-
}
343341
}
344342

345343
spinand_cache_op_adjust_colum(spinand, &adjreq, &column);
@@ -370,8 +368,8 @@ static int spinand_write_to_cache_op(struct spinand_device *spinand,
370368

371369
/*
372370
* We need to use the RANDOM LOAD CACHE operation if there's
373-
* more than one iteration, because the LOAD operation resets
374-
* the cache to 0xff.
371+
* more than one iteration, because the LOAD operation might
372+
* reset the cache to 0xff.
375373
*/
376374
if (nbytes) {
377375
column = op.addr.val;
@@ -1018,11 +1016,11 @@ static int spinand_init(struct spinand_device *spinand)
10181016
for (i = 0; i < nand->memorg.ntargets; i++) {
10191017
ret = spinand_select_target(spinand, i);
10201018
if (ret)
1021-
goto err_free_bufs;
1019+
goto err_manuf_cleanup;
10221020

10231021
ret = spinand_lock_block(spinand, BL_ALL_UNLOCKED);
10241022
if (ret)
1025-
goto err_free_bufs;
1023+
goto err_manuf_cleanup;
10261024
}
10271025

10281026
ret = nanddev_init(nand, &spinand_ops, THIS_MODULE);

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