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Merge git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6
Merge crypto tree to pick up chelsio bug fix.
2 parents ce4e458 + ba439a6 commit 58c8a86

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9 files changed

+72
-51
lines changed

9 files changed

+72
-51
lines changed

drivers/crypto/chelsio/chcr_algo.c

Lines changed: 22 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -367,7 +367,8 @@ static inline void dsgl_walk_init(struct dsgl_walk *walk,
367367
walk->to = (struct phys_sge_pairs *)(dsgl + 1);
368368
}
369369

370-
static inline void dsgl_walk_end(struct dsgl_walk *walk, unsigned short qid)
370+
static inline void dsgl_walk_end(struct dsgl_walk *walk, unsigned short qid,
371+
int pci_chan_id)
371372
{
372373
struct cpl_rx_phys_dsgl *phys_cpl;
373374

@@ -385,6 +386,7 @@ static inline void dsgl_walk_end(struct dsgl_walk *walk, unsigned short qid)
385386
phys_cpl->rss_hdr_int.opcode = CPL_RX_PHYS_ADDR;
386387
phys_cpl->rss_hdr_int.qid = htons(qid);
387388
phys_cpl->rss_hdr_int.hash_val = 0;
389+
phys_cpl->rss_hdr_int.channel = pci_chan_id;
388390
}
389391

390392
static inline void dsgl_walk_add_page(struct dsgl_walk *walk,
@@ -718,7 +720,7 @@ static inline void create_wreq(struct chcr_context *ctx,
718720
FILL_WR_RX_Q_ID(ctx->dev->rx_channel_id, qid,
719721
!!lcb, ctx->tx_qidx);
720722

721-
chcr_req->ulptx.cmd_dest = FILL_ULPTX_CMD_DEST(ctx->dev->tx_channel_id,
723+
chcr_req->ulptx.cmd_dest = FILL_ULPTX_CMD_DEST(ctx->tx_chan_id,
722724
qid);
723725
chcr_req->ulptx.len = htonl((DIV_ROUND_UP(len16, 16) -
724726
((sizeof(chcr_req->wreq)) >> 4)));
@@ -1340,16 +1342,23 @@ static int chcr_device_init(struct chcr_context *ctx)
13401342
adap->vres.ncrypto_fc);
13411343
rxq_perchan = u_ctx->lldi.nrxq / u_ctx->lldi.nchan;
13421344
txq_perchan = ntxq / u_ctx->lldi.nchan;
1343-
rxq_idx = ctx->dev->tx_channel_id * rxq_perchan;
1344-
rxq_idx += id % rxq_perchan;
1345-
txq_idx = ctx->dev->tx_channel_id * txq_perchan;
1346-
txq_idx += id % txq_perchan;
13471345
spin_lock(&ctx->dev->lock_chcr_dev);
1348-
ctx->rx_qidx = rxq_idx;
1349-
ctx->tx_qidx = txq_idx;
1346+
ctx->tx_chan_id = ctx->dev->tx_channel_id;
13501347
ctx->dev->tx_channel_id = !ctx->dev->tx_channel_id;
13511348
ctx->dev->rx_channel_id = 0;
13521349
spin_unlock(&ctx->dev->lock_chcr_dev);
1350+
rxq_idx = ctx->tx_chan_id * rxq_perchan;
1351+
rxq_idx += id % rxq_perchan;
1352+
txq_idx = ctx->tx_chan_id * txq_perchan;
1353+
txq_idx += id % txq_perchan;
1354+
ctx->rx_qidx = rxq_idx;
1355+
ctx->tx_qidx = txq_idx;
1356+
/* Channel Id used by SGE to forward packet to Host.
1357+
* Same value should be used in cpl_fw6_pld RSS_CH field
1358+
* by FW. Driver programs PCI channel ID to be used in fw
1359+
* at the time of queue allocation with value "pi->tx_chan"
1360+
*/
1361+
ctx->pci_chan_id = txq_idx / txq_perchan;
13531362
}
13541363
out:
13551364
return err;
@@ -2504,6 +2513,7 @@ void chcr_add_aead_dst_ent(struct aead_request *req,
25042513
struct crypto_aead *tfm = crypto_aead_reqtfm(req);
25052514
struct dsgl_walk dsgl_walk;
25062515
unsigned int authsize = crypto_aead_authsize(tfm);
2516+
struct chcr_context *ctx = a_ctx(tfm);
25072517
u32 temp;
25082518

25092519
dsgl_walk_init(&dsgl_walk, phys_cpl);
@@ -2513,7 +2523,7 @@ void chcr_add_aead_dst_ent(struct aead_request *req,
25132523
dsgl_walk_add_page(&dsgl_walk, IV, &reqctx->iv_dma);
25142524
temp = req->cryptlen + (reqctx->op ? -authsize : authsize);
25152525
dsgl_walk_add_sg(&dsgl_walk, req->dst, temp, req->assoclen);
2516-
dsgl_walk_end(&dsgl_walk, qid);
2526+
dsgl_walk_end(&dsgl_walk, qid, ctx->pci_chan_id);
25172527
}
25182528

25192529
void chcr_add_cipher_src_ent(struct ablkcipher_request *req,
@@ -2545,6 +2555,8 @@ void chcr_add_cipher_dst_ent(struct ablkcipher_request *req,
25452555
unsigned short qid)
25462556
{
25472557
struct chcr_blkcipher_req_ctx *reqctx = ablkcipher_request_ctx(req);
2558+
struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(wrparam->req);
2559+
struct chcr_context *ctx = c_ctx(tfm);
25482560
struct dsgl_walk dsgl_walk;
25492561

25502562
dsgl_walk_init(&dsgl_walk, phys_cpl);
@@ -2553,7 +2565,7 @@ void chcr_add_cipher_dst_ent(struct ablkcipher_request *req,
25532565
reqctx->dstsg = dsgl_walk.last_sg;
25542566
reqctx->dst_ofst = dsgl_walk.last_sg_len;
25552567

2556-
dsgl_walk_end(&dsgl_walk, qid);
2568+
dsgl_walk_end(&dsgl_walk, qid, ctx->pci_chan_id);
25572569
}
25582570

25592571
void chcr_add_hash_src_ent(struct ahash_request *req,

drivers/crypto/chelsio/chcr_crypto.h

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -255,6 +255,8 @@ struct chcr_context {
255255
struct chcr_dev *dev;
256256
unsigned char tx_qidx;
257257
unsigned char rx_qidx;
258+
unsigned char tx_chan_id;
259+
unsigned char pci_chan_id;
258260
struct __crypto_ctx crypto_ctx[0];
259261
};
260262

drivers/crypto/mxs-dcp.c

Lines changed: 30 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -79,7 +79,7 @@ struct dcp {
7979
struct dcp_coherent_block *coh;
8080

8181
struct completion completion[DCP_MAX_CHANS];
82-
struct mutex mutex[DCP_MAX_CHANS];
82+
spinlock_t lock[DCP_MAX_CHANS];
8383
struct task_struct *thread[DCP_MAX_CHANS];
8484
struct crypto_queue queue[DCP_MAX_CHANS];
8585
};
@@ -399,25 +399,29 @@ static int dcp_chan_thread_aes(void *data)
399399

400400
int ret;
401401

402-
do {
403-
__set_current_state(TASK_INTERRUPTIBLE);
402+
while (!kthread_should_stop()) {
403+
set_current_state(TASK_INTERRUPTIBLE);
404404

405-
mutex_lock(&sdcp->mutex[chan]);
405+
spin_lock(&sdcp->lock[chan]);
406406
backlog = crypto_get_backlog(&sdcp->queue[chan]);
407407
arq = crypto_dequeue_request(&sdcp->queue[chan]);
408-
mutex_unlock(&sdcp->mutex[chan]);
408+
spin_unlock(&sdcp->lock[chan]);
409+
410+
if (!backlog && !arq) {
411+
schedule();
412+
continue;
413+
}
414+
415+
set_current_state(TASK_RUNNING);
409416

410417
if (backlog)
411418
backlog->complete(backlog, -EINPROGRESS);
412419

413420
if (arq) {
414421
ret = mxs_dcp_aes_block_crypt(arq);
415422
arq->complete(arq, ret);
416-
continue;
417423
}
418-
419-
schedule();
420-
} while (!kthread_should_stop());
424+
}
421425

422426
return 0;
423427
}
@@ -459,9 +463,9 @@ static int mxs_dcp_aes_enqueue(struct ablkcipher_request *req, int enc, int ecb)
459463
rctx->ecb = ecb;
460464
actx->chan = DCP_CHAN_CRYPTO;
461465

462-
mutex_lock(&sdcp->mutex[actx->chan]);
466+
spin_lock(&sdcp->lock[actx->chan]);
463467
ret = crypto_enqueue_request(&sdcp->queue[actx->chan], &req->base);
464-
mutex_unlock(&sdcp->mutex[actx->chan]);
468+
spin_unlock(&sdcp->lock[actx->chan]);
465469

466470
wake_up_process(sdcp->thread[actx->chan]);
467471

@@ -700,13 +704,20 @@ static int dcp_chan_thread_sha(void *data)
700704
struct ahash_request *req;
701705
int ret, fini;
702706

703-
do {
704-
__set_current_state(TASK_INTERRUPTIBLE);
707+
while (!kthread_should_stop()) {
708+
set_current_state(TASK_INTERRUPTIBLE);
705709

706-
mutex_lock(&sdcp->mutex[chan]);
710+
spin_lock(&sdcp->lock[chan]);
707711
backlog = crypto_get_backlog(&sdcp->queue[chan]);
708712
arq = crypto_dequeue_request(&sdcp->queue[chan]);
709-
mutex_unlock(&sdcp->mutex[chan]);
713+
spin_unlock(&sdcp->lock[chan]);
714+
715+
if (!backlog && !arq) {
716+
schedule();
717+
continue;
718+
}
719+
720+
set_current_state(TASK_RUNNING);
710721

711722
if (backlog)
712723
backlog->complete(backlog, -EINPROGRESS);
@@ -718,12 +729,8 @@ static int dcp_chan_thread_sha(void *data)
718729
ret = dcp_sha_req_to_buf(arq);
719730
fini = rctx->fini;
720731
arq->complete(arq, ret);
721-
if (!fini)
722-
continue;
723732
}
724-
725-
schedule();
726-
} while (!kthread_should_stop());
733+
}
727734

728735
return 0;
729736
}
@@ -781,9 +788,9 @@ static int dcp_sha_update_fx(struct ahash_request *req, int fini)
781788
rctx->init = 1;
782789
}
783790

784-
mutex_lock(&sdcp->mutex[actx->chan]);
791+
spin_lock(&sdcp->lock[actx->chan]);
785792
ret = crypto_enqueue_request(&sdcp->queue[actx->chan], &req->base);
786-
mutex_unlock(&sdcp->mutex[actx->chan]);
793+
spin_unlock(&sdcp->lock[actx->chan]);
787794

788795
wake_up_process(sdcp->thread[actx->chan]);
789796
mutex_unlock(&actx->mutex);
@@ -1077,7 +1084,7 @@ static int mxs_dcp_probe(struct platform_device *pdev)
10771084
platform_set_drvdata(pdev, sdcp);
10781085

10791086
for (i = 0; i < DCP_MAX_CHANS; i++) {
1080-
mutex_init(&sdcp->mutex[i]);
1087+
spin_lock_init(&sdcp->lock[i]);
10811088
init_completion(&sdcp->completion[i]);
10821089
crypto_init_queue(&sdcp->queue[i], 50);
10831090
}

drivers/crypto/qat/qat_c3xxx/adf_drv.c

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -123,7 +123,8 @@ static int adf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
123123
struct adf_hw_device_data *hw_data;
124124
char name[ADF_DEVICE_NAME_LENGTH];
125125
unsigned int i, bar_nr;
126-
int ret, bar_mask;
126+
unsigned long bar_mask;
127+
int ret;
127128

128129
switch (ent->device) {
129130
case ADF_C3XXX_PCI_DEVICE_ID:
@@ -235,8 +236,7 @@ static int adf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
235236
/* Find and map all the device's BARS */
236237
i = 0;
237238
bar_mask = pci_select_bars(pdev, IORESOURCE_MEM);
238-
for_each_set_bit(bar_nr, (const unsigned long *)&bar_mask,
239-
ADF_PCI_MAX_BARS * 2) {
239+
for_each_set_bit(bar_nr, &bar_mask, ADF_PCI_MAX_BARS * 2) {
240240
struct adf_bar *bar = &accel_pci_dev->pci_bars[i++];
241241

242242
bar->base_addr = pci_resource_start(pdev, bar_nr);

drivers/crypto/qat/qat_c3xxxvf/adf_drv.c

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -125,7 +125,8 @@ static int adf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
125125
struct adf_hw_device_data *hw_data;
126126
char name[ADF_DEVICE_NAME_LENGTH];
127127
unsigned int i, bar_nr;
128-
int ret, bar_mask;
128+
unsigned long bar_mask;
129+
int ret;
129130

130131
switch (ent->device) {
131132
case ADF_C3XXXIOV_PCI_DEVICE_ID:
@@ -215,8 +216,7 @@ static int adf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
215216
/* Find and map all the device's BARS */
216217
i = 0;
217218
bar_mask = pci_select_bars(pdev, IORESOURCE_MEM);
218-
for_each_set_bit(bar_nr, (const unsigned long *)&bar_mask,
219-
ADF_PCI_MAX_BARS * 2) {
219+
for_each_set_bit(bar_nr, &bar_mask, ADF_PCI_MAX_BARS * 2) {
220220
struct adf_bar *bar = &accel_pci_dev->pci_bars[i++];
221221

222222
bar->base_addr = pci_resource_start(pdev, bar_nr);

drivers/crypto/qat/qat_c62x/adf_drv.c

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -123,7 +123,8 @@ static int adf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
123123
struct adf_hw_device_data *hw_data;
124124
char name[ADF_DEVICE_NAME_LENGTH];
125125
unsigned int i, bar_nr;
126-
int ret, bar_mask;
126+
unsigned long bar_mask;
127+
int ret;
127128

128129
switch (ent->device) {
129130
case ADF_C62X_PCI_DEVICE_ID:
@@ -235,8 +236,7 @@ static int adf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
235236
/* Find and map all the device's BARS */
236237
i = (hw_data->fuses & ADF_DEVICE_FUSECTL_MASK) ? 1 : 0;
237238
bar_mask = pci_select_bars(pdev, IORESOURCE_MEM);
238-
for_each_set_bit(bar_nr, (const unsigned long *)&bar_mask,
239-
ADF_PCI_MAX_BARS * 2) {
239+
for_each_set_bit(bar_nr, &bar_mask, ADF_PCI_MAX_BARS * 2) {
240240
struct adf_bar *bar = &accel_pci_dev->pci_bars[i++];
241241

242242
bar->base_addr = pci_resource_start(pdev, bar_nr);

drivers/crypto/qat/qat_c62xvf/adf_drv.c

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -125,7 +125,8 @@ static int adf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
125125
struct adf_hw_device_data *hw_data;
126126
char name[ADF_DEVICE_NAME_LENGTH];
127127
unsigned int i, bar_nr;
128-
int ret, bar_mask;
128+
unsigned long bar_mask;
129+
int ret;
129130

130131
switch (ent->device) {
131132
case ADF_C62XIOV_PCI_DEVICE_ID:
@@ -215,8 +216,7 @@ static int adf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
215216
/* Find and map all the device's BARS */
216217
i = 0;
217218
bar_mask = pci_select_bars(pdev, IORESOURCE_MEM);
218-
for_each_set_bit(bar_nr, (const unsigned long *)&bar_mask,
219-
ADF_PCI_MAX_BARS * 2) {
219+
for_each_set_bit(bar_nr, &bar_mask, ADF_PCI_MAX_BARS * 2) {
220220
struct adf_bar *bar = &accel_pci_dev->pci_bars[i++];
221221

222222
bar->base_addr = pci_resource_start(pdev, bar_nr);

drivers/crypto/qat/qat_dh895xcc/adf_drv.c

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -123,7 +123,8 @@ static int adf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
123123
struct adf_hw_device_data *hw_data;
124124
char name[ADF_DEVICE_NAME_LENGTH];
125125
unsigned int i, bar_nr;
126-
int ret, bar_mask;
126+
unsigned long bar_mask;
127+
int ret;
127128

128129
switch (ent->device) {
129130
case ADF_DH895XCC_PCI_DEVICE_ID:
@@ -237,8 +238,7 @@ static int adf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
237238
/* Find and map all the device's BARS */
238239
i = 0;
239240
bar_mask = pci_select_bars(pdev, IORESOURCE_MEM);
240-
for_each_set_bit(bar_nr, (const unsigned long *)&bar_mask,
241-
ADF_PCI_MAX_BARS * 2) {
241+
for_each_set_bit(bar_nr, &bar_mask, ADF_PCI_MAX_BARS * 2) {
242242
struct adf_bar *bar = &accel_pci_dev->pci_bars[i++];
243243

244244
bar->base_addr = pci_resource_start(pdev, bar_nr);

drivers/crypto/qat/qat_dh895xccvf/adf_drv.c

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -125,7 +125,8 @@ static int adf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
125125
struct adf_hw_device_data *hw_data;
126126
char name[ADF_DEVICE_NAME_LENGTH];
127127
unsigned int i, bar_nr;
128-
int ret, bar_mask;
128+
unsigned long bar_mask;
129+
int ret;
129130

130131
switch (ent->device) {
131132
case ADF_DH895XCCIOV_PCI_DEVICE_ID:
@@ -215,8 +216,7 @@ static int adf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
215216
/* Find and map all the device's BARS */
216217
i = 0;
217218
bar_mask = pci_select_bars(pdev, IORESOURCE_MEM);
218-
for_each_set_bit(bar_nr, (const unsigned long *)&bar_mask,
219-
ADF_PCI_MAX_BARS * 2) {
219+
for_each_set_bit(bar_nr, &bar_mask, ADF_PCI_MAX_BARS * 2) {
220220
struct adf_bar *bar = &accel_pci_dev->pci_bars[i++];
221221

222222
bar->base_addr = pci_resource_start(pdev, bar_nr);

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