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Laurent Pincharthorms
Laurent Pinchart
authored and
horms
committed
arm64: dts: renesas: Convert to new LVDS DT bindings
The internal LVDS encoder now has DT bindings separate from the DU. Port the r8a7795 and r8a7796 device trees over to the new model. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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8 files changed

+66
-24
lines changed

8 files changed

+66
-24
lines changed

‎arch/arm64/boot/dts/renesas/r8a7795-es1-salvator-x.dts

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -40,12 +40,11 @@
4040
<&cpg CPG_MOD 723>,
4141
<&cpg CPG_MOD 722>,
4242
<&cpg CPG_MOD 721>,
43-
<&cpg CPG_MOD 727>,
4443
<&versaclock5 1>,
4544
<&x21_clk>,
4645
<&x22_clk>,
4746
<&versaclock5 2>;
48-
clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0",
47+
clock-names = "du.0", "du.1", "du.2", "du.3",
4948
"dclkin.0", "dclkin.1", "dclkin.2", "dclkin.3";
5049
};
5150

‎arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -41,11 +41,10 @@
4141
<&cpg CPG_MOD 723>,
4242
<&cpg CPG_MOD 722>,
4343
<&cpg CPG_MOD 721>,
44-
<&cpg CPG_MOD 727>,
4544
<&versaclock5 1>,
4645
<&versaclock5 3>,
4746
<&versaclock5 4>,
4847
<&versaclock5 2>;
49-
clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0",
48+
clock-names = "du.0", "du.1", "du.2", "du.3",
5049
"dclkin.0", "dclkin.1", "dclkin.2", "dclkin.3";
5150
};

‎arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -40,12 +40,11 @@
4040
<&cpg CPG_MOD 723>,
4141
<&cpg CPG_MOD 722>,
4242
<&cpg CPG_MOD 721>,
43-
<&cpg CPG_MOD 727>,
4443
<&versaclock5 1>,
4544
<&x21_clk>,
4645
<&x22_clk>,
4746
<&versaclock5 2>;
48-
clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0",
47+
clock-names = "du.0", "du.1", "du.2", "du.3",
4948
"dclkin.0", "dclkin.1", "dclkin.2", "dclkin.3";
5049
};
5150

‎arch/arm64/boot/dts/renesas/r8a7795-salvator-xs.dts

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -40,12 +40,11 @@
4040
<&cpg CPG_MOD 723>,
4141
<&cpg CPG_MOD 722>,
4242
<&cpg CPG_MOD 721>,
43-
<&cpg CPG_MOD 727>,
4443
<&versaclock6 1>,
4544
<&x21_clk>,
4645
<&x22_clk>,
4746
<&versaclock6 2>;
48-
clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0",
47+
clock-names = "du.0", "du.1", "du.2", "du.3",
4948
"dclkin.0", "dclkin.1", "dclkin.2", "dclkin.3";
5049
};
5150

‎arch/arm64/boot/dts/renesas/r8a7795.dtsi

Lines changed: 30 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -2782,19 +2782,16 @@
27822782

27832783
du: display@feb00000 {
27842784
compatible = "renesas,du-r8a7795";
2785-
reg = <0 0xfeb00000 0 0x80000>,
2786-
<0 0xfeb90000 0 0x14>;
2787-
reg-names = "du", "lvds.0";
2785+
reg = <0 0xfeb00000 0 0x80000>;
27882786
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
27892787
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
27902788
<GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
27912789
<GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
27922790
clocks = <&cpg CPG_MOD 724>,
27932791
<&cpg CPG_MOD 723>,
27942792
<&cpg CPG_MOD 722>,
2795-
<&cpg CPG_MOD 721>,
2796-
<&cpg CPG_MOD 727>;
2797-
clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0";
2793+
<&cpg CPG_MOD 721>;
2794+
clock-names = "du.0", "du.1", "du.2", "du.3";
27982795
vsps = <&vspd0 0 &vspd1 0 &vspd2 0 &vspd0 1>;
27992796
status = "disabled";
28002797

@@ -2822,6 +2819,33 @@
28222819
port@3 {
28232820
reg = <3>;
28242821
du_out_lvds0: endpoint {
2822+
remote-endpoint = <&lvds0_in>;
2823+
};
2824+
};
2825+
};
2826+
};
2827+
2828+
lvds0: lvds@feb90000 {
2829+
compatible = "renesas,r8a7795-lvds";
2830+
reg = <0 0xfeb90000 0 0x14>;
2831+
clocks = <&cpg CPG_MOD 727>;
2832+
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2833+
resets = <&cpg 727>;
2834+
status = "disabled";
2835+
2836+
ports {
2837+
#address-cells = <1>;
2838+
#size-cells = <0>;
2839+
2840+
port@0 {
2841+
reg = <0>;
2842+
lvds0_in: endpoint {
2843+
remote-endpoint = <&du_out_lvds0>;
2844+
};
2845+
};
2846+
port@1 {
2847+
reg = <1>;
2848+
lvds0_out: endpoint {
28252849
};
28262850
};
28272851
};

‎arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -30,10 +30,9 @@
3030
clocks = <&cpg CPG_MOD 724>,
3131
<&cpg CPG_MOD 723>,
3232
<&cpg CPG_MOD 722>,
33-
<&cpg CPG_MOD 727>,
3433
<&versaclock5 1>,
3534
<&versaclock5 3>,
3635
<&versaclock5 2>;
37-
clock-names = "du.0", "du.1", "du.2", "lvds.0",
36+
clock-names = "du.0", "du.1", "du.2",
3837
"dclkin.0", "dclkin.1", "dclkin.2";
3938
};

‎arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -29,11 +29,10 @@
2929
clocks = <&cpg CPG_MOD 724>,
3030
<&cpg CPG_MOD 723>,
3131
<&cpg CPG_MOD 722>,
32-
<&cpg CPG_MOD 727>,
3332
<&versaclock5 1>,
3433
<&x21_clk>,
3534
<&versaclock5 2>;
36-
clock-names = "du.0", "du.1", "du.2", "lvds.0",
35+
clock-names = "du.0", "du.1", "du.2",
3736
"dclkin.0", "dclkin.1", "dclkin.2";
3837
};
3938

‎arch/arm64/boot/dts/renesas/r8a7796.dtsi

Lines changed: 30 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -2437,17 +2437,14 @@
24372437

24382438
du: display@feb00000 {
24392439
compatible = "renesas,du-r8a7796";
2440-
reg = <0 0xfeb00000 0 0x70000>,
2441-
<0 0xfeb90000 0 0x14>;
2442-
reg-names = "du", "lvds.0";
2440+
reg = <0 0xfeb00000 0 0x70000>;
24432441
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
24442442
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
24452443
<GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
24462444
clocks = <&cpg CPG_MOD 724>,
24472445
<&cpg CPG_MOD 723>,
2448-
<&cpg CPG_MOD 722>,
2449-
<&cpg CPG_MOD 727>;
2450-
clock-names = "du.0", "du.1", "du.2", "lvds.0";
2446+
<&cpg CPG_MOD 722>;
2447+
clock-names = "du.0", "du.1", "du.2";
24512448
status = "disabled";
24522449

24532450
vsps = <&vspd0 &vspd1 &vspd2>;
@@ -2470,6 +2467,33 @@
24702467
port@2 {
24712468
reg = <2>;
24722469
du_out_lvds0: endpoint {
2470+
remote-endpoint = <&lvds0_in>;
2471+
};
2472+
};
2473+
};
2474+
};
2475+
2476+
lvds0: lvds@feb90000 {
2477+
compatible = "renesas,r8a7796-lvds";
2478+
reg = <0 0xfeb90000 0 0x14>;
2479+
clocks = <&cpg CPG_MOD 727>;
2480+
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2481+
resets = <&cpg 727>;
2482+
status = "disabled";
2483+
2484+
ports {
2485+
#address-cells = <1>;
2486+
#size-cells = <0>;
2487+
2488+
port@0 {
2489+
reg = <0>;
2490+
lvds0_in: endpoint {
2491+
remote-endpoint = <&du_out_lvds0>;
2492+
};
2493+
};
2494+
port@1 {
2495+
reg = <1>;
2496+
lvds0_out: endpoint {
24732497
};
24742498
};
24752499
};

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