Skip to content

Commit 5a6f8ae

Browse files
Achiad Shochatdavem330
Achiad Shochat
authored and
davem330
committed
net/mlx5e: Cosmetics: use BIT() instead of "1 <<", and others
No logical change in this commit. Signed-off-by: Achiad Shochat <achiad@mellanox.com> Signed-off-by: Amir Vadai <amirv@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
1 parent 88a85f9 commit 5a6f8ae

File tree

3 files changed

+104
-98
lines changed

3 files changed

+104
-98
lines changed

‎drivers/net/ethernet/mellanox/mlx5/core/en.h

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -330,14 +330,14 @@ struct mlx5e_channel {
330330
};
331331

332332
enum mlx5e_traffic_types {
333-
MLX5E_TT_IPV4_TCP = 0,
334-
MLX5E_TT_IPV6_TCP = 1,
335-
MLX5E_TT_IPV4_UDP = 2,
336-
MLX5E_TT_IPV6_UDP = 3,
337-
MLX5E_TT_IPV4 = 4,
338-
MLX5E_TT_IPV6 = 5,
339-
MLX5E_TT_ANY = 6,
340-
MLX5E_NUM_TT = 7,
333+
MLX5E_TT_IPV4_TCP,
334+
MLX5E_TT_IPV6_TCP,
335+
MLX5E_TT_IPV4_UDP,
336+
MLX5E_TT_IPV6_UDP,
337+
MLX5E_TT_IPV4,
338+
MLX5E_TT_IPV6,
339+
MLX5E_TT_ANY,
340+
MLX5E_NUM_TT,
341341
};
342342

343343
enum {

‎drivers/net/ethernet/mellanox/mlx5/core/en_flow_table.c

Lines changed: 86 additions & 80 deletions
Original file line numberDiff line numberDiff line change
@@ -105,25 +105,25 @@ static void mlx5e_del_eth_addr_from_flow_table(struct mlx5e_priv *priv,
105105
{
106106
void *ft = priv->ft.main;
107107

108-
if (ai->tt_vec & (1 << MLX5E_TT_IPV6_TCP))
108+
if (ai->tt_vec & BIT(MLX5E_TT_IPV6_TCP))
109109
mlx5_del_flow_table_entry(ft, ai->ft_ix[MLX5E_TT_IPV6_TCP]);
110110

111-
if (ai->tt_vec & (1 << MLX5E_TT_IPV4_TCP))
111+
if (ai->tt_vec & BIT(MLX5E_TT_IPV4_TCP))
112112
mlx5_del_flow_table_entry(ft, ai->ft_ix[MLX5E_TT_IPV4_TCP]);
113113

114-
if (ai->tt_vec & (1 << MLX5E_TT_IPV6_UDP))
114+
if (ai->tt_vec & BIT(MLX5E_TT_IPV6_UDP))
115115
mlx5_del_flow_table_entry(ft, ai->ft_ix[MLX5E_TT_IPV6_UDP]);
116116

117-
if (ai->tt_vec & (1 << MLX5E_TT_IPV4_UDP))
117+
if (ai->tt_vec & BIT(MLX5E_TT_IPV4_UDP))
118118
mlx5_del_flow_table_entry(ft, ai->ft_ix[MLX5E_TT_IPV4_UDP]);
119119

120-
if (ai->tt_vec & (1 << MLX5E_TT_IPV6))
120+
if (ai->tt_vec & BIT(MLX5E_TT_IPV6))
121121
mlx5_del_flow_table_entry(ft, ai->ft_ix[MLX5E_TT_IPV6]);
122122

123-
if (ai->tt_vec & (1 << MLX5E_TT_IPV4))
123+
if (ai->tt_vec & BIT(MLX5E_TT_IPV4))
124124
mlx5_del_flow_table_entry(ft, ai->ft_ix[MLX5E_TT_IPV4]);
125125

126-
if (ai->tt_vec & (1 << MLX5E_TT_ANY))
126+
if (ai->tt_vec & BIT(MLX5E_TT_ANY))
127127
mlx5_del_flow_table_entry(ft, ai->ft_ix[MLX5E_TT_ANY]);
128128
}
129129

@@ -156,33 +156,33 @@ static u32 mlx5e_get_tt_vec(struct mlx5e_eth_addr_info *ai, int type)
156156
switch (eth_addr_type) {
157157
case MLX5E_UC:
158158
ret =
159-
(1 << MLX5E_TT_IPV4_TCP) |
160-
(1 << MLX5E_TT_IPV6_TCP) |
161-
(1 << MLX5E_TT_IPV4_UDP) |
162-
(1 << MLX5E_TT_IPV6_UDP) |
163-
(1 << MLX5E_TT_IPV4) |
164-
(1 << MLX5E_TT_IPV6) |
165-
(1 << MLX5E_TT_ANY) |
159+
BIT(MLX5E_TT_IPV4_TCP) |
160+
BIT(MLX5E_TT_IPV6_TCP) |
161+
BIT(MLX5E_TT_IPV4_UDP) |
162+
BIT(MLX5E_TT_IPV6_UDP) |
163+
BIT(MLX5E_TT_IPV4) |
164+
BIT(MLX5E_TT_IPV6) |
165+
BIT(MLX5E_TT_ANY) |
166166
0;
167167
break;
168168

169169
case MLX5E_MC_IPV4:
170170
ret =
171-
(1 << MLX5E_TT_IPV4_UDP) |
172-
(1 << MLX5E_TT_IPV4) |
171+
BIT(MLX5E_TT_IPV4_UDP) |
172+
BIT(MLX5E_TT_IPV4) |
173173
0;
174174
break;
175175

176176
case MLX5E_MC_IPV6:
177177
ret =
178-
(1 << MLX5E_TT_IPV6_UDP) |
179-
(1 << MLX5E_TT_IPV6) |
178+
BIT(MLX5E_TT_IPV6_UDP) |
179+
BIT(MLX5E_TT_IPV6) |
180180
0;
181181
break;
182182

183183
case MLX5E_MC_OTHER:
184184
ret =
185-
(1 << MLX5E_TT_ANY) |
185+
BIT(MLX5E_TT_ANY) |
186186
0;
187187
break;
188188
}
@@ -191,23 +191,23 @@ static u32 mlx5e_get_tt_vec(struct mlx5e_eth_addr_info *ai, int type)
191191

192192
case MLX5E_ALLMULTI:
193193
ret =
194-
(1 << MLX5E_TT_IPV4_UDP) |
195-
(1 << MLX5E_TT_IPV6_UDP) |
196-
(1 << MLX5E_TT_IPV4) |
197-
(1 << MLX5E_TT_IPV6) |
198-
(1 << MLX5E_TT_ANY) |
194+
BIT(MLX5E_TT_IPV4_UDP) |
195+
BIT(MLX5E_TT_IPV6_UDP) |
196+
BIT(MLX5E_TT_IPV4) |
197+
BIT(MLX5E_TT_IPV6) |
198+
BIT(MLX5E_TT_ANY) |
199199
0;
200200
break;
201201

202202
default: /* MLX5E_PROMISC */
203203
ret =
204-
(1 << MLX5E_TT_IPV4_TCP) |
205-
(1 << MLX5E_TT_IPV6_TCP) |
206-
(1 << MLX5E_TT_IPV4_UDP) |
207-
(1 << MLX5E_TT_IPV6_UDP) |
208-
(1 << MLX5E_TT_IPV4) |
209-
(1 << MLX5E_TT_IPV6) |
210-
(1 << MLX5E_TT_ANY) |
204+
BIT(MLX5E_TT_IPV4_TCP) |
205+
BIT(MLX5E_TT_IPV6_TCP) |
206+
BIT(MLX5E_TT_IPV4_UDP) |
207+
BIT(MLX5E_TT_IPV6_UDP) |
208+
BIT(MLX5E_TT_IPV4) |
209+
BIT(MLX5E_TT_IPV6) |
210+
BIT(MLX5E_TT_ANY) |
211211
0;
212212
break;
213213
}
@@ -226,6 +226,7 @@ static int __mlx5e_add_eth_addr_rule(struct mlx5e_priv *priv,
226226
u8 *match_criteria_dmac;
227227
void *ft = priv->ft.main;
228228
u32 *tirn = priv->tirn;
229+
u32 *ft_ix;
229230
u32 tt_vec;
230231
int err;
231232

@@ -261,122 +262,127 @@ static int __mlx5e_add_eth_addr_rule(struct mlx5e_priv *priv,
261262

262263
tt_vec = mlx5e_get_tt_vec(ai, type);
263264

264-
if (tt_vec & (1 << MLX5E_TT_ANY)) {
265+
ft_ix = &ai->ft_ix[MLX5E_TT_ANY];
266+
if (tt_vec & BIT(MLX5E_TT_ANY)) {
265267
MLX5_SET(dest_format_struct, dest, destination_id,
266268
tirn[MLX5E_TT_ANY]);
267269
err = mlx5_add_flow_table_entry(ft, match_criteria_enable,
268270
match_criteria, flow_context,
269-
&ai->ft_ix[MLX5E_TT_ANY]);
270-
if (err) {
271-
mlx5e_del_eth_addr_from_flow_table(priv, ai);
272-
return err;
273-
}
274-
ai->tt_vec |= (1 << MLX5E_TT_ANY);
271+
ft_ix);
272+
if (err)
273+
goto err_del_ai;
274+
275+
ai->tt_vec |= BIT(MLX5E_TT_ANY);
275276
}
276277

277278
match_criteria_enable = MLX5_MATCH_OUTER_HEADERS;
278279
MLX5_SET_TO_ONES(fte_match_param, match_criteria,
279280
outer_headers.ethertype);
280281

281-
if (tt_vec & (1 << MLX5E_TT_IPV4)) {
282+
ft_ix = &ai->ft_ix[MLX5E_TT_IPV4];
283+
if (tt_vec & BIT(MLX5E_TT_IPV4)) {
282284
MLX5_SET(fte_match_param, match_value, outer_headers.ethertype,
283285
ETH_P_IP);
284286
MLX5_SET(dest_format_struct, dest, destination_id,
285287
tirn[MLX5E_TT_IPV4]);
286288
err = mlx5_add_flow_table_entry(ft, match_criteria_enable,
287289
match_criteria, flow_context,
288-
&ai->ft_ix[MLX5E_TT_IPV4]);
289-
if (err) {
290-
mlx5e_del_eth_addr_from_flow_table(priv, ai);
291-
return err;
292-
}
293-
ai->tt_vec |= (1 << MLX5E_TT_IPV4);
290+
ft_ix);
291+
if (err)
292+
goto err_del_ai;
293+
294+
ai->tt_vec |= BIT(MLX5E_TT_IPV4);
294295
}
295296

296-
if (tt_vec & (1 << MLX5E_TT_IPV6)) {
297+
ft_ix = &ai->ft_ix[MLX5E_TT_IPV6];
298+
if (tt_vec & BIT(MLX5E_TT_IPV6)) {
297299
MLX5_SET(fte_match_param, match_value, outer_headers.ethertype,
298300
ETH_P_IPV6);
299301
MLX5_SET(dest_format_struct, dest, destination_id,
300302
tirn[MLX5E_TT_IPV6]);
301303
err = mlx5_add_flow_table_entry(ft, match_criteria_enable,
302304
match_criteria, flow_context,
303-
&ai->ft_ix[MLX5E_TT_IPV6]);
304-
if (err) {
305-
mlx5e_del_eth_addr_from_flow_table(priv, ai);
306-
return err;
307-
}
308-
ai->tt_vec |= (1 << MLX5E_TT_IPV6);
305+
ft_ix);
306+
if (err)
307+
goto err_del_ai;
308+
309+
ai->tt_vec |= BIT(MLX5E_TT_IPV6);
309310
}
310311

311312
MLX5_SET_TO_ONES(fte_match_param, match_criteria,
312313
outer_headers.ip_protocol);
313314
MLX5_SET(fte_match_param, match_value, outer_headers.ip_protocol,
314315
IPPROTO_UDP);
315316

316-
if (tt_vec & (1 << MLX5E_TT_IPV4_UDP)) {
317+
ft_ix = &ai->ft_ix[MLX5E_TT_IPV4_UDP];
318+
if (tt_vec & BIT(MLX5E_TT_IPV4_UDP)) {
317319
MLX5_SET(fte_match_param, match_value, outer_headers.ethertype,
318320
ETH_P_IP);
319321
MLX5_SET(dest_format_struct, dest, destination_id,
320322
tirn[MLX5E_TT_IPV4_UDP]);
321323
err = mlx5_add_flow_table_entry(ft, match_criteria_enable,
322324
match_criteria, flow_context,
323-
&ai->ft_ix[MLX5E_TT_IPV4_UDP]);
324-
if (err) {
325-
mlx5e_del_eth_addr_from_flow_table(priv, ai);
326-
return err;
327-
}
328-
ai->tt_vec |= (1 << MLX5E_TT_IPV4_UDP);
325+
ft_ix);
326+
if (err)
327+
goto err_del_ai;
328+
329+
ai->tt_vec |= BIT(MLX5E_TT_IPV4_UDP);
329330
}
330331

331-
if (tt_vec & (1 << MLX5E_TT_IPV6_UDP)) {
332+
ft_ix = &ai->ft_ix[MLX5E_TT_IPV6_UDP];
333+
if (tt_vec & BIT(MLX5E_TT_IPV6_UDP)) {
332334
MLX5_SET(fte_match_param, match_value, outer_headers.ethertype,
333335
ETH_P_IPV6);
334336
MLX5_SET(dest_format_struct, dest, destination_id,
335337
tirn[MLX5E_TT_IPV6_UDP]);
336338
err = mlx5_add_flow_table_entry(ft, match_criteria_enable,
337339
match_criteria, flow_context,
338-
&ai->ft_ix[MLX5E_TT_IPV6_UDP]);
339-
if (err) {
340-
mlx5e_del_eth_addr_from_flow_table(priv, ai);
341-
return err;
342-
}
343-
ai->tt_vec |= (1 << MLX5E_TT_IPV6_UDP);
340+
ft_ix);
341+
if (err)
342+
goto err_del_ai;
343+
344+
ai->tt_vec |= BIT(MLX5E_TT_IPV6_UDP);
344345
}
345346

346347
MLX5_SET(fte_match_param, match_value, outer_headers.ip_protocol,
347348
IPPROTO_TCP);
348349

349-
if (tt_vec & (1 << MLX5E_TT_IPV4_TCP)) {
350+
ft_ix = &ai->ft_ix[MLX5E_TT_IPV4_TCP];
351+
if (tt_vec & BIT(MLX5E_TT_IPV4_TCP)) {
350352
MLX5_SET(fte_match_param, match_value, outer_headers.ethertype,
351353
ETH_P_IP);
352354
MLX5_SET(dest_format_struct, dest, destination_id,
353355
tirn[MLX5E_TT_IPV4_TCP]);
354356
err = mlx5_add_flow_table_entry(ft, match_criteria_enable,
355357
match_criteria, flow_context,
356-
&ai->ft_ix[MLX5E_TT_IPV4_TCP]);
357-
if (err) {
358-
mlx5e_del_eth_addr_from_flow_table(priv, ai);
359-
return err;
360-
}
361-
ai->tt_vec |= (1 << MLX5E_TT_IPV4_TCP);
358+
ft_ix);
359+
if (err)
360+
goto err_del_ai;
361+
362+
ai->tt_vec |= BIT(MLX5E_TT_IPV4_TCP);
362363
}
363364

364-
if (tt_vec & (1 << MLX5E_TT_IPV6_TCP)) {
365+
ft_ix = &ai->ft_ix[MLX5E_TT_IPV6_TCP];
366+
if (tt_vec & BIT(MLX5E_TT_IPV6_TCP)) {
365367
MLX5_SET(fte_match_param, match_value, outer_headers.ethertype,
366368
ETH_P_IPV6);
367369
MLX5_SET(dest_format_struct, dest, destination_id,
368370
tirn[MLX5E_TT_IPV6_TCP]);
369371
err = mlx5_add_flow_table_entry(ft, match_criteria_enable,
370372
match_criteria, flow_context,
371-
&ai->ft_ix[MLX5E_TT_IPV6_TCP]);
372-
if (err) {
373-
mlx5e_del_eth_addr_from_flow_table(priv, ai);
374-
return err;
375-
}
376-
ai->tt_vec |= (1 << MLX5E_TT_IPV6_TCP);
373+
ft_ix);
374+
if (err)
375+
goto err_del_ai;
376+
377+
ai->tt_vec |= BIT(MLX5E_TT_IPV6_TCP);
377378
}
378379

379380
return 0;
381+
382+
err_del_ai:
383+
mlx5e_del_eth_addr_from_flow_table(priv, ai);
384+
385+
return err;
380386
}
381387

382388
static int mlx5e_add_eth_addr_rule(struct mlx5e_priv *priv,

‎drivers/net/ethernet/mellanox/mlx5/core/en_main.c

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -1252,13 +1252,13 @@ static void mlx5e_build_tir_ctx(struct mlx5e_priv *priv, u32 *tirc, int tt)
12521252

12531253
#define ROUGH_MAX_L2_L3_HDR_SZ 256
12541254

1255-
#define MLX5_HASH_IP (MLX5_HASH_FIELD_SEL_SRC_IP |\
1256-
MLX5_HASH_FIELD_SEL_DST_IP)
1255+
#define MLX5_HASH_IP (MLX5_HASH_FIELD_SEL_SRC_IP |\
1256+
MLX5_HASH_FIELD_SEL_DST_IP)
12571257

1258-
#define MLX5_HASH_ALL (MLX5_HASH_FIELD_SEL_SRC_IP |\
1259-
MLX5_HASH_FIELD_SEL_DST_IP |\
1260-
MLX5_HASH_FIELD_SEL_L4_SPORT |\
1261-
MLX5_HASH_FIELD_SEL_L4_DPORT)
1258+
#define MLX5_HASH_IP_L4PORTS (MLX5_HASH_FIELD_SEL_SRC_IP |\
1259+
MLX5_HASH_FIELD_SEL_DST_IP |\
1260+
MLX5_HASH_FIELD_SEL_L4_SPORT |\
1261+
MLX5_HASH_FIELD_SEL_L4_DPORT)
12621262

12631263
if (priv->params.lro_en) {
12641264
MLX5_SET(tirc, tirc, lro_enable_mask,
@@ -1305,7 +1305,7 @@ static void mlx5e_build_tir_ctx(struct mlx5e_priv *priv, u32 *tirc, int tt)
13051305
MLX5_SET(rx_hash_field_select, hfso, l4_prot_type,
13061306
MLX5_L4_PROT_TYPE_TCP);
13071307
MLX5_SET(rx_hash_field_select, hfso, selected_fields,
1308-
MLX5_HASH_ALL);
1308+
MLX5_HASH_IP_L4PORTS);
13091309
break;
13101310

13111311
case MLX5E_TT_IPV6_TCP:
@@ -1314,7 +1314,7 @@ static void mlx5e_build_tir_ctx(struct mlx5e_priv *priv, u32 *tirc, int tt)
13141314
MLX5_SET(rx_hash_field_select, hfso, l4_prot_type,
13151315
MLX5_L4_PROT_TYPE_TCP);
13161316
MLX5_SET(rx_hash_field_select, hfso, selected_fields,
1317-
MLX5_HASH_ALL);
1317+
MLX5_HASH_IP_L4PORTS);
13181318
break;
13191319

13201320
case MLX5E_TT_IPV4_UDP:
@@ -1323,7 +1323,7 @@ static void mlx5e_build_tir_ctx(struct mlx5e_priv *priv, u32 *tirc, int tt)
13231323
MLX5_SET(rx_hash_field_select, hfso, l4_prot_type,
13241324
MLX5_L4_PROT_TYPE_UDP);
13251325
MLX5_SET(rx_hash_field_select, hfso, selected_fields,
1326-
MLX5_HASH_ALL);
1326+
MLX5_HASH_IP_L4PORTS);
13271327
break;
13281328

13291329
case MLX5E_TT_IPV6_UDP:
@@ -1332,7 +1332,7 @@ static void mlx5e_build_tir_ctx(struct mlx5e_priv *priv, u32 *tirc, int tt)
13321332
MLX5_SET(rx_hash_field_select, hfso, l4_prot_type,
13331333
MLX5_L4_PROT_TYPE_UDP);
13341334
MLX5_SET(rx_hash_field_select, hfso, selected_fields,
1335-
MLX5_HASH_ALL);
1335+
MLX5_HASH_IP_L4PORTS);
13361336
break;
13371337

13381338
case MLX5E_TT_IPV4:

0 commit comments

Comments
 (0)