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torvaldstorvalds
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Merge tag 'drm-fixes-for-v4.15-rc2' of git://people.freedesktop.org/~airlied/linux
Pull drm fixes and cleanups from Dave Airlie: "The main thing are a bunch of fixes for the new amd display code, a bunch of smatch fixes. core: - Atomic helper regression fix. - Deferred fbdev fallout regression fix. amdgpu: - New display code (dc) dpms, suspend/resume and smatch fixes, along with some others - Some regression fixes for amdkfd/radeon. - Fix a ttm regression for swiotlb disabled bridge: - A bunch of fixes for the tc358767 bridge mali-dp + hdlcd: - some fixes and internal API catchups. imx-drm: -regression fix in atomic code. omapdrm: - platform detection regression fixes" * tag 'drm-fixes-for-v4.15-rc2' of git://people.freedesktop.org/~airlied/linux: (76 commits) drm/imx: always call wait_for_flip_done in commit_tail omapdrm: hdmi4_cec: signedness bug in hdmi4_cec_init() drm: omapdrm: Fix DPI on platforms using the DSI VDDS omapdrm: hdmi4: Correct the SoC revision matching drm/omap: displays: panel-dpi: add backlight dependency drm/omap: Fix error handling path in 'omap_dmm_probe()' drm/i915: Disable THP until we have a GPU read BW W/A drm/bridge: tc358767: fix 1-lane behavior drm/bridge: tc358767: fix AUXDATAn registers access drm/bridge: tc358767: fix timing calculations drm/bridge: tc358767: fix DP0_MISC register set drm/bridge: tc358767: filter out too high modes drm/bridge: tc358767: do no fail on hi-res displays drm/bridge: Fix lvds-encoder since the panel_bridge rework. drm/bridge: synopsys/dw-hdmi: Enable cec clock drm/bridge: adv7511/33: Fix adv7511_cec_init() failure handling drm/radeon: remove init of CIK VMIDs 8-16 for amdkfd drm/ttm: fix populate_and_map() functions once more drm/fb_helper: Disable all crtc's when initial setup fails. drm/atomic: make drm_atomic_helper_wait_for_vblanks more agressive ...
2 parents 75f64f6 + 503505b commit 5dc9cbc

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67 files changed

+814
-483
lines changed

‎drivers/gpu/drm/amd/amdgpu/amdgpu.h

Lines changed: 7 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -717,7 +717,7 @@ int amdgpu_queue_mgr_fini(struct amdgpu_device *adev,
717717
struct amdgpu_queue_mgr *mgr);
718718
int amdgpu_queue_mgr_map(struct amdgpu_device *adev,
719719
struct amdgpu_queue_mgr *mgr,
720-
int hw_ip, int instance, int ring,
720+
u32 hw_ip, u32 instance, u32 ring,
721721
struct amdgpu_ring **out_ring);
722722

723723
/*
@@ -1572,18 +1572,14 @@ struct amdgpu_device {
15721572
/* sdma */
15731573
struct amdgpu_sdma sdma;
15741574

1575-
union {
1576-
struct {
1577-
/* uvd */
1578-
struct amdgpu_uvd uvd;
1575+
/* uvd */
1576+
struct amdgpu_uvd uvd;
15791577

1580-
/* vce */
1581-
struct amdgpu_vce vce;
1582-
};
1578+
/* vce */
1579+
struct amdgpu_vce vce;
15831580

1584-
/* vcn */
1585-
struct amdgpu_vcn vcn;
1586-
};
1581+
/* vcn */
1582+
struct amdgpu_vcn vcn;
15871583

15881584
/* firmwares */
15891585
struct amdgpu_firmware firmware;

‎drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c

Lines changed: 34 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -379,29 +379,50 @@ static int kgd_hqd_sdma_load(struct kgd_dev *kgd, void *mqd)
379379
{
380380
struct amdgpu_device *adev = get_amdgpu_device(kgd);
381381
struct cik_sdma_rlc_registers *m;
382+
unsigned long end_jiffies;
382383
uint32_t sdma_base_addr;
384+
uint32_t data;
383385

384386
m = get_sdma_mqd(mqd);
385387
sdma_base_addr = get_sdma_base_addr(m);
386388

387-
WREG32(sdma_base_addr + mmSDMA0_RLC0_VIRTUAL_ADDR,
388-
m->sdma_rlc_virtual_addr);
389+
WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL,
390+
m->sdma_rlc_rb_cntl & (~SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK));
389391

390-
WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_BASE,
391-
m->sdma_rlc_rb_base);
392+
end_jiffies = msecs_to_jiffies(2000) + jiffies;
393+
while (true) {
394+
data = RREG32(sdma_base_addr + mmSDMA0_RLC0_CONTEXT_STATUS);
395+
if (data & SDMA0_RLC0_CONTEXT_STATUS__IDLE_MASK)
396+
break;
397+
if (time_after(jiffies, end_jiffies))
398+
return -ETIME;
399+
usleep_range(500, 1000);
400+
}
401+
if (m->sdma_engine_id) {
402+
data = RREG32(mmSDMA1_GFX_CONTEXT_CNTL);
403+
data = REG_SET_FIELD(data, SDMA1_GFX_CONTEXT_CNTL,
404+
RESUME_CTX, 0);
405+
WREG32(mmSDMA1_GFX_CONTEXT_CNTL, data);
406+
} else {
407+
data = RREG32(mmSDMA0_GFX_CONTEXT_CNTL);
408+
data = REG_SET_FIELD(data, SDMA0_GFX_CONTEXT_CNTL,
409+
RESUME_CTX, 0);
410+
WREG32(mmSDMA0_GFX_CONTEXT_CNTL, data);
411+
}
392412

413+
WREG32(sdma_base_addr + mmSDMA0_RLC0_DOORBELL,
414+
m->sdma_rlc_doorbell);
415+
WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_RPTR, 0);
416+
WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_WPTR, 0);
417+
WREG32(sdma_base_addr + mmSDMA0_RLC0_VIRTUAL_ADDR,
418+
m->sdma_rlc_virtual_addr);
419+
WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_BASE, m->sdma_rlc_rb_base);
393420
WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_BASE_HI,
394421
m->sdma_rlc_rb_base_hi);
395-
396422
WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_RPTR_ADDR_LO,
397423
m->sdma_rlc_rb_rptr_addr_lo);
398-
399424
WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_RPTR_ADDR_HI,
400425
m->sdma_rlc_rb_rptr_addr_hi);
401-
402-
WREG32(sdma_base_addr + mmSDMA0_RLC0_DOORBELL,
403-
m->sdma_rlc_doorbell);
404-
405426
WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL,
406427
m->sdma_rlc_rb_cntl);
407428

@@ -574,9 +595,9 @@ static int kgd_hqd_sdma_destroy(struct kgd_dev *kgd, void *mqd,
574595
}
575596

576597
WREG32(sdma_base_addr + mmSDMA0_RLC0_DOORBELL, 0);
577-
WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_RPTR, 0);
578-
WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_WPTR, 0);
579-
WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_BASE, 0);
598+
WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL,
599+
RREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL) |
600+
SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK);
580601

581602
return 0;
582603
}

‎drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -409,6 +409,10 @@ static bool amdgpu_cs_try_evict(struct amdgpu_cs_parser *p,
409409
if (candidate->robj == validated)
410410
break;
411411

412+
/* We can't move pinned BOs here */
413+
if (bo->pin_count)
414+
continue;
415+
412416
other = amdgpu_mem_type_to_domain(bo->tbo.mem.mem_type);
413417

414418
/* Check if this BO is in one of the domains we need space for */

‎drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1837,9 +1837,6 @@ static int amdgpu_fini(struct amdgpu_device *adev)
18371837
adev->ip_blocks[i].status.hw = false;
18381838
}
18391839

1840-
if (adev->firmware.load_type == AMDGPU_FW_LOAD_SMU)
1841-
amdgpu_ucode_fini_bo(adev);
1842-
18431840
for (i = adev->num_ip_blocks - 1; i >= 0; i--) {
18441841
if (!adev->ip_blocks[i].status.sw)
18451842
continue;

‎drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -536,7 +536,7 @@ static const struct pci_device_id pciidlist[] = {
536536
{0x1002, 0x686c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10},
537537
{0x1002, 0x687f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10},
538538
/* Raven */
539-
{0x1002, 0x15dd, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RAVEN|AMD_IS_APU|AMD_EXP_HW_SUPPORT},
539+
{0x1002, 0x15dd, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RAVEN|AMD_IS_APU},
540540

541541
{0, 0, 0}
542542
};

‎drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -164,6 +164,9 @@ static int amdgpu_pp_hw_fini(void *handle)
164164
ret = adev->powerplay.ip_funcs->hw_fini(
165165
adev->powerplay.pp_handle);
166166

167+
if (adev->firmware.load_type == AMDGPU_FW_LOAD_SMU)
168+
amdgpu_ucode_fini_bo(adev);
169+
167170
return ret;
168171
}
169172

‎drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -442,6 +442,8 @@ static int psp_hw_fini(void *handle)
442442
if (adev->firmware.load_type != AMDGPU_FW_LOAD_PSP)
443443
return 0;
444444

445+
amdgpu_ucode_fini_bo(adev);
446+
445447
psp_ring_destroy(psp, PSP_RING_TYPE__KM);
446448

447449
amdgpu_bo_free_kernel(&psp->tmr_bo, &psp->tmr_mc_addr, &psp->tmr_buf);

‎drivers/gpu/drm/amd/amdgpu/amdgpu_queue_mgr.c

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -63,7 +63,7 @@ static int amdgpu_update_cached_map(struct amdgpu_queue_mapper *mapper,
6363

6464
static int amdgpu_identity_map(struct amdgpu_device *adev,
6565
struct amdgpu_queue_mapper *mapper,
66-
int ring,
66+
u32 ring,
6767
struct amdgpu_ring **out_ring)
6868
{
6969
switch (mapper->hw_ip) {
@@ -121,7 +121,7 @@ static enum amdgpu_ring_type amdgpu_hw_ip_to_ring_type(int hw_ip)
121121

122122
static int amdgpu_lru_map(struct amdgpu_device *adev,
123123
struct amdgpu_queue_mapper *mapper,
124-
int user_ring, bool lru_pipe_order,
124+
u32 user_ring, bool lru_pipe_order,
125125
struct amdgpu_ring **out_ring)
126126
{
127127
int r, i, j;
@@ -208,7 +208,7 @@ int amdgpu_queue_mgr_fini(struct amdgpu_device *adev,
208208
*/
209209
int amdgpu_queue_mgr_map(struct amdgpu_device *adev,
210210
struct amdgpu_queue_mgr *mgr,
211-
int hw_ip, int instance, int ring,
211+
u32 hw_ip, u32 instance, u32 ring,
212212
struct amdgpu_ring **out_ring)
213213
{
214214
int r, ip_num_rings;

‎drivers/gpu/drm/amd/amdgpu/cik.c

Lines changed: 95 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -1023,22 +1023,101 @@ static const struct amdgpu_allowed_register_entry cik_allowed_read_registers[] =
10231023
{mmPA_SC_RASTER_CONFIG_1, true},
10241024
};
10251025

1026-
static uint32_t cik_read_indexed_register(struct amdgpu_device *adev,
1027-
u32 se_num, u32 sh_num,
1028-
u32 reg_offset)
1026+
1027+
static uint32_t cik_get_register_value(struct amdgpu_device *adev,
1028+
bool indexed, u32 se_num,
1029+
u32 sh_num, u32 reg_offset)
10291030
{
1030-
uint32_t val;
1031+
if (indexed) {
1032+
uint32_t val;
1033+
unsigned se_idx = (se_num == 0xffffffff) ? 0 : se_num;
1034+
unsigned sh_idx = (sh_num == 0xffffffff) ? 0 : sh_num;
1035+
1036+
switch (reg_offset) {
1037+
case mmCC_RB_BACKEND_DISABLE:
1038+
return adev->gfx.config.rb_config[se_idx][sh_idx].rb_backend_disable;
1039+
case mmGC_USER_RB_BACKEND_DISABLE:
1040+
return adev->gfx.config.rb_config[se_idx][sh_idx].user_rb_backend_disable;
1041+
case mmPA_SC_RASTER_CONFIG:
1042+
return adev->gfx.config.rb_config[se_idx][sh_idx].raster_config;
1043+
case mmPA_SC_RASTER_CONFIG_1:
1044+
return adev->gfx.config.rb_config[se_idx][sh_idx].raster_config_1;
1045+
}
10311046

1032-
mutex_lock(&adev->grbm_idx_mutex);
1033-
if (se_num != 0xffffffff || sh_num != 0xffffffff)
1034-
amdgpu_gfx_select_se_sh(adev, se_num, sh_num, 0xffffffff);
1047+
mutex_lock(&adev->grbm_idx_mutex);
1048+
if (se_num != 0xffffffff || sh_num != 0xffffffff)
1049+
amdgpu_gfx_select_se_sh(adev, se_num, sh_num, 0xffffffff);
10351050

1036-
val = RREG32(reg_offset);
1051+
val = RREG32(reg_offset);
10371052

1038-
if (se_num != 0xffffffff || sh_num != 0xffffffff)
1039-
amdgpu_gfx_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff);
1040-
mutex_unlock(&adev->grbm_idx_mutex);
1041-
return val;
1053+
if (se_num != 0xffffffff || sh_num != 0xffffffff)
1054+
amdgpu_gfx_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff);
1055+
mutex_unlock(&adev->grbm_idx_mutex);
1056+
return val;
1057+
} else {
1058+
unsigned idx;
1059+
1060+
switch (reg_offset) {
1061+
case mmGB_ADDR_CONFIG:
1062+
return adev->gfx.config.gb_addr_config;
1063+
case mmMC_ARB_RAMCFG:
1064+
return adev->gfx.config.mc_arb_ramcfg;
1065+
case mmGB_TILE_MODE0:
1066+
case mmGB_TILE_MODE1:
1067+
case mmGB_TILE_MODE2:
1068+
case mmGB_TILE_MODE3:
1069+
case mmGB_TILE_MODE4:
1070+
case mmGB_TILE_MODE5:
1071+
case mmGB_TILE_MODE6:
1072+
case mmGB_TILE_MODE7:
1073+
case mmGB_TILE_MODE8:
1074+
case mmGB_TILE_MODE9:
1075+
case mmGB_TILE_MODE10:
1076+
case mmGB_TILE_MODE11:
1077+
case mmGB_TILE_MODE12:
1078+
case mmGB_TILE_MODE13:
1079+
case mmGB_TILE_MODE14:
1080+
case mmGB_TILE_MODE15:
1081+
case mmGB_TILE_MODE16:
1082+
case mmGB_TILE_MODE17:
1083+
case mmGB_TILE_MODE18:
1084+
case mmGB_TILE_MODE19:
1085+
case mmGB_TILE_MODE20:
1086+
case mmGB_TILE_MODE21:
1087+
case mmGB_TILE_MODE22:
1088+
case mmGB_TILE_MODE23:
1089+
case mmGB_TILE_MODE24:
1090+
case mmGB_TILE_MODE25:
1091+
case mmGB_TILE_MODE26:
1092+
case mmGB_TILE_MODE27:
1093+
case mmGB_TILE_MODE28:
1094+
case mmGB_TILE_MODE29:
1095+
case mmGB_TILE_MODE30:
1096+
case mmGB_TILE_MODE31:
1097+
idx = (reg_offset - mmGB_TILE_MODE0);
1098+
return adev->gfx.config.tile_mode_array[idx];
1099+
case mmGB_MACROTILE_MODE0:
1100+
case mmGB_MACROTILE_MODE1:
1101+
case mmGB_MACROTILE_MODE2:
1102+
case mmGB_MACROTILE_MODE3:
1103+
case mmGB_MACROTILE_MODE4:
1104+
case mmGB_MACROTILE_MODE5:
1105+
case mmGB_MACROTILE_MODE6:
1106+
case mmGB_MACROTILE_MODE7:
1107+
case mmGB_MACROTILE_MODE8:
1108+
case mmGB_MACROTILE_MODE9:
1109+
case mmGB_MACROTILE_MODE10:
1110+
case mmGB_MACROTILE_MODE11:
1111+
case mmGB_MACROTILE_MODE12:
1112+
case mmGB_MACROTILE_MODE13:
1113+
case mmGB_MACROTILE_MODE14:
1114+
case mmGB_MACROTILE_MODE15:
1115+
idx = (reg_offset - mmGB_MACROTILE_MODE0);
1116+
return adev->gfx.config.macrotile_mode_array[idx];
1117+
default:
1118+
return RREG32(reg_offset);
1119+
}
1120+
}
10421121
}
10431122

10441123
static int cik_read_register(struct amdgpu_device *adev, u32 se_num,
@@ -1048,13 +1127,13 @@ static int cik_read_register(struct amdgpu_device *adev, u32 se_num,
10481127

10491128
*value = 0;
10501129
for (i = 0; i < ARRAY_SIZE(cik_allowed_read_registers); i++) {
1130+
bool indexed = cik_allowed_read_registers[i].grbm_indexed;
1131+
10511132
if (reg_offset != cik_allowed_read_registers[i].reg_offset)
10521133
continue;
10531134

1054-
*value = cik_allowed_read_registers[i].grbm_indexed ?
1055-
cik_read_indexed_register(adev, se_num,
1056-
sh_num, reg_offset) :
1057-
RREG32(reg_offset);
1135+
*value = cik_get_register_value(adev, indexed, se_num, sh_num,
1136+
reg_offset);
10581137
return 0;
10591138
}
10601139
return -EINVAL;

‎drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

Lines changed: 16 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1819,6 +1819,22 @@ static void gfx_v7_0_setup_rb(struct amdgpu_device *adev)
18191819
adev->gfx.config.backend_enable_mask,
18201820
num_rb_pipes);
18211821
}
1822+
1823+
/* cache the values for userspace */
1824+
for (i = 0; i < adev->gfx.config.max_shader_engines; i++) {
1825+
for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) {
1826+
gfx_v7_0_select_se_sh(adev, i, j, 0xffffffff);
1827+
adev->gfx.config.rb_config[i][j].rb_backend_disable =
1828+
RREG32(mmCC_RB_BACKEND_DISABLE);
1829+
adev->gfx.config.rb_config[i][j].user_rb_backend_disable =
1830+
RREG32(mmGC_USER_RB_BACKEND_DISABLE);
1831+
adev->gfx.config.rb_config[i][j].raster_config =
1832+
RREG32(mmPA_SC_RASTER_CONFIG);
1833+
adev->gfx.config.rb_config[i][j].raster_config_1 =
1834+
RREG32(mmPA_SC_RASTER_CONFIG_1);
1835+
}
1836+
}
1837+
gfx_v7_0_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff);
18221838
mutex_unlock(&adev->grbm_idx_mutex);
18231839
}
18241840

‎drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1175,7 +1175,7 @@ static const struct amdgpu_irq_src_funcs vcn_v1_0_irq_funcs = {
11751175

11761176
static void vcn_v1_0_set_irq_funcs(struct amdgpu_device *adev)
11771177
{
1178-
adev->uvd.irq.num_types = adev->vcn.num_enc_rings + 1;
1178+
adev->vcn.irq.num_types = adev->vcn.num_enc_rings + 1;
11791179
adev->vcn.irq.funcs = &vcn_v1_0_irq_funcs;
11801180
}
11811181

‎drivers/gpu/drm/amd/amdkfd/kfd_module.c

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -24,6 +24,7 @@
2424
#include <linux/sched.h>
2525
#include <linux/moduleparam.h>
2626
#include <linux/device.h>
27+
#include <linux/printk.h>
2728
#include "kfd_priv.h"
2829

2930
#define KFD_DRIVER_AUTHOR "AMD Inc. and others"
@@ -132,7 +133,7 @@ static void __exit kfd_module_exit(void)
132133
kfd_process_destroy_wq();
133134
kfd_topology_shutdown();
134135
kfd_chardev_exit();
135-
dev_info(kfd_device, "Removed module\n");
136+
pr_info("amdkfd: Removed module\n");
136137
}
137138

138139
module_init(kfd_module_init);

‎drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_cik.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -202,8 +202,8 @@ static int update_mqd_sdma(struct mqd_manager *mm, void *mqd,
202202
struct cik_sdma_rlc_registers *m;
203203

204204
m = get_sdma_mqd(mqd);
205-
m->sdma_rlc_rb_cntl = ffs(q->queue_size / sizeof(unsigned int)) <<
206-
SDMA0_RLC0_RB_CNTL__RB_SIZE__SHIFT |
205+
m->sdma_rlc_rb_cntl = (ffs(q->queue_size / sizeof(unsigned int)) - 1)
206+
<< SDMA0_RLC0_RB_CNTL__RB_SIZE__SHIFT |
207207
q->vmid << SDMA0_RLC0_RB_CNTL__RB_VMID__SHIFT |
208208
1 << SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_ENABLE__SHIFT |
209209
6 << SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT;

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