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ASoC: Updates for v5.0/v4.20 As ever there's a lot of small and driver specific changes going on here, but we do also have some relatively large changes in the core thanks to the hard work of Charles and Morimoto-san: - More component transitions from Morimoto-san, I think we're about finished with this. Thanks for all the hard work! - Morimoto-san also added a bunch of for_each_foo macros - A bunch of cleanups and fixes for DAPM from Charles. - MCLK support for several different devices, including CS42L51, STM32 SAI, and MAX98373. - Support for Allwinner A64 CODEC analog, Intel boards with DA7219 and MAX98927, Meson AXG PDM inputs, Nuvoton NAU8822, Renesas R8A7744 and TI PCM3060.
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Documentation/ABI/stable/sysfs-bus-xen-backend

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@@ -73,3 +73,12 @@ KernelVersion: 3.0
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Contact: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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Description:
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Number of sectors written by the frontend.
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What: /sys/bus/xen-backend/devices/*/state
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Date: August 2018
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KernelVersion: 4.19
80+
Contact: Joe Jin <joe.jin@oracle.com>
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Description:
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The state of the device. One of: 'Unknown',
83+
'Initialising', 'Initialised', 'Connected', 'Closing',
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'Closed', 'Reconfiguring', 'Reconfigured'.

Documentation/ABI/stable/sysfs-devices-system-xen_memory

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@@ -75,3 +75,12 @@ Contact: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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Description:
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Amount (in KiB) of low (or normal) memory in the
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balloon.
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What: /sys/devices/system/xen_memory/xen_memory0/scrub_pages
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Date: September 2018
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KernelVersion: 4.20
82+
Contact: xen-devel@lists.xenproject.org
83+
Description:
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Control scrubbing pages before returning them to Xen for others domains
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use. Can be set with xen_scrub_pages cmdline
86+
parameter. Default value controlled with CONFIG_XEN_SCRUB_PAGES_DEFAULT.

Documentation/ABI/testing/sysfs-driver-xen-blkback

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@@ -15,3 +15,13 @@ Description:
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blkback. If the frontend tries to use more than
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max_persistent_grants, the LRU kicks in and starts
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removing 5% of max_persistent_grants every 100ms.
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What: /sys/module/xen_blkback/parameters/persistent_grant_unused_seconds
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Date: August 2018
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KernelVersion: 4.19
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Contact: Roger Pau Monné <roger.pau@citrix.com>
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Description:
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How long a persistent grant is allowed to remain
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allocated without being in use. The time is in
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seconds, 0 means indefinitely long.
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The default is 60 seconds.

Documentation/admin-guide/kernel-parameters.txt

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@@ -3523,6 +3523,12 @@
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ramdisk_size= [RAM] Sizes of RAM disks in kilobytes
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See Documentation/blockdev/ramdisk.txt.
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random.trust_cpu={on,off}
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[KNL] Enable or disable trusting the use of the
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CPU's random number generator (if available) to
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fully seed the kernel's CRNG. Default is controlled
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by CONFIG_RANDOM_TRUST_CPU.
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ras=option[,option,...] [KNL] RAS-specific options
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cec_disable [X86]
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Disables the PV optimizations forcing the HVM guest to
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run as generic HVM guest with no PV drivers.
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xen_scrub_pages= [XEN]
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Boolean option to control scrubbing pages before giving them back
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to Xen, for use by other domains. Can be also changed at runtime
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with /sys/devices/system/xen_memory/xen_memory0/scrub_pages.
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Default value controlled with CONFIG_XEN_SCRUB_PAGES_DEFAULT.
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xirc2ps_cs= [NET,PCMCIA]
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Format:
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<irq>,<irq_mask>,<io>,<full_duplex>,<do_sound>,<lockup_hack>[,<irq2>[,<irq3>[,<irq4>]]]

Documentation/arm64/sve.txt

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@@ -200,7 +200,7 @@ prctl(PR_SVE_SET_VL, unsigned long arg)
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thread.
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* Changing the vector length causes all of P0..P15, FFR and all bits of
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Z0..V31 except for Z0 bits [127:0] .. Z31 bits [127:0] to become
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Z0..Z31 except for Z0 bits [127:0] .. Z31 bits [127:0] to become
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unspecified. Calling PR_SVE_SET_VL with vl equal to the thread's current
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vector length, or calling PR_SVE_SET_VL with the PR_SVE_SET_VL_ONEXEC
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flag, does not constitute a change to the vector length for this purpose.
@@ -500,7 +500,7 @@ References
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[2] arch/arm64/include/uapi/asm/ptrace.h
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AArch64 Linux ptrace ABI definitions
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[3] linux/Documentation/arm64/cpu-feature-registers.txt
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[3] Documentation/arm64/cpu-feature-registers.txt
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[4] ARM IHI0055C
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http://infocenter.arm.com/help/topic/com.arm.doc.ihi0055c/IHI0055C_beta_aapcs64.pdf

Documentation/device-mapper/dm-raid.txt

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@@ -348,3 +348,7 @@ Version History
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1.13.1 Fix deadlock caused by early md_stop_writes(). Also fix size an
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state races.
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1.13.2 Fix raid redundancy validation and avoid keeping raid set frozen
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1.14.0 Fix reshape race on small devices. Fix stripe adding reshape
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deadlock/potential data corruption. Update superblock when
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specific devices are requested via rebuild. Fix RAID leg
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rebuild errors.

Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.txt

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Required properties:
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- compatible :
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- "fsl,imx7ulp-lpi2c" for LPI2C compatible with the one integrated on i.MX7ULP soc
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- "fsl,imx8dv-lpi2c" for LPI2C compatible with the one integrated on i.MX8DV soc
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- reg : address and length of the lpi2c master registers
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- interrupts : lpi2c interrupt
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- clocks : lpi2c clock specifier
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Examples:
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lpi2c7: lpi2c7@40a50000 {
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compatible = "fsl,imx8dv-lpi2c";
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compatible = "fsl,imx7ulp-lpi2c";
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reg = <0x40A50000 0x10000>;
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interrupt-parent = <&intc>;
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interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;

Documentation/devicetree/bindings/input/gpio-keys.txt

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Device-Tree bindings for input/gpio_keys.c keyboard driver
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Device-Tree bindings for input/keyboard/gpio_keys.c keyboard driver
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Required properties:
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- compatible = "gpio-keys";

Documentation/devicetree/bindings/interrupt-controller/riscv,cpu-intc.txt

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@@ -11,7 +11,7 @@ The RISC-V supervisor ISA manual specifies three interrupt sources that are
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attached to every HLIC: software interrupts, the timer interrupt, and external
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interrupts. Software interrupts are used to send IPIs between cores. The
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timer interrupt comes from an architecturally mandated real-time timer that is
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controller via Supervisor Binary Interface (SBI) calls and CSR reads. External
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controlled via Supervisor Binary Interface (SBI) calls and CSR reads. External
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interrupts connect all other device interrupts to the HLIC, which are routed
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via the platform-level interrupt controller (PLIC).
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@@ -25,7 +25,15 @@ in the system.
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Required properties:
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- compatible : "riscv,cpu-intc"
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- #interrupt-cells : should be <1>
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- #interrupt-cells : should be <1>. The interrupt sources are defined by the
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RISC-V supervisor ISA manual, with only the following three interrupts being
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defined for supervisor mode:
31+
- Source 1 is the supervisor software interrupt, which can be sent by an SBI
32+
call and is reserved for use by software.
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- Source 5 is the supervisor timer interrupt, which can be configured by
34+
SBI calls and implements a one-shot timer.
35+
- Source 9 is the supervisor external interrupt, which chains to all other
36+
device interrupts.
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- interrupt-controller : Identifies the node as an interrupt controller
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3139
Furthermore, this interrupt-controller MUST be embedded inside the cpu
@@ -38,7 +46,7 @@ An example device tree entry for a HLIC is show below.
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...
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cpu1-intc: interrupt-controller {
4048
#interrupt-cells = <1>;
41-
compatible = "riscv,cpu-intc", "sifive,fu540-c000-cpu-intc";
49+
compatible = "sifive,fu540-c000-cpu-intc", "riscv,cpu-intc";
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interrupt-controller;
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};
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};

Documentation/devicetree/bindings/net/cpsw.txt

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- slaves : Specifies number for slaves
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- active_slave : Specifies the slave to use for time stamping,
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ethtool and SIOCGMIIPHY
22+
- cpsw-phy-sel : Specifies the phandle to the CPSW phy mode selection
23+
device. See also cpsw-phy-sel.txt for it's binding.
24+
Note that in legacy cases cpsw-phy-sel may be
25+
a child device instead of a phandle.
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2327
Optional properties:
2428
- ti,hwmods : Must be "cpgmac0"
@@ -75,6 +79,7 @@ Examples:
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cpts_clock_mult = <0x80000000>;
7680
cpts_clock_shift = <29>;
7781
syscon = <&cm>;
82+
cpsw-phy-sel = <&phy_sel>;
7883
cpsw_emac0: slave@0 {
7984
phy_id = <&davinci_mdio>, <0>;
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phy-mode = "rgmii-txid";
@@ -103,6 +108,7 @@ Examples:
103108
cpts_clock_mult = <0x80000000>;
104109
cpts_clock_shift = <29>;
105110
syscon = <&cm>;
111+
cpsw-phy-sel = <&phy_sel>;
106112
cpsw_emac0: slave@0 {
107113
phy_id = <&davinci_mdio>, <0>;
108114
phy-mode = "rgmii-txid";

Documentation/devicetree/bindings/net/macb.txt

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Use "cdns,pc302-gem" for Picochip picoXcell pc302 and later devices based on
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the Cadence GEM, or the generic form: "cdns,gem".
1212
Use "atmel,sama5d2-gem" for the GEM IP (10/100) available on Atmel sama5d2 SoCs.
13+
Use "atmel,sama5d3-macb" for the 10/100Mbit IP available on Atmel sama5d3 SoCs.
1314
Use "atmel,sama5d3-gem" for the Gigabit IP available on Atmel sama5d3 SoCs.
1415
Use "atmel,sama5d4-gem" for the GEM IP (10/100) available on Atmel sama5d4 SoCs.
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Use "cdns,zynq-gem" Xilinx Zynq-7xxx SoC.

Documentation/devicetree/bindings/net/sh_eth.txt

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"renesas,ether-r8a7794" if the device is a part of R8A7794 SoC.
1717
"renesas,gether-r8a77980" if the device is a part of R8A77980 SoC.
1818
"renesas,ether-r7s72100" if the device is a part of R7S72100 SoC.
19+
"renesas,ether-r7s9210" if the device is a part of R7S9210 SoC.
1920
"renesas,rcar-gen1-ether" for a generic R-Car Gen1 device.
2021
"renesas,rcar-gen2-ether" for a generic R-Car Gen2 or RZ/G1
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device.
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1+
Analog Devices ADAU1977/ADAU1978/ADAU1979
2+
3+
Datasheets:
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http://www.analog.com/media/en/technical-documentation/data-sheets/ADAU1977.pdf
5+
http://www.analog.com/media/en/technical-documentation/data-sheets/ADAU1978.pdf
6+
http://www.analog.com/media/en/technical-documentation/data-sheets/ADAU1979.pdf
7+
8+
This driver supports both the I2C and SPI bus.
9+
10+
Required properties:
11+
- compatible: Should contain one of the following:
12+
"adi,adau1977"
13+
"adi,adau1978"
14+
"adi,adau1979"
15+
16+
- AVDD-supply: analog power supply for the device, please consult
17+
Documentation/devicetree/bindings/regulator/regulator.txt
18+
19+
Optional properties:
20+
- reset-gpio: the reset pin for the chip, for more details consult
21+
Documentation/devicetree/bindings/gpio/gpio.txt
22+
23+
- DVDD-supply: supply voltage for the digital core, please consult
24+
Documentation/devicetree/bindings/regulator/regulator.txt
25+
26+
For required properties on SPI, please consult
27+
Documentation/devicetree/bindings/spi/spi-bus.txt
28+
29+
Required properties on I2C:
30+
31+
- reg: The i2c address. Value depends on the state of ADDR0
32+
and ADDR1, as wired in hardware.
33+
34+
Examples:
35+
36+
adau1977_spi: adau1977@0 {
37+
compatible = "adi,adau1977";
38+
spi-max-frequency = <600000>;
39+
40+
AVDD-supply = <&regulator>;
41+
DVDD-supply = <&regulator_digital>;
42+
43+
reset_gpio = <&gpio 10 GPIO_ACTIVE_LOW>;
44+
};
45+
46+
adau1977_i2c: adau1977@11 {
47+
compatible = "adi,adau1977";
48+
reg = <0x11>;
49+
50+
AVDD-supply = <&regulator>;
51+
DVDD-supply = <&regulator_digital>;
52+
53+
reset_gpio = <&gpio 10 GPIO_ACTIVE_LOW>;
54+
};
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* Amlogic Audio PDM input
2+
3+
Required properties:
4+
- compatible: 'amlogic,axg-pdm'
5+
- reg: physical base address of the controller and length of memory
6+
mapped region.
7+
- clocks: list of clock phandle, one for each entry clock-names.
8+
- clock-names: should contain the following:
9+
* "pclk" : peripheral clock.
10+
* "dclk" : pdm digital clock
11+
* "sysclk" : dsp system clock
12+
- #sound-dai-cells: must be 0.
13+
14+
Example of PDM on the A113 SoC:
15+
16+
pdm: audio-controller@ff632000 {
17+
compatible = "amlogic,axg-pdm";
18+
reg = <0x0 0xff632000 0x0 0x34>;
19+
#sound-dai-cells = <0>;
20+
clocks = <&clkc_audio AUD_CLKID_PDM>,
21+
<&clkc_audio AUD_CLKID_PDM_DCLK>,
22+
<&clkc_audio AUD_CLKID_PDM_SYSCLK>;
23+
clock-names = "pclk", "dclk", "sysclk";
24+
};
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1+
CS42L51 audio CODEC
2+
3+
Optional properties:
4+
5+
- clocks : a list of phandles + clock-specifiers, one for each entry in
6+
clock-names
7+
8+
- clock-names : must contain "MCLK"
9+
10+
Example:
11+
12+
cs42l51: cs42l51@4a {
13+
compatible = "cirrus,cs42l51";
14+
reg = <0x4a>;
15+
clocks = <&mclk_prov>;
16+
clock-names = "MCLK";
17+
};
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1+
MAX98088 audio CODEC
2+
3+
This device supports I2C only.
4+
5+
Required properties:
6+
7+
- compatible: "maxim,max98088" or "maxim,max98089".
8+
- reg: The I2C address of the device.
9+
10+
Optional properties:
11+
12+
- clocks: the clock provider of MCLK, see ../clock/clock-bindings.txt section
13+
"consumer" for more information.
14+
- clock-names: must be set to "mclk"
15+
16+
Example:
17+
18+
max98089: codec@10 {
19+
compatible = "maxim,max98089";
20+
reg = <0x10>;
21+
clocks = <&clks IMX6QDL_CLK_CKO2>;
22+
clock-names = "mclk";
23+
};
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1+
Mikroe-PROTO audio board
2+
3+
Required properties:
4+
- compatible: "mikroe,mikroe-proto"
5+
- dai-format: Must be "i2s".
6+
- i2s-controller: The phandle of the I2S controller.
7+
- audio-codec: The phandle of the WM8731 audio codec.
8+
Optional properties:
9+
- model: The user-visible name of this sound complex.
10+
- bitclock-master: Indicates dai-link bit clock master; for details see simple-card.txt (1).
11+
- frame-master: Indicates dai-link frame master; for details see simple-card.txt (1).
12+
13+
(1) : There must be the same master for both bit and frame clocks.
14+
15+
Example:
16+
sound {
17+
compatible = "mikroe,mikroe-proto";
18+
model = "wm8731 @ sama5d2_xplained";
19+
i2s-controller = <&i2s0>;
20+
audio-codec = <&wm8731>;
21+
dai-format = "i2s";
22+
};
23+
};
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1+
NAU8822 audio CODEC
2+
3+
This device supports I2C only.
4+
5+
Required properties:
6+
7+
- compatible : "nuvoton,nau8822"
8+
9+
- reg : the I2C address of the device.
10+
11+
Example:
12+
13+
codec: nau8822@1a {
14+
compatible = "nuvoton,nau8822";
15+
reg = <0x1a>;
16+
};
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1+
PCM3060 audio CODEC
2+
3+
This driver supports both I2C and SPI.
4+
5+
Required properties:
6+
7+
- compatible: "ti,pcm3060"
8+
9+
- reg : the I2C address of the device for I2C, the chip select
10+
number for SPI.
11+
12+
Examples:
13+
14+
pcm3060: pcm3060@46 {
15+
compatible = "ti,pcm3060";
16+
reg = <0x46>;
17+
};

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