@@ -247,16 +247,16 @@ static inline void local_flush_tlb_all(void)
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const unsigned int __tlb_flag = __cpu_tlb_flags ;
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if (tlb_flag (TLB_WB ))
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- asm("mcr%? p15, 0, %0, c7, c10, 4" : : "r" (zero ));
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+ asm("mcr p15, 0, %0, c7, c10, 4" : : "r" (zero ) : "cc" );
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if (tlb_flag (TLB_V3_FULL ))
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- asm("mcr%? p15, 0, %0, c6, c0, 0" : : "r" (zero ));
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+ asm("mcr p15, 0, %0, c6, c0, 0" : : "r" (zero ) : "cc" );
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if (tlb_flag (TLB_V4_U_FULL | TLB_V6_U_FULL ))
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- asm("mcr%? p15, 0, %0, c8, c7, 0" : : "r" (zero ));
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+ asm("mcr p15, 0, %0, c8, c7, 0" : : "r" (zero ) : "cc" );
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if (tlb_flag (TLB_V4_D_FULL | TLB_V6_D_FULL ))
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- asm("mcr%? p15, 0, %0, c8, c6, 0" : : "r" (zero ));
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+ asm("mcr p15, 0, %0, c8, c6, 0" : : "r" (zero ) : "cc" );
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if (tlb_flag (TLB_V4_I_FULL | TLB_V6_I_FULL ))
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- asm("mcr%? p15, 0, %0, c8, c5, 0" : : "r" (zero ));
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+ asm("mcr p15, 0, %0, c8, c5, 0" : : "r" (zero ) : "cc" );
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}
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static inline void local_flush_tlb_mm (struct mm_struct * mm )
@@ -266,25 +266,25 @@ static inline void local_flush_tlb_mm(struct mm_struct *mm)
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const unsigned int __tlb_flag = __cpu_tlb_flags ;
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if (tlb_flag (TLB_WB ))
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- asm("mcr%? p15, 0, %0, c7, c10, 4" : : "r" (zero ));
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+ asm("mcr p15, 0, %0, c7, c10, 4" : : "r" (zero ) : "cc" );
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if (cpu_isset (smp_processor_id (), mm -> cpu_vm_mask )) {
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if (tlb_flag (TLB_V3_FULL ))
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- asm("mcr%? p15, 0, %0, c6, c0, 0" : : "r" (zero ));
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+ asm("mcr p15, 0, %0, c6, c0, 0" : : "r" (zero ) : "cc" );
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if (tlb_flag (TLB_V4_U_FULL ))
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- asm("mcr%? p15, 0, %0, c8, c7, 0" : : "r" (zero ));
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+ asm("mcr p15, 0, %0, c8, c7, 0" : : "r" (zero ) : "cc" );
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if (tlb_flag (TLB_V4_D_FULL ))
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- asm("mcr%? p15, 0, %0, c8, c6, 0" : : "r" (zero ));
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+ asm("mcr p15, 0, %0, c8, c6, 0" : : "r" (zero ) : "cc" );
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if (tlb_flag (TLB_V4_I_FULL ))
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- asm("mcr%? p15, 0, %0, c8, c5, 0" : : "r" (zero ));
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+ asm("mcr p15, 0, %0, c8, c5, 0" : : "r" (zero ) : "cc" );
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}
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if (tlb_flag (TLB_V6_U_ASID ))
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- asm("mcr%? p15, 0, %0, c8, c7, 2" : : "r" (asid ));
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+ asm("mcr p15, 0, %0, c8, c7, 2" : : "r" (asid ) : "cc" );
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if (tlb_flag (TLB_V6_D_ASID ))
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- asm("mcr%? p15, 0, %0, c8, c6, 2" : : "r" (asid ));
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+ asm("mcr p15, 0, %0, c8, c6, 2" : : "r" (asid ) : "cc" );
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if (tlb_flag (TLB_V6_I_ASID ))
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- asm("mcr%? p15, 0, %0, c8, c5, 2" : : "r" (asid ));
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+ asm("mcr p15, 0, %0, c8, c5, 2" : : "r" (asid ) : "cc" );
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}
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static inline void
@@ -296,27 +296,27 @@ local_flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr)
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uaddr = (uaddr & PAGE_MASK ) | ASID (vma -> vm_mm );
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if (tlb_flag (TLB_WB ))
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- asm("mcr%? p15, 0, %0, c7, c10, 4" : : "r" (zero ));
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+ asm("mcr p15, 0, %0, c7, c10, 4" : : "r" (zero ));
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if (cpu_isset (smp_processor_id (), vma -> vm_mm -> cpu_vm_mask )) {
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if (tlb_flag (TLB_V3_PAGE ))
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- asm("mcr%? p15, 0, %0, c6, c0, 0" : : "r" (uaddr ));
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+ asm("mcr p15, 0, %0, c6, c0, 0" : : "r" (uaddr ) : "cc" );
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if (tlb_flag (TLB_V4_U_PAGE ))
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- asm("mcr%? p15, 0, %0, c8, c7, 1" : : "r" (uaddr ));
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+ asm("mcr p15, 0, %0, c8, c7, 1" : : "r" (uaddr ) : "cc" );
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if (tlb_flag (TLB_V4_D_PAGE ))
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- asm("mcr%? p15, 0, %0, c8, c6, 1" : : "r" (uaddr ));
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+ asm("mcr p15, 0, %0, c8, c6, 1" : : "r" (uaddr ) : "cc" );
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if (tlb_flag (TLB_V4_I_PAGE ))
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- asm("mcr%? p15, 0, %0, c8, c5, 1" : : "r" (uaddr ));
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+ asm("mcr p15, 0, %0, c8, c5, 1" : : "r" (uaddr ) : "cc" );
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if (!tlb_flag (TLB_V4_I_PAGE ) && tlb_flag (TLB_V4_I_FULL ))
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- asm("mcr%? p15, 0, %0, c8, c5, 0" : : "r" (zero ));
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+ asm("mcr p15, 0, %0, c8, c5, 0" : : "r" (zero ) : "cc" );
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}
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if (tlb_flag (TLB_V6_U_PAGE ))
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- asm("mcr%? p15, 0, %0, c8, c7, 1" : : "r" (uaddr ));
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+ asm("mcr p15, 0, %0, c8, c7, 1" : : "r" (uaddr ) : "cc" );
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if (tlb_flag (TLB_V6_D_PAGE ))
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- asm("mcr%? p15, 0, %0, c8, c6, 1" : : "r" (uaddr ));
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+ asm("mcr p15, 0, %0, c8, c6, 1" : : "r" (uaddr ) : "cc" );
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if (tlb_flag (TLB_V6_I_PAGE ))
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- asm("mcr%? p15, 0, %0, c8, c5, 1" : : "r" (uaddr ));
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+ asm("mcr p15, 0, %0, c8, c5, 1" : : "r" (uaddr ) : "cc" );
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}
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static inline void local_flush_tlb_kernel_page (unsigned long kaddr )
@@ -327,31 +327,31 @@ static inline void local_flush_tlb_kernel_page(unsigned long kaddr)
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kaddr &= PAGE_MASK ;
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if (tlb_flag (TLB_WB ))
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- asm("mcr%? p15, 0, %0, c7, c10, 4" : : "r" (zero ));
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+ asm("mcr p15, 0, %0, c7, c10, 4" : : "r" (zero ) : "cc" );
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if (tlb_flag (TLB_V3_PAGE ))
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- asm("mcr%? p15, 0, %0, c6, c0, 0" : : "r" (kaddr ));
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+ asm("mcr p15, 0, %0, c6, c0, 0" : : "r" (kaddr ) : "cc" );
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if (tlb_flag (TLB_V4_U_PAGE ))
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- asm("mcr%? p15, 0, %0, c8, c7, 1" : : "r" (kaddr ));
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+ asm("mcr p15, 0, %0, c8, c7, 1" : : "r" (kaddr ) : "cc" );
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if (tlb_flag (TLB_V4_D_PAGE ))
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- asm("mcr%? p15, 0, %0, c8, c6, 1" : : "r" (kaddr ));
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+ asm("mcr p15, 0, %0, c8, c6, 1" : : "r" (kaddr ) : "cc" );
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if (tlb_flag (TLB_V4_I_PAGE ))
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- asm("mcr%? p15, 0, %0, c8, c5, 1" : : "r" (kaddr ));
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+ asm("mcr p15, 0, %0, c8, c5, 1" : : "r" (kaddr ) : "cc" );
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if (!tlb_flag (TLB_V4_I_PAGE ) && tlb_flag (TLB_V4_I_FULL ))
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- asm("mcr%? p15, 0, %0, c8, c5, 0" : : "r" (zero ));
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+ asm("mcr p15, 0, %0, c8, c5, 0" : : "r" (zero ) : "cc" );
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if (tlb_flag (TLB_V6_U_PAGE ))
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- asm("mcr%? p15, 0, %0, c8, c7, 1" : : "r" (kaddr ));
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+ asm("mcr p15, 0, %0, c8, c7, 1" : : "r" (kaddr ) : "cc" );
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if (tlb_flag (TLB_V6_D_PAGE ))
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- asm("mcr%? p15, 0, %0, c8, c6, 1" : : "r" (kaddr ));
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+ asm("mcr p15, 0, %0, c8, c6, 1" : : "r" (kaddr ) : "cc" );
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if (tlb_flag (TLB_V6_I_PAGE ))
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- asm("mcr%? p15, 0, %0, c8, c5, 1" : : "r" (kaddr ));
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+ asm("mcr p15, 0, %0, c8, c5, 1" : : "r" (kaddr ) : "cc" );
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/* The ARM ARM states that the completion of a TLB maintenance
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* operation is only guaranteed by a DSB instruction
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*/
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if (tlb_flag (TLB_V6_U_PAGE | TLB_V6_D_PAGE | TLB_V6_I_PAGE ))
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- asm("mcr%? p15, 0, %0, c7, c10, 4" : : "r" (zero ));
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+ asm("mcr p15, 0, %0, c7, c10, 4" : : "r" (zero ) : "cc" );
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}
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/*
@@ -373,20 +373,20 @@ static inline void flush_pmd_entry(pmd_t *pmd)
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const unsigned int __tlb_flag = __cpu_tlb_flags ;
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if (tlb_flag (TLB_DCLEAN ))
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- asm("mcr%? p15, 0, %0, c7, c10, 1 @ flush_pmd"
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- : : "r" (pmd ));
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+ asm("mcr p15, 0, %0, c7, c10, 1 @ flush_pmd"
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+ : : "r" (pmd ) : "cc" );
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if (tlb_flag (TLB_WB ))
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- asm("mcr%? p15, 0, %0, c7, c10, 4 @ flush_pmd"
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- : : "r" (zero ));
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+ asm("mcr p15, 0, %0, c7, c10, 4 @ flush_pmd"
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+ : : "r" (zero ) : "cc" );
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}
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static inline void clean_pmd_entry (pmd_t * pmd )
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{
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const unsigned int __tlb_flag = __cpu_tlb_flags ;
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if (tlb_flag (TLB_DCLEAN ))
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- asm("mcr%? p15, 0, %0, c7, c10, 1 @ flush_pmd"
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- : : "r" (pmd ));
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+ asm("mcr p15, 0, %0, c7, c10, 1 @ flush_pmd"
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+ : : "r" (pmd ) : "cc" );
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}
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#undef tlb_flag
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