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Merge tag 'samsung-cpuidle' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/drivers
Merge "Samsung CPUIdle updates for v3.20" from Kukjin Kim: - adds coupled cpuidle support for exynos4210 : fix for Exynos platform PM code preparing it for the coupled cpuidle support and adds coupled cpuidle AFTR mode on exynos4210 Note this is mostrly based on earlier cpuidle-exynos4210 driver from Daniel Lezcano and Bart updated. * tag 'samsung-cpuidle' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: cpuidle: exynos: add coupled cpuidle support for exynos4210 ARM: EXYNOS: apply S5P_CENTRAL_SEQ_OPTION fix only when necessary Signed-off-by: Olof Johansson <olof@lixom.net>
2 parents 68a028f + 712eddf commit 6f4554b

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+234
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8 files changed

+234
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lines changed

‎arch/arm/mach-exynos/common.h

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -13,6 +13,7 @@
1313
#define __ARCH_ARM_MACH_EXYNOS_COMMON_H
1414

1515
#include <linux/of.h>
16+
#include <linux/platform_data/cpuidle-exynos.h>
1617

1718
#define EXYNOS3250_SOC_ID 0xE3472000
1819
#define EXYNOS3_SOC_MASK 0xFFFFF000
@@ -150,8 +151,11 @@ extern void exynos_pm_central_suspend(void);
150151
extern int exynos_pm_central_resume(void);
151152
extern void exynos_enter_aftr(void);
152153

154+
extern struct cpuidle_exynos_data cpuidle_coupled_exynos_data;
155+
153156
extern void s5p_init_cpu(void __iomem *cpuid_addr);
154157
extern unsigned int samsung_rev(void);
158+
extern void __iomem *cpu_boot_reg_base(void);
155159

156160
static inline void pmu_raw_writel(u32 val, u32 offset)
157161
{

‎arch/arm/mach-exynos/exynos.c

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -246,6 +246,10 @@ static void __init exynos_dt_machine_init(void)
246246
if (!IS_ENABLED(CONFIG_SMP))
247247
exynos_sysram_init();
248248

249+
#ifdef CONFIG_ARM_EXYNOS_CPUIDLE
250+
if (of_machine_is_compatible("samsung,exynos4210"))
251+
exynos_cpuidle.dev.platform_data = &cpuidle_coupled_exynos_data;
252+
#endif
249253
if (of_machine_is_compatible("samsung,exynos4210") ||
250254
of_machine_is_compatible("samsung,exynos4212") ||
251255
(of_machine_is_compatible("samsung,exynos4412") &&

‎arch/arm/mach-exynos/platsmp.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -194,7 +194,7 @@ int exynos_cluster_power_state(int cluster)
194194
S5P_CORE_LOCAL_PWR_EN);
195195
}
196196

197-
static inline void __iomem *cpu_boot_reg_base(void)
197+
void __iomem *cpu_boot_reg_base(void)
198198
{
199199
if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_1_1)
200200
return pmu_base_addr + S5P_INFORM5;

‎arch/arm/mach-exynos/pm.c

Lines changed: 129 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -97,10 +97,6 @@ void exynos_pm_central_suspend(void)
9797
tmp = pmu_raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION);
9898
tmp &= ~S5P_CENTRAL_LOWPWR_CFG;
9999
pmu_raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);
100-
101-
/* Setting SEQ_OPTION register */
102-
pmu_raw_writel(S5P_USE_STANDBY_WFI0 | S5P_USE_STANDBY_WFE0,
103-
S5P_CENTRAL_SEQ_OPTION);
104100
}
105101

106102
int exynos_pm_central_resume(void)
@@ -164,6 +160,13 @@ void exynos_enter_aftr(void)
164160

165161
exynos_pm_central_suspend();
166162

163+
if (of_machine_is_compatible("samsung,exynos4212") ||
164+
of_machine_is_compatible("samsung,exynos4412")) {
165+
/* Setting SEQ_OPTION register */
166+
pmu_raw_writel(S5P_USE_STANDBY_WFI0 | S5P_USE_STANDBY_WFE0,
167+
S5P_CENTRAL_SEQ_OPTION);
168+
}
169+
167170
cpu_suspend(0, exynos_aftr_finisher);
168171

169172
if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A9) {
@@ -176,3 +179,125 @@ void exynos_enter_aftr(void)
176179

177180
cpu_pm_exit();
178181
}
182+
183+
static atomic_t cpu1_wakeup = ATOMIC_INIT(0);
184+
185+
static int exynos_cpu0_enter_aftr(void)
186+
{
187+
int ret = -1;
188+
189+
/*
190+
* If the other cpu is powered on, we have to power it off, because
191+
* the AFTR state won't work otherwise
192+
*/
193+
if (cpu_online(1)) {
194+
/*
195+
* We reach a sync point with the coupled idle state, we know
196+
* the other cpu will power down itself or will abort the
197+
* sequence, let's wait for one of these to happen
198+
*/
199+
while (exynos_cpu_power_state(1)) {
200+
/*
201+
* The other cpu may skip idle and boot back
202+
* up again
203+
*/
204+
if (atomic_read(&cpu1_wakeup))
205+
goto abort;
206+
207+
/*
208+
* The other cpu may bounce through idle and
209+
* boot back up again, getting stuck in the
210+
* boot rom code
211+
*/
212+
if (__raw_readl(cpu_boot_reg_base()) == 0)
213+
goto abort;
214+
215+
cpu_relax();
216+
}
217+
}
218+
219+
exynos_enter_aftr();
220+
ret = 0;
221+
222+
abort:
223+
if (cpu_online(1)) {
224+
/*
225+
* Set the boot vector to something non-zero
226+
*/
227+
__raw_writel(virt_to_phys(exynos_cpu_resume),
228+
cpu_boot_reg_base());
229+
dsb();
230+
231+
/*
232+
* Turn on cpu1 and wait for it to be on
233+
*/
234+
exynos_cpu_power_up(1);
235+
while (exynos_cpu_power_state(1) != S5P_CORE_LOCAL_PWR_EN)
236+
cpu_relax();
237+
238+
while (!atomic_read(&cpu1_wakeup)) {
239+
/*
240+
* Poke cpu1 out of the boot rom
241+
*/
242+
__raw_writel(virt_to_phys(exynos_cpu_resume),
243+
cpu_boot_reg_base());
244+
245+
arch_send_wakeup_ipi_mask(cpumask_of(1));
246+
}
247+
}
248+
249+
return ret;
250+
}
251+
252+
static int exynos_wfi_finisher(unsigned long flags)
253+
{
254+
cpu_do_idle();
255+
256+
return -1;
257+
}
258+
259+
static int exynos_cpu1_powerdown(void)
260+
{
261+
int ret = -1;
262+
263+
/*
264+
* Idle sequence for cpu1
265+
*/
266+
if (cpu_pm_enter())
267+
goto cpu1_aborted;
268+
269+
/*
270+
* Turn off cpu 1
271+
*/
272+
exynos_cpu_power_down(1);
273+
274+
ret = cpu_suspend(0, exynos_wfi_finisher);
275+
276+
cpu_pm_exit();
277+
278+
cpu1_aborted:
279+
dsb();
280+
/*
281+
* Notify cpu 0 that cpu 1 is awake
282+
*/
283+
atomic_set(&cpu1_wakeup, 1);
284+
285+
return ret;
286+
}
287+
288+
static void exynos_pre_enter_aftr(void)
289+
{
290+
__raw_writel(virt_to_phys(exynos_cpu_resume), cpu_boot_reg_base());
291+
}
292+
293+
static void exynos_post_enter_aftr(void)
294+
{
295+
atomic_set(&cpu1_wakeup, 0);
296+
}
297+
298+
struct cpuidle_exynos_data cpuidle_coupled_exynos_data = {
299+
.cpu0_enter_aftr = exynos_cpu0_enter_aftr,
300+
.cpu1_powerdown = exynos_cpu1_powerdown,
301+
.pre_enter_aftr = exynos_pre_enter_aftr,
302+
.post_enter_aftr = exynos_post_enter_aftr,
303+
};

‎arch/arm/mach-exynos/suspend.c

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -282,6 +282,10 @@ static int exynos_pm_suspend(void)
282282
{
283283
exynos_pm_central_suspend();
284284

285+
/* Setting SEQ_OPTION register */
286+
pmu_raw_writel(S5P_USE_STANDBY_WFI0 | S5P_USE_STANDBY_WFE0,
287+
S5P_CENTRAL_SEQ_OPTION);
288+
285289
if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A9)
286290
exynos_cpu_save_register();
287291

‎drivers/cpuidle/Kconfig.arm

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -55,6 +55,7 @@ config ARM_AT91_CPUIDLE
5555
config ARM_EXYNOS_CPUIDLE
5656
bool "Cpu Idle Driver for the Exynos processors"
5757
depends on ARCH_EXYNOS
58+
select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP
5859
help
5960
Select this to enable cpuidle for Exynos processors
6061

‎drivers/cpuidle/cpuidle-exynos.c

Lines changed: 71 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,11 @@
1-
/* linux/arch/arm/mach-exynos/cpuidle.c
2-
*
3-
* Copyright (c) 2011 Samsung Electronics Co., Ltd.
1+
/*
2+
* Copyright (c) 2011-2014 Samsung Electronics Co., Ltd.
43
* http://www.samsung.com
54
*
5+
* Coupled cpuidle support based on the work of:
6+
* Colin Cross <ccross@android.com>
7+
* Daniel Lezcano <daniel.lezcano@linaro.org>
8+
*
69
* This program is free software; you can redistribute it and/or modify
710
* it under the terms of the GNU General Public License version 2 as
811
* published by the Free Software Foundation.
@@ -13,13 +16,49 @@
1316
#include <linux/export.h>
1417
#include <linux/module.h>
1518
#include <linux/platform_device.h>
19+
#include <linux/of.h>
20+
#include <linux/platform_data/cpuidle-exynos.h>
1621

1722
#include <asm/proc-fns.h>
1823
#include <asm/suspend.h>
1924
#include <asm/cpuidle.h>
2025

26+
static atomic_t exynos_idle_barrier;
27+
28+
static struct cpuidle_exynos_data *exynos_cpuidle_pdata;
2129
static void (*exynos_enter_aftr)(void);
2230

31+
static int exynos_enter_coupled_lowpower(struct cpuidle_device *dev,
32+
struct cpuidle_driver *drv,
33+
int index)
34+
{
35+
int ret;
36+
37+
exynos_cpuidle_pdata->pre_enter_aftr();
38+
39+
/*
40+
* Waiting all cpus to reach this point at the same moment
41+
*/
42+
cpuidle_coupled_parallel_barrier(dev, &exynos_idle_barrier);
43+
44+
/*
45+
* Both cpus will reach this point at the same time
46+
*/
47+
ret = dev->cpu ? exynos_cpuidle_pdata->cpu1_powerdown()
48+
: exynos_cpuidle_pdata->cpu0_enter_aftr();
49+
if (ret)
50+
index = ret;
51+
52+
/*
53+
* Waiting all cpus to finish the power sequence before going further
54+
*/
55+
cpuidle_coupled_parallel_barrier(dev, &exynos_idle_barrier);
56+
57+
exynos_cpuidle_pdata->post_enter_aftr();
58+
59+
return index;
60+
}
61+
2362
static int exynos_enter_lowpower(struct cpuidle_device *dev,
2463
struct cpuidle_driver *drv,
2564
int index)
@@ -55,13 +94,40 @@ static struct cpuidle_driver exynos_idle_driver = {
5594
.safe_state_index = 0,
5695
};
5796

97+
static struct cpuidle_driver exynos_coupled_idle_driver = {
98+
.name = "exynos_coupled_idle",
99+
.owner = THIS_MODULE,
100+
.states = {
101+
[0] = ARM_CPUIDLE_WFI_STATE,
102+
[1] = {
103+
.enter = exynos_enter_coupled_lowpower,
104+
.exit_latency = 5000,
105+
.target_residency = 10000,
106+
.flags = CPUIDLE_FLAG_COUPLED |
107+
CPUIDLE_FLAG_TIMER_STOP,
108+
.name = "C1",
109+
.desc = "ARM power down",
110+
},
111+
},
112+
.state_count = 2,
113+
.safe_state_index = 0,
114+
};
115+
58116
static int exynos_cpuidle_probe(struct platform_device *pdev)
59117
{
60118
int ret;
61119

62-
exynos_enter_aftr = (void *)(pdev->dev.platform_data);
120+
if (of_machine_is_compatible("samsung,exynos4210")) {
121+
exynos_cpuidle_pdata = pdev->dev.platform_data;
122+
123+
ret = cpuidle_register(&exynos_coupled_idle_driver,
124+
cpu_possible_mask);
125+
} else {
126+
exynos_enter_aftr = (void *)(pdev->dev.platform_data);
127+
128+
ret = cpuidle_register(&exynos_idle_driver, NULL);
129+
}
63130

64-
ret = cpuidle_register(&exynos_idle_driver, NULL);
65131
if (ret) {
66132
dev_err(&pdev->dev, "failed to register cpuidle driver\n");
67133
return ret;

‎include/linux/platform_data/cpuidle-exynos.h

Lines changed: 20 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,20 @@
1+
/*
2+
* Copyright (c) 2014 Samsung Electronics Co., Ltd.
3+
* http://www.samsung.com
4+
*
5+
* This program is free software; you can redistribute it and/or modify
6+
* it under the terms of the GNU General Public License version 2 as
7+
* published by the Free Software Foundation.
8+
*/
9+
10+
#ifndef __CPUIDLE_EXYNOS_H
11+
#define __CPUIDLE_EXYNOS_H
12+
13+
struct cpuidle_exynos_data {
14+
int (*cpu0_enter_aftr)(void);
15+
int (*cpu1_powerdown)(void);
16+
void (*pre_enter_aftr)(void);
17+
void (*post_enter_aftr)(void);
18+
};
19+
20+
#endif

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