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Merge tag 'powerpc-4.7-5' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux
Pull powerpc fixes from Michael Ellerman: - tm: Always reclaim in start_thread() for exec() class syscalls from Cyril Bur - tm: Avoid SLB faults in treclaim/trecheckpoint when RI=0 from Michael Neuling - eeh: Fix wrong argument passed to eeh_rmv_device() from Gavin Shan - Initialise pci_io_base as early as possible from Darren Stevens * tag 'powerpc-4.7-5' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: powerpc: Initialise pci_io_base as early as possible powerpc/tm: Avoid SLB faults in treclaim/trecheckpoint when RI=0 powerpc/eeh: Fix wrong argument passed to eeh_rmv_device() powerpc/tm: Always reclaim in start_thread() for exec() class syscalls
2 parents 99b0f54 + bfa3708 commit 70bd68d

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7 files changed

+65
-19
lines changed

7 files changed

+65
-19
lines changed

arch/powerpc/include/asm/book3s/64/pgtable.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -230,6 +230,7 @@ extern unsigned long __kernel_virt_size;
230230
#define KERN_VIRT_SIZE __kernel_virt_size
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extern struct page *vmemmap;
232232
extern unsigned long ioremap_bot;
233+
extern unsigned long pci_io_base;
233234
#endif /* __ASSEMBLY__ */
234235

235236
#include <asm/book3s/64/hash.h>

arch/powerpc/kernel/eeh_driver.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -647,7 +647,7 @@ static int eeh_reset_device(struct eeh_pe *pe, struct pci_bus *bus,
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pci_unlock_rescan_remove();
648648
}
649649
} else if (frozen_bus) {
650-
eeh_pe_dev_traverse(pe, eeh_rmv_device, &rmv_data);
650+
eeh_pe_dev_traverse(pe, eeh_rmv_device, rmv_data);
651651
}
652652

653653
/*

arch/powerpc/kernel/pci_64.c

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -47,7 +47,6 @@ static int __init pcibios_init(void)
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4848
printk(KERN_INFO "PCI: Probing PCI hardware\n");
4949

50-
pci_io_base = ISA_IO_BASE;
5150
/* For now, override phys_mem_access_prot. If we need it,g
5251
* later, we may move that initialization to each ppc_md
5352
*/

arch/powerpc/kernel/process.c

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1505,6 +1505,16 @@ void start_thread(struct pt_regs *regs, unsigned long start, unsigned long sp)
15051505
current->thread.regs = regs - 1;
15061506
}
15071507

1508+
#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1509+
/*
1510+
* Clear any transactional state, we're exec()ing. The cause is
1511+
* not important as there will never be a recheckpoint so it's not
1512+
* user visible.
1513+
*/
1514+
if (MSR_TM_SUSPENDED(mfmsr()))
1515+
tm_reclaim_current(0);
1516+
#endif
1517+
15081518
memset(regs->gpr, 0, sizeof(regs->gpr));
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regs->ctr = 0;
15101520
regs->link = 0;

arch/powerpc/kernel/tm.S

Lines changed: 44 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -110,17 +110,11 @@ _GLOBAL(tm_reclaim)
110110
std r3, STK_PARAM(R3)(r1)
111111
SAVE_NVGPRS(r1)
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113-
/* We need to setup MSR for VSX register save instructions. Here we
114-
* also clear the MSR RI since when we do the treclaim, we won't have a
115-
* valid kernel pointer for a while. We clear RI here as it avoids
116-
* adding another mtmsr closer to the treclaim. This makes the region
117-
* maked as non-recoverable wider than it needs to be but it saves on
118-
* inserting another mtmsrd later.
119-
*/
113+
/* We need to setup MSR for VSX register save instructions. */
120114
mfmsr r14
121115
mr r15, r14
122116
ori r15, r15, MSR_FP
123-
li r16, MSR_RI
117+
li r16, 0
124118
ori r16, r16, MSR_EE /* IRQs hard off */
125119
andc r15, r15, r16
126120
oris r15, r15, MSR_VEC@h
@@ -176,7 +170,17 @@ dont_backup_fp:
176170
1: tdeqi r6, 0
177171
EMIT_BUG_ENTRY 1b,__FILE__,__LINE__,0
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179-
/* The moment we treclaim, ALL of our GPRs will switch
173+
/* Clear MSR RI since we are about to change r1, EE is already off. */
174+
li r4, 0
175+
mtmsrd r4, 1
176+
177+
/*
178+
* BE CAREFUL HERE:
179+
* At this point we can't take an SLB miss since we have MSR_RI
180+
* off. Load only to/from the stack/paca which are in SLB bolted regions
181+
* until we turn MSR RI back on.
182+
*
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* The moment we treclaim, ALL of our GPRs will switch
180184
* to user register state. (FPRs, CCR etc. also!)
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* Use an sprg and a tm_scratch in the PACA to shuffle.
182186
*/
@@ -197,6 +201,11 @@ dont_backup_fp:
197201

198202
/* Store the PPR in r11 and reset to decent value */
199203
std r11, GPR11(r1) /* Temporary stash */
204+
205+
/* Reset MSR RI so we can take SLB faults again */
206+
li r11, MSR_RI
207+
mtmsrd r11, 1
208+
200209
mfspr r11, SPRN_PPR
201210
HMT_MEDIUM
202211

@@ -397,11 +406,6 @@ restore_gprs:
397406
ld r5, THREAD_TM_DSCR(r3)
398407
ld r6, THREAD_TM_PPR(r3)
399408

400-
/* Clear the MSR RI since we are about to change R1. EE is already off
401-
*/
402-
li r4, 0
403-
mtmsrd r4, 1
404-
405409
REST_GPR(0, r7) /* GPR0 */
406410
REST_2GPRS(2, r7) /* GPR2-3 */
407411
REST_GPR(4, r7) /* GPR4 */
@@ -439,10 +443,33 @@ restore_gprs:
439443
ld r6, _CCR(r7)
440444
mtcr r6
441445

442-
REST_GPR(1, r7) /* GPR1 */
443-
REST_GPR(5, r7) /* GPR5-7 */
444446
REST_GPR(6, r7)
445-
ld r7, GPR7(r7)
447+
448+
/*
449+
* Store r1 and r5 on the stack so that we can access them
450+
* after we clear MSR RI.
451+
*/
452+
453+
REST_GPR(5, r7)
454+
std r5, -8(r1)
455+
ld r5, GPR1(r7)
456+
std r5, -16(r1)
457+
458+
REST_GPR(7, r7)
459+
460+
/* Clear MSR RI since we are about to change r1. EE is already off */
461+
li r5, 0
462+
mtmsrd r5, 1
463+
464+
/*
465+
* BE CAREFUL HERE:
466+
* At this point we can't take an SLB miss since we have MSR_RI
467+
* off. Load only to/from the stack/paca which are in SLB bolted regions
468+
* until we turn MSR RI back on.
469+
*/
470+
471+
ld r5, -8(r1)
472+
ld r1, -16(r1)
446473

447474
/* Commit register state as checkpointed state: */
448475
TRECHKPT

arch/powerpc/mm/hash_utils_64.c

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -922,6 +922,10 @@ void __init hash__early_init_mmu(void)
922922
vmemmap = (struct page *)H_VMEMMAP_BASE;
923923
ioremap_bot = IOREMAP_BASE;
924924

925+
#ifdef CONFIG_PCI
926+
pci_io_base = ISA_IO_BASE;
927+
#endif
928+
925929
/* Initialize the MMU Hash table and create the linear mapping
926930
* of memory. Has to be done before SLB initialization as this is
927931
* currently where the page size encoding is obtained.

arch/powerpc/mm/pgtable-radix.c

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -328,6 +328,11 @@ void __init radix__early_init_mmu(void)
328328
__vmalloc_end = RADIX_VMALLOC_END;
329329
vmemmap = (struct page *)RADIX_VMEMMAP_BASE;
330330
ioremap_bot = IOREMAP_BASE;
331+
332+
#ifdef CONFIG_PCI
333+
pci_io_base = ISA_IO_BASE;
334+
#endif
335+
331336
/*
332337
* For now radix also use the same frag size
333338
*/

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