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KVM: hyperv: support HV_X64_MSR_TSC_FREQUENCY and HV_X64_MSR_APIC_FREQUENCY
It has been experimentally confirmed that supporting these two MSRs is one of the necessary conditions for nested Hyper-V to use the TSC page. Modern Windows guests are noticeably slower when they fall back to reading timestamps from the HV_X64_MSR_TIME_REF_COUNT MSR instead of using the TSC page. The newly supported MSRs are advertised with the AccessFrequencyRegs partition privilege flag and CPUID.40000003H:EDX[8] "Support for determining timer frequencies is available" (both outside of the scope of this KVM patch). Reviewed-by: Radim Krčmář <rkrcmar@redhat.com> Signed-off-by: Ladi Prosek <lprosek@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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arch/x86/kvm/hyperv.c

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@@ -1160,6 +1160,12 @@ static int kvm_hv_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
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return stimer_get_count(vcpu_to_stimer(vcpu, timer_index),
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pdata);
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}
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case HV_X64_MSR_TSC_FREQUENCY:
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data = (u64)vcpu->arch.virtual_tsc_khz * 1000;
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break;
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case HV_X64_MSR_APIC_FREQUENCY:
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data = APIC_BUS_FREQUENCY;
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break;
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default:
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vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
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return 1;

arch/x86/kvm/lapic.c

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@@ -54,8 +54,6 @@
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#define PRIu64 "u"
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#define PRIo64 "o"
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#define APIC_BUS_CYCLE_NS 1
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/* #define apic_debug(fmt,arg...) printk(KERN_WARNING fmt,##arg) */
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#define apic_debug(fmt, arg...)
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arch/x86/kvm/lapic.h

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@@ -12,6 +12,9 @@
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#define KVM_APIC_SHORT_MASK 0xc0000
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#define KVM_APIC_DEST_MASK 0x800
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#define APIC_BUS_CYCLE_NS 1
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#define APIC_BUS_FREQUENCY (1000000000ULL / APIC_BUS_CYCLE_NS)
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struct kvm_timer {
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struct hrtimer timer;
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s64 period; /* unit: ns */

arch/x86/kvm/x86.c

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@@ -993,6 +993,7 @@ static u32 emulated_msrs[] = {
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MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
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HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
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HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
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HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
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HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
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HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
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HV_X64_MSR_RESET,

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