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paulburtonralfbaechle
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MIPS: Move GIC IPI functions out of smp-cmp.c
The GIC IPI functions aren't necessarily specific to the "CMP framework" SMP implementation, and will be used elsewhere in a subsequent commit. This patch adds cleaned up GIC IPI functions to a separate file which is compiled when a new CONFIG_MIPS_GIC_IPI Kconfig symbol is selected, and selects that symbol for CONFIG_MIPS_CMP. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6359/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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-50
lines changed

5 files changed

+63
-50
lines changed

‎arch/mips/Kconfig

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Original file line numberDiff line numberDiff line change
@@ -1996,12 +1996,16 @@ config MIPS_VPE_APSP_API_MT
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config MIPS_CMP
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bool "MIPS CMP support"
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depends on SYS_SUPPORTS_MIPS_CMP && MIPS_MT_SMP
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select MIPS_GIC_IPI
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select SYNC_R4K
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select WEAK_ORDERING
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default n
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help
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Enable Coherency Manager processor (CMP) support.
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config MIPS_GIC_IPI
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bool
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config SB1_PASS_1_WORKAROUNDS
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bool
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depends on CPU_SB1_PASS_1

‎arch/mips/include/asm/smp-ops.h

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@@ -58,6 +58,9 @@ static inline void register_smp_ops(struct plat_smp_ops *ops)
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#endif /* !CONFIG_SMP */
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extern void gic_send_ipi_single(int cpu, unsigned int action);
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extern void gic_send_ipi_mask(const struct cpumask *mask, unsigned int action);
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static inline int register_up_smp_ops(void)
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{
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#ifdef CONFIG_SMP_UP

‎arch/mips/kernel/Makefile

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Original file line numberDiff line numberDiff line change
@@ -53,6 +53,7 @@ obj-$(CONFIG_MIPS_MT_FPAFF) += mips-mt-fpaff.o
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obj-$(CONFIG_MIPS_MT_SMTC) += smtc.o smtc-asm.o smtc-proc.o
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obj-$(CONFIG_MIPS_MT_SMP) += smp-mt.o
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obj-$(CONFIG_MIPS_CMP) += smp-cmp.o
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obj-$(CONFIG_MIPS_GIC_IPI) += smp-gic.o
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obj-$(CONFIG_CPU_MIPSR2) += spram.o
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obj-$(CONFIG_MIPS_VPE_LOADER) += vpe.o

‎arch/mips/kernel/smp-cmp.c

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Original file line numberDiff line numberDiff line change
@@ -39,54 +39,6 @@
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#include <asm/amon.h>
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#include <asm/gic.h>
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static void ipi_call_function(unsigned int cpu)
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{
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pr_debug("CPU%d: %s cpu %d status %08x\n",
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smp_processor_id(), __func__, cpu, read_c0_status());
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gic_send_ipi(plat_ipi_call_int_xlate(cpu));
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}
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static void ipi_resched(unsigned int cpu)
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{
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pr_debug("CPU%d: %s cpu %d status %08x\n",
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smp_processor_id(), __func__, cpu, read_c0_status());
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gic_send_ipi(plat_ipi_resched_int_xlate(cpu));
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}
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/*
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* FIXME: This isn't restricted to CMP
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* The SMVP kernel could use GIC interrupts if available
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*/
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void cmp_send_ipi_single(int cpu, unsigned int action)
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{
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unsigned long flags;
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local_irq_save(flags);
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switch (action) {
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case SMP_CALL_FUNCTION:
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ipi_call_function(cpu);
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break;
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case SMP_RESCHEDULE_YOURSELF:
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ipi_resched(cpu);
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break;
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}
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local_irq_restore(flags);
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}
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static void cmp_send_ipi_mask(const struct cpumask *mask, unsigned int action)
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{
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unsigned int i;
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for_each_cpu(i, mask)
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cmp_send_ipi_single(i, action);
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}
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static void cmp_init_secondary(void)
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{
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struct cpuinfo_mips *c = &current_cpu_data;
@@ -210,8 +162,8 @@ void __init cmp_prepare_cpus(unsigned int max_cpus)
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}
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struct plat_smp_ops cmp_smp_ops = {
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.send_ipi_single = cmp_send_ipi_single,
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.send_ipi_mask = cmp_send_ipi_mask,
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.send_ipi_single = gic_send_ipi_single,
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.send_ipi_mask = gic_send_ipi_mask,
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.init_secondary = cmp_init_secondary,
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.smp_finish = cmp_smp_finish,
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.cpus_done = cmp_cpus_done,

‎arch/mips/kernel/smp-gic.c

Lines changed: 53 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,53 @@
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/*
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* Copyright (C) 2013 Imagination Technologies
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* Author: Paul Burton <paul.burton@imgtec.com>
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*
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* Based on smp-cmp.c:
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* Copyright (C) 2007 MIPS Technologies, Inc.
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* Author: Chris Dearman (chris@mips.com)
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/printk.h>
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#include <asm/gic.h>
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#include <asm/smp-ops.h>
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void gic_send_ipi_single(int cpu, unsigned int action)
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{
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unsigned long flags;
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unsigned int intr;
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pr_debug("CPU%d: %s cpu %d action %u status %08x\n",
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smp_processor_id(), __func__, cpu, action, read_c0_status());
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local_irq_save(flags);
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switch (action) {
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case SMP_CALL_FUNCTION:
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intr = plat_ipi_call_int_xlate(cpu);
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break;
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case SMP_RESCHEDULE_YOURSELF:
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intr = plat_ipi_resched_int_xlate(cpu);
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break;
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default:
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BUG();
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}
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gic_send_ipi(intr);
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local_irq_restore(flags);
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}
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47+
void gic_send_ipi_mask(const struct cpumask *mask, unsigned int action)
48+
{
49+
unsigned int i;
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51+
for_each_cpu(i, mask)
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gic_send_ipi_single(i, action);
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}

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