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Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson: "Again, a batch that's been sitting a couple of weeks, mostly because I anticipated a bit more material but it didn't show up -- which is good. These are all your garden variety fixes for ARM platforms. The most visible issue fixed here is probably the SMP reset issue on OMAP, the rest are minor stuff" * tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: arm64: allwinner: a64: add pmu0 regs for USB PHY ARM: OMAP2+: omap_device: Sync omap_device and pm_runtime after probe defer reset: add exported __reset_control_get, return NULL if optional ARM: orion5x: only call into phylib when available ARM: omap2+: Revert omap-smp.c changes resetting CPU1 during boot ARM: dts: am335x-evmsk: adjust mmc2 param to allow suspend ARM: dts: ti: fix PCI bus dtc warnings ARM: dts: am335x-baltos: disable EEE for Atheros 8035 PHY ARM: dts: OMAP3: Fix MFG ID EEPROM ARM: sun8i: a33: add operating-points-v2 property to all nodes ARM: sun8i: a33: remove highest OPP to fix CPU crashes
2 parents a86f106 + e2647b6 commit 7395ca0

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16 files changed

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-41
lines changed

16 files changed

+154
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lines changed

arch/arm/boot/dts/am335x-baltos.dtsi

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -371,6 +371,8 @@
371371

372372
phy1: ethernet-phy@1 {
373373
reg = <7>;
374+
eee-broken-100tx;
375+
eee-broken-1000t;
374376
};
375377
};
376378

arch/arm/boot/dts/am335x-evmsk.dts

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -672,6 +672,7 @@
672672
ti,non-removable;
673673
bus-width = <4>;
674674
cap-power-off-card;
675+
keep-power-in-suspend;
675676
pinctrl-names = "default";
676677
pinctrl-0 = <&mmc2_pins>;
677678

arch/arm/boot/dts/dra7.dtsi

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -283,6 +283,7 @@
283283
device_type = "pci";
284284
ranges = <0x81000000 0 0 0x03000 0 0x00010000
285285
0x82000000 0 0x20013000 0x13000 0 0xffed000>;
286+
bus-range = <0x00 0xff>;
286287
#interrupt-cells = <1>;
287288
num-lanes = <1>;
288289
linux,pci-domain = <0>;
@@ -319,6 +320,7 @@
319320
device_type = "pci";
320321
ranges = <0x81000000 0 0 0x03000 0 0x00010000
321322
0x82000000 0 0x30013000 0x13000 0 0xffed000>;
323+
bus-range = <0x00 0xff>;
322324
#interrupt-cells = <1>;
323325
num-lanes = <1>;
324326
linux,pci-domain = <1>;

arch/arm/boot/dts/logicpd-torpedo-som.dtsi

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -121,7 +121,7 @@
121121
&i2c3 {
122122
clock-frequency = <400000>;
123123
at24@50 {
124-
compatible = "at24,24c02";
124+
compatible = "atmel,24c64";
125125
readonly;
126126
reg = <0x50>;
127127
};

arch/arm/boot/dts/sun8i-a33.dtsi

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -66,12 +66,6 @@
6666
opp-microvolt = <1200000>;
6767
clock-latency-ns = <244144>; /* 8 32k periods */
6868
};
69-
70-
opp@1200000000 {
71-
opp-hz = /bits/ 64 <1200000000>;
72-
opp-microvolt = <1320000>;
73-
clock-latency-ns = <244144>; /* 8 32k periods */
74-
};
7569
};
7670

7771
cpus {
@@ -81,16 +75,22 @@
8175
operating-points-v2 = <&cpu0_opp_table>;
8276
};
8377

78+
cpu@1 {
79+
operating-points-v2 = <&cpu0_opp_table>;
80+
};
81+
8482
cpu@2 {
8583
compatible = "arm,cortex-a7";
8684
device_type = "cpu";
8785
reg = <2>;
86+
operating-points-v2 = <&cpu0_opp_table>;
8887
};
8988

9089
cpu@3 {
9190
compatible = "arm,cortex-a7";
9291
device_type = "cpu";
9392
reg = <3>;
93+
operating-points-v2 = <&cpu0_opp_table>;
9494
};
9595
};
9696

arch/arm/mach-omap2/common.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -270,6 +270,7 @@ extern const struct smp_operations omap4_smp_ops;
270270
extern int omap4_mpuss_init(void);
271271
extern int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state);
272272
extern int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state);
273+
extern u32 omap4_get_cpu1_ns_pa_addr(void);
273274
#else
274275
static inline int omap4_enter_lowpower(unsigned int cpu,
275276
unsigned int power_state)

arch/arm/mach-omap2/omap-hotplug.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -50,7 +50,7 @@ void omap4_cpu_die(unsigned int cpu)
5050
omap4_hotplug_cpu(cpu, PWRDM_POWER_OFF);
5151

5252
if (omap_secure_apis_support())
53-
boot_cpu = omap_read_auxcoreboot0();
53+
boot_cpu = omap_read_auxcoreboot0() >> 9;
5454
else
5555
boot_cpu =
5656
readl_relaxed(base + OMAP_AUX_CORE_BOOT_0) >> 5;

arch/arm/mach-omap2/omap-mpuss-lowpower.c

Lines changed: 18 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -64,6 +64,7 @@
6464
#include "prm-regbits-44xx.h"
6565

6666
static void __iomem *sar_base;
67+
static u32 old_cpu1_ns_pa_addr;
6768

6869
#if defined(CONFIG_PM) && defined(CONFIG_SMP)
6970

@@ -212,6 +213,11 @@ static void __init save_l2x0_context(void)
212213
{}
213214
#endif
214215

216+
u32 omap4_get_cpu1_ns_pa_addr(void)
217+
{
218+
return old_cpu1_ns_pa_addr;
219+
}
220+
215221
/**
216222
* omap4_enter_lowpower: OMAP4 MPUSS Low Power Entry Function
217223
* The purpose of this function is to manage low power programming
@@ -460,22 +466,30 @@ int __init omap4_mpuss_init(void)
460466
void __init omap4_mpuss_early_init(void)
461467
{
462468
unsigned long startup_pa;
469+
void __iomem *ns_pa_addr;
463470

464-
if (!(cpu_is_omap44xx() || soc_is_omap54xx()))
471+
if (!(soc_is_omap44xx() || soc_is_omap54xx()))
465472
return;
466473

467474
sar_base = omap4_get_sar_ram_base();
468475

469-
if (cpu_is_omap443x())
476+
/* Save old NS_PA_ADDR for validity checks later on */
477+
if (soc_is_omap44xx())
478+
ns_pa_addr = sar_base + CPU1_WAKEUP_NS_PA_ADDR_OFFSET;
479+
else
480+
ns_pa_addr = sar_base + OMAP5_CPU1_WAKEUP_NS_PA_ADDR_OFFSET;
481+
old_cpu1_ns_pa_addr = readl_relaxed(ns_pa_addr);
482+
483+
if (soc_is_omap443x())
470484
startup_pa = __pa_symbol(omap4_secondary_startup);
471-
else if (cpu_is_omap446x())
485+
else if (soc_is_omap446x())
472486
startup_pa = __pa_symbol(omap4460_secondary_startup);
473487
else if ((__boot_cpu_mode & MODE_MASK) == HYP_MODE)
474488
startup_pa = __pa_symbol(omap5_secondary_hyp_startup);
475489
else
476490
startup_pa = __pa_symbol(omap5_secondary_startup);
477491

478-
if (cpu_is_omap44xx())
492+
if (soc_is_omap44xx())
479493
writel_relaxed(startup_pa, sar_base +
480494
CPU1_WAKEUP_NS_PA_ADDR_OFFSET);
481495
else

arch/arm/mach-omap2/omap-smc.S

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -94,6 +94,5 @@ ENTRY(omap_read_auxcoreboot0)
9494
ldr r12, =0x103
9595
dsb
9696
smc #0
97-
mov r0, r0, lsr #9
9897
ldmfd sp!, {r2-r12, pc}
9998
ENDPROC(omap_read_auxcoreboot0)

arch/arm/mach-omap2/omap-smp.c

Lines changed: 76 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -21,6 +21,7 @@
2121
#include <linux/io.h>
2222
#include <linux/irqchip/arm-gic.h>
2323

24+
#include <asm/sections.h>
2425
#include <asm/smp_scu.h>
2526
#include <asm/virt.h>
2627

@@ -40,10 +41,14 @@
4041

4142
#define OMAP5_CORE_COUNT 0x2
4243

44+
#define AUX_CORE_BOOT0_GP_RELEASE 0x020
45+
#define AUX_CORE_BOOT0_HS_RELEASE 0x200
46+
4347
struct omap_smp_config {
4448
unsigned long cpu1_rstctrl_pa;
4549
void __iomem *cpu1_rstctrl_va;
4650
void __iomem *scu_base;
51+
void __iomem *wakeupgen_base;
4752
void *startup_addr;
4853
};
4954

@@ -140,7 +145,6 @@ static int omap4_boot_secondary(unsigned int cpu, struct task_struct *idle)
140145
static struct clockdomain *cpu1_clkdm;
141146
static bool booted;
142147
static struct powerdomain *cpu1_pwrdm;
143-
void __iomem *base = omap_get_wakeupgen_base();
144148

145149
/*
146150
* Set synchronisation state between this boot processor
@@ -155,9 +159,11 @@ static int omap4_boot_secondary(unsigned int cpu, struct task_struct *idle)
155159
* A barrier is added to ensure that write buffer is drained
156160
*/
157161
if (omap_secure_apis_support())
158-
omap_modify_auxcoreboot0(0x200, 0xfffffdff);
162+
omap_modify_auxcoreboot0(AUX_CORE_BOOT0_HS_RELEASE,
163+
0xfffffdff);
159164
else
160-
writel_relaxed(0x20, base + OMAP_AUX_CORE_BOOT_0);
165+
writel_relaxed(AUX_CORE_BOOT0_GP_RELEASE,
166+
cfg.wakeupgen_base + OMAP_AUX_CORE_BOOT_0);
161167

162168
if (!cpu1_clkdm && !cpu1_pwrdm) {
163169
cpu1_clkdm = clkdm_lookup("mpu1_clkdm");
@@ -261,9 +267,72 @@ static void __init omap4_smp_init_cpus(void)
261267
set_cpu_possible(i, true);
262268
}
263269

270+
/*
271+
* For now, just make sure the start-up address is not within the booting
272+
* kernel space as that means we just overwrote whatever secondary_startup()
273+
* code there was.
274+
*/
275+
static bool __init omap4_smp_cpu1_startup_valid(unsigned long addr)
276+
{
277+
if ((addr >= __pa(PAGE_OFFSET)) && (addr <= __pa(__bss_start)))
278+
return false;
279+
280+
return true;
281+
}
282+
283+
/*
284+
* We may need to reset CPU1 before configuring, otherwise kexec boot can end
285+
* up trying to use old kernel startup address or suspend-resume will
286+
* occasionally fail to bring up CPU1 on 4430 if CPU1 fails to enter deeper
287+
* idle states.
288+
*/
289+
static void __init omap4_smp_maybe_reset_cpu1(struct omap_smp_config *c)
290+
{
291+
unsigned long cpu1_startup_pa, cpu1_ns_pa_addr;
292+
bool needs_reset = false;
293+
u32 released;
294+
295+
if (omap_secure_apis_support())
296+
released = omap_read_auxcoreboot0() & AUX_CORE_BOOT0_HS_RELEASE;
297+
else
298+
released = readl_relaxed(cfg.wakeupgen_base +
299+
OMAP_AUX_CORE_BOOT_0) &
300+
AUX_CORE_BOOT0_GP_RELEASE;
301+
if (released) {
302+
pr_warn("smp: CPU1 not parked?\n");
303+
304+
return;
305+
}
306+
307+
cpu1_startup_pa = readl_relaxed(cfg.wakeupgen_base +
308+
OMAP_AUX_CORE_BOOT_1);
309+
cpu1_ns_pa_addr = omap4_get_cpu1_ns_pa_addr();
310+
311+
/* Did the configured secondary_startup() get overwritten? */
312+
if (!omap4_smp_cpu1_startup_valid(cpu1_startup_pa))
313+
needs_reset = true;
314+
315+
/*
316+
* If omap4 or 5 has NS_PA_ADDR configured, CPU1 may be in a
317+
* deeper idle state in WFI and will wake to an invalid address.
318+
*/
319+
if ((soc_is_omap44xx() || soc_is_omap54xx()) &&
320+
!omap4_smp_cpu1_startup_valid(cpu1_ns_pa_addr))
321+
needs_reset = true;
322+
323+
if (!needs_reset || !c->cpu1_rstctrl_va)
324+
return;
325+
326+
pr_info("smp: CPU1 parked within kernel, needs reset (0x%lx 0x%lx)\n",
327+
cpu1_startup_pa, cpu1_ns_pa_addr);
328+
329+
writel_relaxed(1, c->cpu1_rstctrl_va);
330+
readl_relaxed(c->cpu1_rstctrl_va);
331+
writel_relaxed(0, c->cpu1_rstctrl_va);
332+
}
333+
264334
static void __init omap4_smp_prepare_cpus(unsigned int max_cpus)
265335
{
266-
void __iomem *base = omap_get_wakeupgen_base();
267336
const struct omap_smp_config *c = NULL;
268337

269338
if (soc_is_omap443x())
@@ -281,6 +350,7 @@ static void __init omap4_smp_prepare_cpus(unsigned int max_cpus)
281350
/* Must preserve cfg.scu_base set earlier */
282351
cfg.cpu1_rstctrl_pa = c->cpu1_rstctrl_pa;
283352
cfg.startup_addr = c->startup_addr;
353+
cfg.wakeupgen_base = omap_get_wakeupgen_base();
284354

285355
if (soc_is_dra74x() || soc_is_omap54xx()) {
286356
if ((__boot_cpu_mode & MODE_MASK) == HYP_MODE)
@@ -299,15 +369,7 @@ static void __init omap4_smp_prepare_cpus(unsigned int max_cpus)
299369
if (cfg.scu_base)
300370
scu_enable(cfg.scu_base);
301371

302-
/*
303-
* Reset CPU1 before configuring, otherwise kexec will
304-
* end up trying to use old kernel startup address.
305-
*/
306-
if (cfg.cpu1_rstctrl_va) {
307-
writel_relaxed(1, cfg.cpu1_rstctrl_va);
308-
readl_relaxed(cfg.cpu1_rstctrl_va);
309-
writel_relaxed(0, cfg.cpu1_rstctrl_va);
310-
}
372+
omap4_smp_maybe_reset_cpu1(&cfg);
311373

312374
/*
313375
* Write the address of secondary startup routine into the
@@ -319,7 +381,7 @@ static void __init omap4_smp_prepare_cpus(unsigned int max_cpus)
319381
omap_auxcoreboot_addr(__pa_symbol(cfg.startup_addr));
320382
else
321383
writel_relaxed(__pa_symbol(cfg.startup_addr),
322-
base + OMAP_AUX_CORE_BOOT_1);
384+
cfg.wakeupgen_base + OMAP_AUX_CORE_BOOT_1);
323385
}
324386

325387
const struct smp_operations omap4_smp_ops __initconst = {

arch/arm/mach-omap2/omap_device.c

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -222,6 +222,14 @@ static int _omap_device_notifier_call(struct notifier_block *nb,
222222
dev_err(dev, "failed to idle\n");
223223
}
224224
break;
225+
case BUS_NOTIFY_BIND_DRIVER:
226+
od = to_omap_device(pdev);
227+
if (od && (od->_state == OMAP_DEVICE_STATE_ENABLED) &&
228+
pm_runtime_status_suspended(dev)) {
229+
od->_driver_status = BUS_NOTIFY_BIND_DRIVER;
230+
pm_runtime_set_active(dev);
231+
}
232+
break;
225233
case BUS_NOTIFY_ADD_DEVICE:
226234
if (pdev->dev.of_node)
227235
omap_device_build_from_dt(pdev);

arch/arm/mach-orion5x/Kconfig

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -6,6 +6,7 @@ menuconfig ARCH_ORION5X
66
select GPIOLIB
77
select MVEBU_MBUS
88
select PCI
9+
select PHYLIB if NETDEVICES
910
select PLAT_ORION_LEGACY
1011
help
1112
Support for the following Marvell Orion 5x series SoCs:

arch/arm/plat-orion/common.c

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -468,6 +468,7 @@ void __init orion_ge11_init(struct mv643xx_eth_platform_data *eth_data,
468468
eth_data, &orion_ge11);
469469
}
470470

471+
#ifdef CONFIG_ARCH_ORION5X
471472
/*****************************************************************************
472473
* Ethernet switch
473474
****************************************************************************/
@@ -480,6 +481,9 @@ void __init orion_ge00_switch_init(struct dsa_chip_data *d)
480481
struct mdio_board_info *bd;
481482
unsigned int i;
482483

484+
if (!IS_BUILTIN(CONFIG_PHYLIB))
485+
return;
486+
483487
for (i = 0; i < ARRAY_SIZE(d->port_names); i++)
484488
if (!strcmp(d->port_names[i], "cpu"))
485489
break;
@@ -493,6 +497,7 @@ void __init orion_ge00_switch_init(struct dsa_chip_data *d)
493497

494498
mdiobus_register_board_info(&orion_ge00_switch_board_info, 1);
495499
}
500+
#endif
496501

497502
/*****************************************************************************
498503
* I2C

arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -179,8 +179,10 @@
179179
usbphy: phy@01c19400 {
180180
compatible = "allwinner,sun50i-a64-usb-phy";
181181
reg = <0x01c19400 0x14>,
182+
<0x01c1a800 0x4>,
182183
<0x01c1b800 0x4>;
183184
reg-names = "phy_ctrl",
185+
"pmu0",
184186
"pmu1";
185187
clocks = <&ccu CLK_USB_PHY0>,
186188
<&ccu CLK_USB_PHY1>;

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