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Bhupesh Sharmaolofj
Bhupesh Sharma
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olofj
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arm64: Add DTS support for FSL's LS2085A SoC
This patch adds the device tree support for FSL LS2085A SoC based on ARMv8 architecture. Following levels of DTSI/DTS files have been created for the LS2085A SoC family: - fsl-ls2085a.dtsi: DTS-Include file for FSL LS2085A SoC. - fsl-ls2085a-simu.dts: DTS file for FSL LS2085a software simulator model. In addition, this patch adds build support for FSL's LS2085A simulator model in arm64 dts Makefile. Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com> Signed-off-by: Arnab Basu <arnab_basu@rocketmail.com> Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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‎arch/arm64/boot/dts/Makefile

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@@ -3,6 +3,7 @@ dts-dirs += apm
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dts-dirs += arm
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dts-dirs += cavium
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dts-dirs += exynos
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dts-dirs += freescale
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always := $(dtb-y)
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subdir-y := $(dts-dirs)

‎arch/arm64/boot/dts/freescale/Makefile

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dtb-$(CONFIG_ARCH_FSL_LS2085A) += fsl-ls2085a-simu.dtb
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always := $(dtb-y)
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subdir-y := $(dts-dirs)
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clean-files := *.dtb

‎arch/arm64/boot/dts/freescale/fsl-ls2085a-simu.dts

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/*
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* Device Tree file for Freescale LS2085a software Simulator model
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*
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* Copyright (C) 2014, Freescale Semiconductor
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*
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* Bhupesh Sharma <bhupesh.sharma@freescale.com>
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public
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* License along with this library; if not, write to the Free
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* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
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* MA 02110-1301 USA
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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/dts-v1/;
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/include/ "fsl-ls2085a.dtsi"
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/ {
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model = "Freescale Layerscape 2085a software Simulator model";
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compatible = "fsl,ls2085a-simu", "fsl,ls2085a";
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ethernet@2210000 {
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compatible = "smsc,lan91c111";
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reg = <0x0 0x2210000 0x0 0x100>;
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interrupts = <0 58 0x1>;
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};
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};

‎arch/arm64/boot/dts/freescale/fsl-ls2085a.dtsi

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/*
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* Device Tree Include file for Freescale Layerscape-2085A family SoC.
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*
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* Copyright (C) 2014, Freescale Semiconductor
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*
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* Bhupesh Sharma <bhupesh.sharma@freescale.com>
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPLv2 or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public
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* License along with this library; if not, write to the Free
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* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
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* MA 02110-1301 USA
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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/ {
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compatible = "fsl,ls2085a";
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interrupt-parent = <&gic>;
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#address-cells = <2>;
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#size-cells = <2>;
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cpus {
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#address-cells = <2>;
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#size-cells = <0>;
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/*
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* We expect the enable-method for cpu's to be "psci", but this
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* is dependent on the SoC FW, which will fill this in.
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*
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* Currently supported enable-method is psci v0.2
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*/
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/* We have 4 clusters having 2 Cortex-A57 cores each */
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cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-a57";
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reg = <0x0 0x0>;
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};
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cpu@1 {
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device_type = "cpu";
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compatible = "arm,cortex-a57";
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reg = <0x0 0x1>;
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};
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cpu@100 {
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device_type = "cpu";
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compatible = "arm,cortex-a57";
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reg = <0x0 0x100>;
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};
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cpu@101 {
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device_type = "cpu";
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compatible = "arm,cortex-a57";
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reg = <0x0 0x101>;
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};
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cpu@200 {
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device_type = "cpu";
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compatible = "arm,cortex-a57";
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reg = <0x0 0x200>;
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};
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cpu@201 {
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device_type = "cpu";
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compatible = "arm,cortex-a57";
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reg = <0x0 0x201>;
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};
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cpu@300 {
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device_type = "cpu";
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compatible = "arm,cortex-a57";
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reg = <0x0 0x300>;
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};
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cpu@301 {
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device_type = "cpu";
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compatible = "arm,cortex-a57";
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reg = <0x0 0x301>;
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};
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};
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memory@80000000 {
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device_type = "memory";
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reg = <0x00000000 0x80000000 0 0x80000000>;
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/* DRAM space - 1, size : 2 GB DRAM */
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};
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gic: interrupt-controller@6000000 {
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compatible = "arm,gic-v3";
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reg = <0x0 0x06000000 0 0x10000>, /* GIC Dist */
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<0x0 0x06100000 0 0x100000>; /* GICR (RD_base + SGI_base) */
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#interrupt-cells = <3>;
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interrupt-controller;
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interrupts = <1 9 0x4>;
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};
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timer {
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compatible = "arm,armv8-timer";
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interrupts = <1 13 0x8>, /* Physical Secure PPI, active-low */
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<1 14 0x8>, /* Physical Non-Secure PPI, active-low */
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<1 11 0x8>, /* Virtual PPI, active-low */
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<1 10 0x8>; /* Hypervisor PPI, active-low */
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};
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serial0: serial@21c0500 {
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device_type = "serial";
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compatible = "fsl,ns16550", "ns16550a";
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reg = <0x0 0x21c0500 0x0 0x100>;
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clock-frequency = <0>; /* Updated by bootloader */
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interrupts = <0 32 0x1>; /* edge triggered */
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};
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serial1: serial@21c0600 {
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device_type = "serial";
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compatible = "fsl,ns16550", "ns16550a";
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reg = <0x0 0x21c0600 0x0 0x100>;
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clock-frequency = <0>; /* Updated by bootloader */
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interrupts = <0 32 0x1>; /* edge triggered */
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};
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fsl_mc: fsl-mc@80c000000 {
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compatible = "fsl,qoriq-mc";
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reg = <0x00000008 0x0c000000 0 0x40>, /* MC portal base */
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<0x00000000 0x08340000 0 0x40000>; /* MC control reg */
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};
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};

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