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Suzuki K Poulosewildea01
Suzuki K Poulose
authored and
wildea01
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arm64: HWCAP: Split COMPAT HWCAP table entries
In order to handle systems which do not support 32bit at EL0, split the COMPAT HWCAP entries into a separate table which can be processed, only if the support is available. Tested-by: Yury Norov <ynorov@caviumnetworks.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
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‎arch/arm64/kernel/cpufeature.c

Lines changed: 56 additions & 48 deletions
Original file line numberDiff line numberDiff line change
@@ -755,6 +755,10 @@ static const struct arm64_cpu_capabilities arm64_elf_hwcaps[] = {
755755
HWCAP_CAP(SYS_ID_AA64PFR0_EL1, ID_AA64PFR0_FP_SHIFT, FTR_SIGNED, 1, CAP_HWCAP, HWCAP_FPHP),
756756
HWCAP_CAP(SYS_ID_AA64PFR0_EL1, ID_AA64PFR0_ASIMD_SHIFT, FTR_SIGNED, 0, CAP_HWCAP, HWCAP_ASIMD),
757757
HWCAP_CAP(SYS_ID_AA64PFR0_EL1, ID_AA64PFR0_ASIMD_SHIFT, FTR_SIGNED, 1, CAP_HWCAP, HWCAP_ASIMDHP),
758+
{},
759+
};
760+
761+
static const struct arm64_cpu_capabilities compat_elf_hwcaps[] = {
758762
#ifdef CONFIG_COMPAT
759763
HWCAP_CAP(SYS_ID_ISAR5_EL1, ID_ISAR5_AES_SHIFT, FTR_UNSIGNED, 2, CAP_COMPAT_HWCAP2, COMPAT_HWCAP2_PMULL),
760764
HWCAP_CAP(SYS_ID_ISAR5_EL1, ID_ISAR5_AES_SHIFT, FTR_UNSIGNED, 1, CAP_COMPAT_HWCAP2, COMPAT_HWCAP2_AES),
@@ -810,28 +814,23 @@ static bool cpus_have_elf_hwcap(const struct arm64_cpu_capabilities *cap)
810814
return rc;
811815
}
812816

813-
static void __init setup_elf_hwcaps(void)
817+
static void __init setup_elf_hwcaps(const struct arm64_cpu_capabilities *hwcaps)
814818
{
815-
int i;
816-
const struct arm64_cpu_capabilities *hwcaps = arm64_elf_hwcaps;
817-
818-
for (i = 0; hwcaps[i].matches; i++)
819-
if (hwcaps[i].matches(&hwcaps[i]))
820-
cap_set_elf_hwcap(&hwcaps[i]);
819+
for (; hwcaps->matches; hwcaps++)
820+
if (hwcaps->matches(hwcaps))
821+
cap_set_elf_hwcap(hwcaps);
821822
}
822823

823824
void update_cpu_capabilities(const struct arm64_cpu_capabilities *caps,
824825
const char *info)
825826
{
826-
int i;
827-
828-
for (i = 0; caps[i].matches; i++) {
829-
if (!caps[i].matches(&caps[i]))
827+
for (; caps->matches; caps++) {
828+
if (!caps->matches(caps))
830829
continue;
831830

832-
if (!cpus_have_cap(caps[i].capability) && caps[i].desc)
833-
pr_info("%s %s\n", info, caps[i].desc);
834-
cpus_set_cap(caps[i].capability);
831+
if (!cpus_have_cap(caps->capability) && caps->desc)
832+
pr_info("%s %s\n", info, caps->desc);
833+
cpus_set_cap(caps->capability);
835834
}
836835
}
837836

@@ -842,11 +841,9 @@ void update_cpu_capabilities(const struct arm64_cpu_capabilities *caps,
842841
static void __init
843842
enable_cpu_capabilities(const struct arm64_cpu_capabilities *caps)
844843
{
845-
int i;
846-
847-
for (i = 0; caps[i].matches; i++)
848-
if (caps[i].enable && cpus_have_cap(caps[i].capability))
849-
on_each_cpu(caps[i].enable, NULL, true);
844+
for (; caps->matches; caps++)
845+
if (caps->enable && cpus_have_cap(caps->capability))
846+
on_each_cpu(caps->enable, NULL, true);
850847
}
851848

852849
/*
@@ -916,6 +913,41 @@ static void check_early_cpu_features(void)
916913
verify_cpu_asid_bits();
917914
}
918915

916+
static void
917+
verify_local_elf_hwcaps(const struct arm64_cpu_capabilities *caps)
918+
{
919+
920+
for (; caps->matches; caps++) {
921+
if (!cpus_have_elf_hwcap(caps))
922+
continue;
923+
if (!feature_matches(__raw_read_system_reg(caps->sys_reg), caps)) {
924+
pr_crit("CPU%d: missing HWCAP: %s\n",
925+
smp_processor_id(), caps->desc);
926+
cpu_die_early();
927+
}
928+
}
929+
}
930+
931+
static void
932+
verify_local_cpu_features(const struct arm64_cpu_capabilities *caps)
933+
{
934+
for (; caps->matches; caps++) {
935+
if (!cpus_have_cap(caps->capability) || !caps->sys_reg)
936+
continue;
937+
/*
938+
* If the new CPU misses an advertised feature, we cannot proceed
939+
* further, park the cpu.
940+
*/
941+
if (!feature_matches(__raw_read_system_reg(caps->sys_reg), caps)) {
942+
pr_crit("CPU%d: missing feature: %s\n",
943+
smp_processor_id(), caps->desc);
944+
cpu_die_early();
945+
}
946+
if (caps->enable)
947+
caps->enable(NULL);
948+
}
949+
}
950+
919951
/*
920952
* Run through the enabled system capabilities and enable() it on this CPU.
921953
* The capabilities were decided based on the available CPUs at the boot time.
@@ -926,8 +958,6 @@ static void check_early_cpu_features(void)
926958
*/
927959
void verify_local_cpu_capabilities(void)
928960
{
929-
int i;
930-
const struct arm64_cpu_capabilities *caps;
931961

932962
check_early_cpu_features();
933963

@@ -938,32 +968,9 @@ void verify_local_cpu_capabilities(void)
938968
if (!sys_caps_initialised)
939969
return;
940970

941-
caps = arm64_features;
942-
for (i = 0; caps[i].matches; i++) {
943-
if (!cpus_have_cap(caps[i].capability) || !caps[i].sys_reg)
944-
continue;
945-
/*
946-
* If the new CPU misses an advertised feature, we cannot proceed
947-
* further, park the cpu.
948-
*/
949-
if (!feature_matches(__raw_read_system_reg(caps[i].sys_reg), &caps[i])) {
950-
pr_crit("CPU%d: missing feature: %s\n",
951-
smp_processor_id(), caps[i].desc);
952-
cpu_die_early();
953-
}
954-
if (caps[i].enable)
955-
caps[i].enable(NULL);
956-
}
957-
958-
for (i = 0, caps = arm64_elf_hwcaps; caps[i].matches; i++) {
959-
if (!cpus_have_elf_hwcap(&caps[i]))
960-
continue;
961-
if (!feature_matches(__raw_read_system_reg(caps[i].sys_reg), &caps[i])) {
962-
pr_crit("CPU%d: missing HWCAP: %s\n",
963-
smp_processor_id(), caps[i].desc);
964-
cpu_die_early();
965-
}
966-
}
971+
verify_local_cpu_features(arm64_features);
972+
verify_local_elf_hwcaps(arm64_elf_hwcaps);
973+
verify_local_elf_hwcaps(compat_elf_hwcaps);
967974
}
968975

969976
static void __init setup_feature_capabilities(void)
@@ -979,7 +986,8 @@ void __init setup_cpu_features(void)
979986

980987
/* Set the CPU feature capabilies */
981988
setup_feature_capabilities();
982-
setup_elf_hwcaps();
989+
setup_elf_hwcaps(arm64_elf_hwcaps);
990+
setup_elf_hwcaps(compat_elf_hwcaps);
983991

984992
/* Advertise that we have computed the system capabilities */
985993
set_sys_caps_initialised();

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