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scsi: lpfc: Utilize new IRQ API when allocating MSI-X vectors
Current driver uses the older IRQ API for MSIX allocation Change driver to utilize pci_alloc_irq_vectors when allocating IRQ vectors. Make lpfc_cpu_affinity_check use pci_irq_get_affinity to determine how the kernel mapped all the IRQs. Remove msix_entries from SLI4 structure, replaced with pci_irq_vector() usage. Signed-off-by: Dick Kennedy <dick.kennedy@broadcom.com> Signed-off-by: James Smart <jsmart2021@gmail.com> Reviewed-by: Hannes Reinecke <hare@suse.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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‎drivers/scsi/lpfc/lpfc_init.c

Lines changed: 13 additions & 149 deletions
Original file line numberDiff line numberDiff line change
@@ -10554,103 +10554,6 @@ lpfc_find_eq_handle(struct lpfc_hba *phba, uint16_t hdwq)
1055410554
return 0;
1055510555
}
1055610556

10557-
/**
10558-
* lpfc_find_phys_id_eq - Find the next EQ that corresponds to the specified
10559-
* Physical Id.
10560-
* @phba: pointer to lpfc hba data structure.
10561-
* @eqidx: EQ index
10562-
* @phys_id: CPU package physical id
10563-
*/
10564-
static uint16_t
10565-
lpfc_find_phys_id_eq(struct lpfc_hba *phba, uint16_t eqidx, uint16_t phys_id)
10566-
{
10567-
struct lpfc_vector_map_info *cpup;
10568-
int cpu, desired_phys_id;
10569-
10570-
desired_phys_id = LPFC_VECTOR_MAP_EMPTY;
10571-
10572-
/* Find the desired phys_id for the specified EQ */
10573-
cpup = phba->sli4_hba.cpu_map;
10574-
for (cpu = 0; cpu < phba->sli4_hba.num_present_cpu; cpu++) {
10575-
if ((cpup->irq != LPFC_VECTOR_MAP_EMPTY) &&
10576-
(cpup->eq == eqidx)) {
10577-
desired_phys_id = cpup->phys_id;
10578-
break;
10579-
}
10580-
cpup++;
10581-
}
10582-
if (phys_id == desired_phys_id)
10583-
return eqidx;
10584-
10585-
/* Find a EQ thats on the specified phys_id */
10586-
cpup = phba->sli4_hba.cpu_map;
10587-
for (cpu = 0; cpu < phba->sli4_hba.num_present_cpu; cpu++) {
10588-
if ((cpup->irq != LPFC_VECTOR_MAP_EMPTY) &&
10589-
(cpup->phys_id == phys_id))
10590-
return cpup->eq;
10591-
cpup++;
10592-
}
10593-
return 0;
10594-
}
10595-
10596-
/**
10597-
* lpfc_find_cpu_map - Find next available CPU map entry that matches the
10598-
* phys_id and core_id.
10599-
* @phba: pointer to lpfc hba data structure.
10600-
* @phys_id: CPU package physical id
10601-
* @core_id: CPU core id
10602-
* @hdwqidx: Hardware Queue index
10603-
* @eqidx: EQ index
10604-
* @isr_avail: Should an IRQ be associated with this entry
10605-
*/
10606-
static struct lpfc_vector_map_info *
10607-
lpfc_find_cpu_map(struct lpfc_hba *phba, uint16_t phys_id, uint16_t core_id,
10608-
uint16_t hdwqidx, uint16_t eqidx, int isr_avail)
10609-
{
10610-
struct lpfc_vector_map_info *cpup;
10611-
int cpu;
10612-
10613-
cpup = phba->sli4_hba.cpu_map;
10614-
for (cpu = 0; cpu < phba->sli4_hba.num_present_cpu; cpu++) {
10615-
/* Does the cpup match the one we are looking for */
10616-
if ((cpup->phys_id == phys_id) &&
10617-
(cpup->core_id == core_id)) {
10618-
/* If it has been already assigned, then skip it */
10619-
if (cpup->hdwq != LPFC_VECTOR_MAP_EMPTY) {
10620-
cpup++;
10621-
continue;
10622-
}
10623-
/* Ensure we are on the same phys_id as the first one */
10624-
if (!isr_avail)
10625-
cpup->eq = lpfc_find_phys_id_eq(phba, eqidx,
10626-
phys_id);
10627-
else
10628-
cpup->eq = eqidx;
10629-
10630-
cpup->hdwq = hdwqidx;
10631-
if (isr_avail) {
10632-
cpup->irq =
10633-
pci_irq_vector(phba->pcidev, eqidx);
10634-
10635-
/* Now affinitize to the selected CPU */
10636-
irq_set_affinity_hint(cpup->irq,
10637-
get_cpu_mask(cpu));
10638-
irq_set_status_flags(cpup->irq,
10639-
IRQ_NO_BALANCING);
10640-
10641-
lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10642-
"3330 Set Affinity: CPU %d "
10643-
"EQ %d irq %d (HDWQ %x)\n",
10644-
cpu, cpup->eq,
10645-
cpup->irq, cpup->hdwq);
10646-
}
10647-
return cpup;
10648-
}
10649-
cpup++;
10650-
}
10651-
return 0;
10652-
}
10653-
1065410557
#ifdef CONFIG_X86
1065510558
/**
1065610559
* lpfc_find_hyper - Determine if the CPU map entry is hyper-threaded
@@ -10693,11 +10596,11 @@ lpfc_find_hyper(struct lpfc_hba *phba, int cpu,
1069310596
static void
1069410597
lpfc_cpu_affinity_check(struct lpfc_hba *phba, int vectors)
1069510598
{
10696-
int i, j, idx, phys_id;
10599+
int i, cpu, idx, phys_id;
1069710600
int max_phys_id, min_phys_id;
1069810601
int max_core_id, min_core_id;
1069910602
struct lpfc_vector_map_info *cpup;
10700-
int cpu, eqidx, hdwqidx, isr_avail;
10603+
const struct cpumask *maskp;
1070110604
#ifdef CONFIG_X86
1070210605
struct cpuinfo_x86 *cpuinfo;
1070310606
#endif
@@ -10754,60 +10657,21 @@ lpfc_cpu_affinity_check(struct lpfc_hba *phba, int vectors)
1075410657
eqi->icnt = 0;
1075510658
}
1075610659

10757-
/*
10758-
* If the number of IRQ vectors == number of CPUs,
10759-
* mapping is pretty simple: 1 to 1.
10760-
* This is the desired path if NVME is enabled.
10761-
*/
10762-
if (vectors == phba->sli4_hba.num_present_cpu) {
10763-
cpup = phba->sli4_hba.cpu_map;
10764-
for (idx = 0; idx < vectors; idx++) {
10660+
for (idx = 0; idx < phba->cfg_irq_chann; idx++) {
10661+
maskp = pci_irq_get_affinity(phba->pcidev, idx);
10662+
if (!maskp)
10663+
continue;
10664+
10665+
for_each_cpu_and(cpu, maskp, cpu_present_mask) {
10666+
cpup = &phba->sli4_hba.cpu_map[cpu];
1076510667
cpup->eq = idx;
1076610668
cpup->hdwq = idx;
1076710669
cpup->irq = pci_irq_vector(phba->pcidev, idx);
1076810670

10769-
/* Now affinitize to the selected CPU */
10770-
irq_set_affinity_hint(
10771-
pci_irq_vector(phba->pcidev, idx),
10772-
get_cpu_mask(idx));
10773-
irq_set_status_flags(cpup->irq, IRQ_NO_BALANCING);
10774-
10775-
lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10671+
lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1077610672
"3336 Set Affinity: CPU %d "
10777-
"EQ %d irq %d\n",
10778-
idx, cpup->eq,
10779-
pci_irq_vector(phba->pcidev, idx));
10780-
cpup++;
10781-
}
10782-
return;
10783-
}
10784-
10785-
idx = 0;
10786-
isr_avail = 1;
10787-
eqidx = 0;
10788-
hdwqidx = 0;
10789-
10790-
/* Mapping is more complicated for this case. Hardware Queues are
10791-
* assigned in a "ping pong" fashion, ping pong-ing between the
10792-
* available phys_id's.
10793-
*/
10794-
while (idx < phba->sli4_hba.num_present_cpu) {
10795-
for (i = min_core_id; i <= max_core_id; i++) {
10796-
for (j = min_phys_id; j <= max_phys_id; j++) {
10797-
cpup = lpfc_find_cpu_map(phba, j, i, hdwqidx,
10798-
eqidx, isr_avail);
10799-
if (!cpup)
10800-
continue;
10801-
idx++;
10802-
hdwqidx++;
10803-
if (hdwqidx >= phba->cfg_hdw_queue)
10804-
hdwqidx = 0;
10805-
eqidx++;
10806-
if (eqidx >= phba->cfg_irq_chann) {
10807-
isr_avail = 0;
10808-
eqidx = 0;
10809-
}
10810-
}
10673+
"hdwq %d irq %d\n",
10674+
cpu, cpup->hdwq, cpup->irq);
1081110675
}
1081210676
}
1081310677
return;
@@ -10834,7 +10698,7 @@ lpfc_sli4_enable_msix(struct lpfc_hba *phba)
1083410698
vectors = phba->cfg_irq_chann;
1083510699

1083610700
rc = pci_alloc_irq_vectors(phba->pcidev,
10837-
(phba->nvmet_support) ? 1 : 2,
10701+
1,
1083810702
vectors, PCI_IRQ_MSIX | PCI_IRQ_AFFINITY);
1083910703
if (rc < 0) {
1084010704
lpfc_printf_log(phba, KERN_INFO, LOG_INIT,

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